Preface |
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xiii | |
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1 Introduction To Digital Systems |
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1 | (24) |
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2 | (4) |
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6 | (1) |
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1.3 Combinational and Sequential Circuits |
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7 | (1) |
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1.4 Digital Integrated Circuits |
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7 | (11) |
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7 | (1) |
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8 | (6) |
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14 | (4) |
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1.5 Integrated Circuits (ICs) |
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18 | (1) |
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1.6 CAD (Computer-Aided Design) |
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19 | (1) |
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1.7 Evolution of the Microcontroller |
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20 | (1) |
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1.8 Typical Microcontroller Applications |
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21 | (4) |
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1.8.1 A Simple Microcontroller Application |
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22 | (1) |
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1.8.2 Embedded Controllers |
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23 | (2) |
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2 Number Systems And Codes |
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25 | (34) |
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25 | (5) |
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2.1.1 General Number Representation |
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25 | (3) |
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2.1.2 Converting Numbers from One Base to Another |
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28 | (2) |
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2.2 Unsigned and Signed Binary Numbers |
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30 | (4) |
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34 | (6) |
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2.3.1 Binary-Coded-Decimal Code (8421 Code) |
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34 | (1) |
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35 | (1) |
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36 | (1) |
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37 | (2) |
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39 | (1) |
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2.4 Fixed-Point and Floating-Point Representations |
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40 | (1) |
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2.5 Arithmetic Operations |
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41 | (12) |
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41 | (10) |
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51 | (2) |
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2.6 Error Correction and Detection |
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53 | (6) |
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55 | (4) |
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3 Boolean Algebra And Digital Logic Gates |
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59 | (50) |
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3.1 Basic Logic Operations |
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59 | (5) |
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59 | (1) |
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60 | (2) |
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62 | (2) |
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3.2 Other Logic Operations |
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64 | (3) |
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64 | (1) |
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64 | (1) |
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3.2.3 Exclusive-OR operation (XOR) |
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65 | (1) |
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3.2.4 Exclusive-NOR Operation (XNOR) |
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66 | (1) |
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3.3 IEEE Symbols for Logic Gates |
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67 | (1) |
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3.4 Positive and Negative Logic |
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68 | (1) |
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69 | (7) |
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70 | (2) |
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3.5.2 Simplification Using Boolean Identities |
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72 | (2) |
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74 | (1) |
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3.5.4 Complement of a Boolean Function |
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75 | (1) |
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3.6 Standard Representations |
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76 | (4) |
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80 | (16) |
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81 | (1) |
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3.7.2 Three-Variable K-map |
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82 | (3) |
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3.7.3 Four-Variable K-map |
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85 | (2) |
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87 | (2) |
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3.7.5 Expressing a Boolean function in Product-of-sums (POS) form using a K-map |
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89 | (2) |
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3.7.6 Don't Care Conditions |
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91 | (4) |
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3.7.7 Five-Variable K-map |
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95 | (1) |
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3.8 Quine-McCluskey Method |
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96 | (1) |
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3.9 Implementation of Digital Circuits with NAND, NOR, and Exclusive-OR/Exclusive-NOR Gates |
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97 | (12) |
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3.9.1 NAND Gate Implementation |
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98 | (1) |
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3.9.2 NOR Gate Implementation |
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99 | (3) |
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3.9.3 XOR / XNOR Implementations |
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102 | (4) |
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106 | (3) |
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109 | (64) |
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109 | (1) |
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4.2 Analysis of a Combinational Logic Circuit |
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109 | (1) |
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4.3 Design of a Combinational Circuit |
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110 | (2) |
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4.4 Multiple-Output Combinational Circuits |
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112 | (2) |
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4.5 Typical Combinational Circuits |
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114 | (22) |
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114 | (4) |
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118 | (4) |
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122 | (5) |
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127 | (2) |
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129 | (1) |
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4.5.6 Binary / BCD Adders and Binary Subtractors |
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129 | (7) |
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4.6 IEEE Standard Symbols |
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136 | (2) |
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4.7 Read-Only Memories (ROMs) |
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138 | (2) |
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4.8 Programmable Logic Devices (PLDs) |
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140 | (4) |
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4.9 Commercially Available Field Programmable Devices (FPDs) |
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144 | (2) |
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4.10 Hardware Description Language (HDL) |
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146 | (2) |
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148 | (7) |
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148 | (1) |
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4.11.2 A typical Verilog Segment |
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148 | (3) |
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151 | (1) |
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152 | (1) |
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4.11.5 Modeling logical conditions in a circuit |
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152 | (1) |
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4.11.6 Verilog if-else and case-endcase structures |
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153 | (1) |
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4.11.7 A typical Verilog Simulator |
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153 | (2) |
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4.12 Verilog modeling examples for combinational circuits |
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155 | (18) |
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4.12.1 Structural modeling |
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155 | (6) |
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161 | (2) |
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4.12.3 Behavioral modeling |
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163 | (5) |
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168 | (5) |
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173 | (70) |
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173 | (1) |
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5.2 Latches and Flip-Flops |
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173 | (8) |
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174 | (2) |
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176 | (1) |
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176 | (1) |
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5.2.4 Edge-Triggered D Flip-Flop |
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177 | (3) |
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180 | (1) |
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181 | (1) |
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5.3 Flip-flop timing parameters for edge-triggered flip-flops |
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181 | (1) |
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5.4 Preset and Clear Inputs |
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182 | (1) |
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5.5 Summary of the gated SR latch and the Flip-Flops |
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182 | (3) |
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5.6 Analysis of Synchronous Sequential Circuits |
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185 | (3) |
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5.7 Types of Synchronous Sequential Circuits |
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188 | (1) |
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5.8 Minimization of States |
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188 | (2) |
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5.9 Design of Synchronous Sequential Circuits |
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190 | (6) |
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196 | (5) |
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5.11 Examples of Synchronous Sequential Circuits |
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201 | (6) |
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201 | (2) |
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203 | (3) |
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5.11.3 Random-Access Memory (RAM) |
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206 | (1) |
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5.12 Algorithmic State Machines (ASM) Chart |
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207 | (7) |
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5.13 Asynchronous Sequential Circuits |
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214 | (3) |
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5.14 Verilog description of typical synchronous sequential circuits |
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217 | (26) |
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235 | (8) |
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243 | (74) |
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243 | (37) |
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244 | (1) |
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6.1.2 Arithmetic Logic Unit (ALU) |
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244 | (11) |
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255 | (2) |
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6.1.4 Control Unit Design |
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257 | (23) |
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280 | (10) |
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6.2.1 Types of Main memory |
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283 | (2) |
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6.2.2 Read and Write Timing Diagrams |
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285 | (2) |
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6.2.3 Main Memory Organization |
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287 | (3) |
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290 | (6) |
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292 | (1) |
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293 | (2) |
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295 | (1) |
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6.4 CPU design using Verilog |
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296 | (21) |
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309 | (8) |
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317 | (28) |
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7.1 Basic Blocks of a Microcontroller |
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317 | (3) |
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318 | (1) |
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319 | (1) |
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7.2 Microcontroller Architectures |
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320 | (1) |
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7.3 Basic Concept of Pipelining |
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321 | (2) |
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323 | (1) |
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7.5 Functional Representation of a Typical RISC Microcontroller---The PIC18F4321 |
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324 | (1) |
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7.6 Basics of Programming Languages |
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324 | (4) |
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326 | (1) |
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327 | (1) |
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7.6.3 High-Level Language |
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327 | (1) |
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7.7 Choosing a Programming Language |
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328 | (1) |
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7.8 Introduction to C Language |
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329 | (16) |
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332 | (1) |
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7.8.2 Bit Manipulation Operators |
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333 | (1) |
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334 | (4) |
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7.8.4 The switch Construct |
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338 | (1) |
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7.8.5 The while Construct |
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338 | (2) |
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340 | (1) |
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7.8.7 The do-while Construct |
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341 | (1) |
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7.8.8 Structures and Unions |
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341 | (1) |
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342 | (1) |
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343 | (1) |
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344 | (1) |
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8 PIC18F Hardware And Interfacing Using C: Part 1 |
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345 | (28) |
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8.1 PIC18F Pins and Signals |
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345 | (6) |
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346 | (4) |
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350 | (1) |
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8.1.3 A Simplified Setup for the PIC18F4321 |
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350 | (1) |
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8.2 PIC18F4321 programmed I/O using C |
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351 | (8) |
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8.2.1 PIC 18F4321 I/O ports |
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351 | (3) |
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8.2.2 Interfacing LEDs (Light Emitting Diodes) and Seven-segment Displays |
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354 | (1) |
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8.2.3 Microchip MPLAB C18 compiler and the PICkit3 interface |
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355 | (1) |
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8.2.4 Configuration commands |
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356 | (3) |
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359 | (14) |
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8.3.1 PIC18F Interrupt Types |
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359 | (1) |
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8.3.2 PIC18F External Interrupts in Default Mode |
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359 | (2) |
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8.3.3 Interrupt Registers and Priorities |
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361 | (1) |
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8.3.4 Setting the Triggering Levels of INTn Pin Interrupts |
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362 | (1) |
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8.3.5 Programming the PIC18 interrupts using C |
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363 | (6) |
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369 | (4) |
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9 PIC18F Hardware And Interfacing Using C: Part 2 |
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373 | (56) |
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373 | (17) |
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375 | (3) |
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378 | (4) |
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382 | (2) |
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384 | (6) |
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9.2 PIC18F Interface to an LCD (Liquid Crystal Display) |
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390 | (4) |
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394 | (11) |
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9.3.1 On-chip A/D Converter |
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395 | (8) |
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9.3.2 Interfacing an External D/A (Digital-to-Analog) Converter to the PIC18F4321 |
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403 | (2) |
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405 | (8) |
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9.4.1 Synchronous Serial Data Transmission |
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405 | (1) |
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9.4.2 Asynchronous Serial Data Transmission |
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405 | (1) |
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406 | (7) |
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9.5 PIC18F4321 Capture/Compare/PWM (CCP) Modules |
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413 | (6) |
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413 | (1) |
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9.5.2 CCP Modules and Associated Timers |
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413 | (1) |
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9.5.3 PIC18F4321 Capture Mode |
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413 | (3) |
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9.5.4 PIC18F4321 Compare Mode |
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416 | (1) |
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9.5.5 PIC18F4321 PWM (Pulse Width Modulation) Mode |
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417 | (2) |
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419 | (10) |
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425 | (4) |
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APPENDIX A Answers To Selected Problems |
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429 | (10) |
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439 | (12) |
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APPENDIX C Tutorial For Compiling And Debugging A C-Program Using The MPLAB |
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451 | (28) |
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APPENDIX D Interfacing The PIC18F4321 To A Personal Computer Or A Laptop Using PICkit™3 |
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479 | (6) |
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D.1 Initial Hardware Setup For The PIC18F4321 |
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479 | (1) |
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D.2 Connecting The Personal Computer (PC) Or The Laptop To The PIC18F4321 VIA PICkit3 |
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480 | (2) |
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D.3 Programming The PICI8F4321 From A Personal Computer Or A Laptop Using The PICkit3 |
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482 | (3) |
Bibliography |
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485 | (2) |
Credits |
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487 | (2) |
Index |
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489 | |