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E-raamat: Power Trade-offs and Low-Power in Analog CMOS ICs

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The enormous rise of digital applications in the last two decades arouses the suggestion that analog techniques will lose their importance. However in applications that work with digital signals analog techniques are still very important for a number of reasons. First the signal that must be processed or stored may be analog at the input and output of the system. Second when digital circuits must operate at high speed the analog behavior becomes important again. And third when only limited bandwidth and signal to noise ratio is available the theoretical maximum data rate is determined by Shannons law. This theoretical limit can only be approximated in practice when complex modulation schemes are used, and after this modulation process the signal is analog again. Of course this does effect the tremendous advantage of digital signals compared to analog signals. Where analog signals deteriorate every time they are processed or stored, digital signals can be recovered perfectly when they are tailored to the properties of the system they are used for. The accuracy of digital signal processing is only limited by practical constraints and many digital signals can be compressed very effective so that after compression they use less bandwidth then their analog counterparts. In any aplication there will thus be analog and digital parts and often the choice has to be made if an analog or a digital solution is preferred for a certain function.
List of figures
ix
List of tables
xiii
Selected Symbols and Abbreviations xv
Foreword xvii
Acknowledgements xix
Introduction
1(8)
Motivation
1(1)
Problem definition
2(1)
Scope and outline
3(6)
References
8(1)
Power considerations in sub-micron digital CMOS
9(22)
Introduction
9(1)
Fundamental limits
10(2)
From fundamental limits to practical limits of power. An architecture level approach
12(6)
S/N ratio and power in fixed point applications
18(1)
Adders and computational power
19(4)
Ways to low-power in digital
23(2)
Example of a digital video filter
25(3)
Conclusions
28(3)
References
29(2)
Power considerations in sub-micron analog CMOS
31(38)
Introduction
31(1)
Process tuning towards digital needs. Consequences on analog
32(4)
Fundamental limits
36(2)
From fundamental limits to practical limits of power. Noise related power
38(18)
From fundamental limits to practical limits of power. Mismatch related power
56(4)
Power estimations in continuous time filters
60(6)
Conclusions
66(3)
References
67(2)
Gm-C integrators for low-power and low voltage applications. A gaussian polyphase filter for mobile transceivers in 0.35 μm CMOS
69(32)
Introduction
69(1)
Large swing and high linearity transconductor
69(9)
Low voltage current Gm-C integrator with high power efficiency
78(5)
Low-power luminance video filter. Noise driven power
83(4)
Low-power, gaussian, polyphase filter for mobile transceivers. Matching driven power
87(10)
Conclusions
97(4)
References
99(2)
Chopping: a technique for noise and offset reduction
101(26)
Introduction
101(1)
Ways to reduce offset and 1/f noise
102(3)
Chopping seen as a modulation technique
105(1)
Noise modulation
106(2)
Chopped amplifiers and offset reduction
108(1)
Low-power low-voltage chopped transconductance amplifier for noise and offset reduction. Chopping at high frequency
109(10)
A low-power bandgap voltage reference
119(4)
Conclusions
123(4)
References
125(2)
Low-noise, low residual offset, chopped amplifiers for high-end applications
127(26)
Introduction
127(1)
Low-pass filtering in a digital audio system. Application specific constraints
128(2)
The gain stage
130(2)
A low noise, low residual offset, chopped amplifier in 0.8mm CMOS
132(10)
A low noise, low residual offset, chopped amplifier in 0.5mm CMOS
142(8)
Conclusions
150(3)
References
152(1)
A 16-bit D/A interface with Sinc approximated semidigital reconstruction filter
153(34)
Introduction
153(1)
Bitstream D/A conversion system with time-discrete filtering
154(1)
S-D modulators and noise shaping
155(3)
Semidigital FIR filter principles
158(2)
Semidigital FIR filter design
160(8)
Noise properties of the D/A interface
168(8)
Realisation
176(4)
Experimental results
180(1)
Interpolative D/A converter with Sinc approximation in the time domain
181(3)
Conclusions
184(3)
References
186(1)
Conclusions
187(8)
Summary
187(2)
Conclusions
189(3)
Original contributions
192(1)
Recommendations for further research
193(2)
Appendix 1 195(4)
Appendix 2 199(4)
Appendix 3 203(4)
Index 207