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E-raamat: Radio Frequency Integrated Circuit Design, Second Edition

  • Formaat: 540 pages
  • Ilmumisaeg: 31-Jan-2010
  • Kirjastus: Artech House Publishers
  • ISBN-13: 9781607839804
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  • Formaat: 540 pages
  • Ilmumisaeg: 31-Jan-2010
  • Kirjastus: Artech House Publishers
  • ISBN-13: 9781607839804
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In this practical reference on designing radio frequency integrated circuits (RFICs), the authors, both professors of electronics at Carleton University, present working designs from their own RFIC lab. Introductory chapters for those new to RFIC design cover basics of communication circuits, issues in RFIC design, system level architecture and design considerations, and a brief review of technology. The rest of the book describes RFIC designs including RF integrated LNAs, VCO automatic amplitude control loops, voltage controlled oscillators, power amplifiers, and fully integrated transformer-based circuits. This second edition adds new information on design of RFICs using complementary metal oxide semiconductor (CMOS) transistors; it adds new equations for CMOS circuits and includes complete CMOS-based design examples for each of the major radio frequency building blocks. There are also new chapters on system issues and frequency synthesizer design. Annotation ©2010 Book News, Inc., Portland, OR (booknews.com)
Foreword to the First Edition xiii
Preface xvii
Acknowledgments xix
Introduction to Communications Circuits
1(6)
Introduction
1(1)
Lower Frequency Analog Design and Microwave Design Versus Radio-Frequency Integrated Circuit Design
2(2)
Impedance Levels for Microwave and Low-Frequency Analog Design
2(1)
Units for Microwave and Low-Frequency Analog Design
2(2)
Radio-Frequency Integrated Circuits Used in a Communications Transceiver
4(1)
Overview
5(2)
References
6(1)
Issues in RFIC Design: Noise, Linearity, and Signals
7(36)
Introduction
7(1)
Noise
7(11)
Thermal Noise
8(1)
Available Noise Power
8(1)
Available Power from Antenna
9(1)
The Concept of Noise Figure
10(4)
The Noise Figure of an Amplifier Circuit
14(2)
Phase Noise
16(2)
Linearity and Distortion in RF Circuits
18(11)
Power Series Expansion
19(3)
Third-Order Intercept Point
22(2)
Second-Order Intercept Point
24(1)
The 1-dB Compression Point
25(1)
Relationships Between 1-dB Compression and IP3 Points
26(1)
Broadband Measures of Linearity
27(2)
Modulated Signals
29(14)
Phase Modulation
31(5)
Frequency Modulation
36(2)
Minimum Shift Keying (MSK)
38(1)
Quadrature Amplitude Modulation (QAM)
39(1)
Orthogonal Frequency Division Multiplexing (OFDM)
40(1)
References
40(3)
System Level Architecture and Design Considerations
43(32)
Transmitter and Receiver Architectures and Some Design Considerations
43(5)
Superheterodyne Transceivers
43(2)
Direct Conversion Transceivers
45(2)
Low IF Transceiver and Other Alternative Transceiver Architectures
47(1)
System Level Considerations
48(22)
The Noise Figure of Components in Series
48(4)
The Linearity of Components in Series
52(2)
Dynamic Range
54(2)
Image Signals and Image Reject Filtering
56(1)
Blockers and Blocker Filtering
57(2)
The Effect of Phase Noise on SNR in a Receiver
59(1)
DC Offset
60(1)
Second-Order Nonlinearity Issues
61(1)
Receiver Automatic Gain Control Issues
62(1)
EVM in Transmitters Including Phase Noise, Linearity, IQ Mismatch, EVM with OFDM Waveforms, and Nonlinearity
63(3)
ADC and DAC Specifications
66(4)
Antennas and the Link Between a Transmitter and a Receiver
70(5)
References
73(2)
A Brief Review of Technology
75(26)
Introduction
75(1)
Bipolar Transistor Description
75(3)
β Current Dependence
78(1)
Small-Signal Model
78(1)
Small-Signal Parameters
79(1)
High-Frequency Effects
80(3)
fT as a Function of Current
82(1)
Noise in Bipolar Transistors
83(2)
Thermal Noise in Transistor Components
83(1)
Shot Noise
84(1)
1/f Noise
84(1)
Base Shot Noise Discussion
85(1)
Noise Sources in the Transistor Model
86(1)
Bipolar Transistor Design Considerations
86(1)
CMOS Transistors
87(11)
NMOS Transistor Operation
89(1)
PMOS Transistor Operation
90(1)
CMOS Small-Signal Model
90(2)
fT and fmax for CMOS Transistors
92(1)
CMOS Small-Signal Model Including Noise
92(6)
Practical Considerations in Transistor Layout
98(3)
Typical Transistors
98(1)
Symmetry
98(1)
Matching
99(1)
ESD Protection and Antenna Rules
100(1)
References
100(1)
Impedance Matching
101(30)
Introduction
101(2)
Review of the Smith Chart
103(3)
Impedance Matching
106(5)
Conversions Between Series and Parallel Resistor-Inductor and Resistor-Capacitor Circuits
111(1)
Tapped Capacitors and Inductors
112(2)
The Concept of Mutual Inductance
114(2)
Matching Using Transformers
116(1)
Tuning a Transformer
117(1)
The Bandwidth of an Impedance Transformation Network
118(2)
Quality Factor of an LC Resonator
120(2)
Broadband Impedance Matching
122(3)
Transmission Lines
125(1)
S, Y, and Z Parameters
126(5)
References
128(3)
The Use and Design of Passive Circuit Elements in IC Technologies
131(40)
Introduction
131(1)
The Technology Back End and Metalization in IC Technologies
131(1)
Sheet Resistance and the Skin Effect
132(2)
Parasitic Capacitance
134(2)
Parasitic Inductance
136(1)
Current Handling in Metal Lines
137(1)
Poly Resistors and Diffusion Resistors
137(1)
Metal-Insulator-Metal Capacitors and Stacked Metal Capacitors
138(1)
Applications of On-Chip Spiral Inductors and Transformers
139(1)
Design of Inductors and Transformers
140(2)
Some Basic Lumped Models for Inductors
142(1)
Calculating the Inductance of Spirals
143(1)
Self-Resonance of Inductors
144(1)
The Quality Factor of an Inductor
144(4)
Characterization of an Inductor
148(1)
Some Notes about the Proper Use of Inductors
149(3)
Layout of Spiral Inductors
152(1)
Isolating the Inductor
153(1)
The Use of Slotted Ground Shields and Inductors
154(1)
Basic Transformer Layouts in IC Technologies
154(3)
Multilevel Inductors
157(2)
Characterizing Transformers for Use in ICs
159(1)
On-Chip Transmission Lines
160(4)
Effect of Transmission Line
161(1)
Transmission Line Examples
161(3)
High-Frequency Measurement of On-Chip Passives and Some Common De-Embedding Techniques
164(1)
Packaging
165(6)
Other Packaging Techniques and Board Level Technology
168(1)
References
169(2)
LNA Design
171(68)
Introduction and Basic Amplifiers
171(10)
Common-Emitter/Source Amplifier (Driver)
171(4)
Simplified Expressions for Widely Separated Poles
175(1)
The Common-Base/Gate Amplifier (Cascode)
176(2)
The Common-Collector/Drain Amplifier (Emitter/Source Follower)
178(3)
Amplifiers with Feedback
181(5)
Common-Emitter/Source with Series Feedback (Emitter/Source Degeneration)
181(2)
The Common-Emitter/Source with Shunt Feedback
183(3)
Noise in Amplifiers
186(19)
Input Referred Noise Model of the Bipolar Transistor
186(2)
Noise Figure of the Common-Emitter Amplifier
188(2)
Noise Model of the CMOS Transistor
190(1)
Input Matching of LNAs for Low Noise
191(10)
Relationship Between Noise Figure and Bias Current
201(2)
Effect of the Cascode on Noise Figure
203(1)
Noise in the Common-Collector/Drain Amplifier
204(1)
Linearity in Amplifiers
205(9)
Exponential Nonlinearity in the Bipolar Transistor
205(6)
Nonlinearity in the CMOS Transistor
211(1)
Nonlinearity in the Output Impedance of the Bipolar Transistor
211(2)
High-Frequency Nonlinearity in the Bipolar Transistor
213(1)
Linearity in Common-Collector/Drain Configuration
213(1)
Stability
214(1)
Differential Amplifiers
215(5)
Bipolar Differential Pair
215(2)
Linearity in Bipolar Differential Pairs
217(1)
CMOS Differential Pair
218(1)
Linearity of the CMOS Differential Pair
219(1)
Low Voltage Topologies for LNAs and the Use of On-Chip Transformers
220(2)
DC Bias Networks
222(6)
Temperature Effects
223(1)
Temperature Independent Reference Generators
224(3)
Constant GM Biasing for CMOS
227(1)
Broadband LNA Design Example
228(3)
Distributed Amplifiers
231(8)
Trasmission Lines
233(2)
Steps in Designing the Distributed Amplifier
235(1)
References
236(1)
Selected Bibliography
237(2)
Mixers
239(52)
Introduction
239(1)
Mixing with Nonlinearity
239(1)
Basic Mixer Operation
239(1)
Transconductance-Controlled Mixer
240(2)
Double-Balanced Mixer
242(3)
Mixer with Switching of Upper Quad
245(5)
Why LO Switching?
246(1)
Picking the LO Level
246(2)
Analysis of Switching Modulator
248(2)
Mixer Noise
250(9)
Summary of Bipolar Mixer Noise Components
256(2)
Summary of CMOS Mixer Noise Components
258(1)
Linearity
259(3)
Desired Nonlinearity
259(1)
Undesired Nonlinearity
259(3)
Improving Isolation
262(1)
General Design Comments
262(7)
Sizing Transistors
263(1)
Increasing Gain
263(1)
Improvement of IP3
263(1)
Improving Noise Figure
264(1)
Effect of Bond Pads and the Package
264(1)
Matching, Bias Resistors, Gain
265(4)
Image-Reject and Single-Sideband Mixer
269(7)
Alternative Single-Sideband Mixers
270(1)
Generating 90° Phase Shift
271(3)
Image Rejection with Amplitude and Phase Mismatch
274(2)
Alternative Mixer Designs
276(15)
The Moore Mixer
277(1)
Mixers with Transformer Input
277(1)
Mixer with Simultaneous Noise and Power Match
277(2)
Mixers with Coupling Capacitors
279(1)
CMOS Mixer with Current Reuse
280(1)
Integrated Passive Mixer
280(1)
Subsampling Mixer
281(8)
References
289(1)
Selected Bibliography
290(1)
Voltage Controlled Oscillators
291(106)
Introduction
291(1)
The LC Resonator
291(1)
Adding Negative Resistance Through Feedback to the Resonator
292(2)
Popular Implementations of Feedback to the Resonator
294(1)
Configuration of the Amplifier (Colpitts or -Gm)
295(1)
Analysis of an Oscillator as a Feedback System
296(8)
Oscillator Closed-Loop Analysis
296(2)
Capacitor Ratios with Colpitts Oscillators
298(3)
Oscillator Open-Loop Analysis
301(2)
Simplified Loop Gain Estimates
303(1)
Negative Resistance Generated by the Amplifier
304(5)
Negative Resistance of the Colpitts Oscillator
304(1)
Negative Resistance for Series and Parallel Circuits
305(2)
Negative Resistance Analysis of -Gm Oscillator
307(2)
Comments on Oscillator Analysis
309(2)
Basic Differential Oscillator Topologies
311(1)
A Modified Common-Collector Colpitts Oscillator with Buffering
311(1)
Several Refinements to the -Gm Topology Using Bipolar Transistors
312(3)
The Effect of Parasitics on the Frequency of Oscillation
315(1)
Large-Signal Nonlinearity in the Transistor
316(1)
Bias Shifting During Startup
317(1)
Colpitts Oscillator Amplitude
318(2)
Gm Oscillator Amplitude
320(1)
Phase Noise
321(10)
Linear or Additive Phase Noise and Leeson's Formula
322(6)
Some Additional Notes About Low-Frequency Noise
328(1)
Nonlinear Noise
329(1)
Impulse Sensitivity Noise Analysis
330(1)
Making the Oscillator Tunable
331(16)
Low-Frequency Phase-Noise Upconversion Reduction Techniques
347(6)
Bank Switching
347(2)
gm Matching and Waveform Symmetry
349(1)
Differential Varactors and Differential Tuning
350(3)
VCO Automatic-Amplitude Control Circuits
353(9)
Supply Noise Filters in Oscillators, Example Circuit
362(1)
Ring Oscillators
363(13)
Quadrature Oscillators and Injection Locking
376(5)
Phase Shift of Injection Locked Oscillator
381(8)
Parallel Coupled Quadrature LC Oscillators
382(5)
Series Coupled Quadrature Oscillators
387(1)
Other Quadrature Generation Techniques
388(1)
Other Oscillators
389(8)
Multivibrators
389(1)
Crystal Oscillators
389(4)
References
393(2)
Selected Bibliography
395(2)
Frequency Synthesis
397(44)
Introduction
397(1)
Integer-N PLL Synthesizers
397(2)
PLL Components
399(6)
Voltage Controlled Oscillators (VCOs) and Dividers
399(1)
Phase Detectors
400(3)
The Loop Filter
403(2)
Continuous-Time Analysis for PLL Synthesizers
405(5)
Simplified Loop Equations
405(3)
PLL System Frequency Response and Bandwidth
408(1)
Complete Loop Transfer Function Including C2
409(1)
Discrete Time Analysis for PLL Synthesizers
410(2)
Transient Behavior of PLLs
412(17)
PLL Linear Transient Behavior
413(3)
Nonlinear Transient Behavior
416(6)
Various Noise Sources in PLL Synthesizers
422(2)
In-Band and Out-of-Band Phase Noise in PLL Synthesis
424(5)
Fractional-N PLL Frequency Synthesizers
429(12)
Fractional-N Synthesizer with a Dual Modulus Prescaler
431(1)
Fractional-N Synthesizer with Multimodulus Divider
432(2)
Fractional-N Spurious Components
434(2)
References
436(5)
Power Amplifiers
441(52)
Introduction
441(1)
Power Capability
441(1)
Efficiency Calculations
442(1)
Matching Considerations
443(1)
Matching to S22 Versus Matching to opt
443(1)
Class A, B, and C Amplifiers
444(19)
Class B Push-Pull Arrangements
452(1)
Models for Transconductance
453(10)
Class D Amplifiers
463(1)
Class E Amplifiers
464(6)
Analysis of Class E Amplifier
464(2)
Class E Equations
466(1)
Class E Equations for Finite Output Q
467(1)
Saturation Voltage and Resistance
467(1)
Transition Time
468(2)
Class F Amplifiers
470(5)
Variation on Class F: Second-Harmonic Peaking
472(1)
Variation on Class F: Quarter-Wave Transmission Lines
473(2)
Class G and H Amplifiers
475(1)
Summary of Amplifier Classes for RF Integrated Circuits
476(1)
AC Load Line
477(1)
Matching to Achieve Desired Power
478(2)
Transistor Saturation
480(1)
Current Limits
480(2)
Current Limits in Integrated Inductors
482(1)
Power Combining
482(1)
Thermal Runaway---Ballasting
483(2)
Breakdown Voltage and Biasing
485(1)
Packaging
486(1)
Effects and Implications of Nonlinearity
486(3)
Cross Modulation
486(1)
AM-to-PM Conversion
486(1)
Spectral Regrowth
487(1)
Linearization Techniques
487(1)
Feedforward
488(1)
Feedback
488(1)
Predistortion
489(1)
CMOS Power Amplifier Examples
489(4)
References
490(3)
About the Authors 493(2)
Index 495
John W. M. Rogers is an assistant professor in the department of electronics at Carleton University and a member of the Professional Engineers of Ontario. Dr. Rogers is also the coauthor of Integrated Circuit Design for High-Speed Frequency Synthesis (Artech House, 2006). He received his Ph.D. in electrical engineering from Carleton University. Calvin Plett is an associate professor in the department of electronics at Carleton University, where he earned his Ph.D. in electrical engineering. Dr. Plett is also the coauthor of Integrated Circuit Design for High-Speed Frequency Synthesis (Artech House, 2006). He is a member of the Professional Engineers of Ontario.