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VLSI-SoC: System-on-Chip in the Nanoscale Era Design, Verification and Reliability: 24th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016, Revised Selected Papers 1st ed. 2017 [Kõva köide]

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  • Formaat: Hardback, 233 pages, kõrgus x laius: 235x155 mm, kaal: 541 g, 129 Illustrations, black and white; XIV, 233 p. 129 illus., 1 Hardback
  • Sari: IFIP Advances in Information and Communication Technology 508
  • Ilmumisaeg: 01-Sep-2017
  • Kirjastus: Springer International Publishing AG
  • ISBN-10: 3319671030
  • ISBN-13: 9783319671031
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VLSI-SoC: System-on-Chip in the Nanoscale Era Design, Verification and Reliability: 24th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016, Revised Selected Papers 1st ed. 2017Suurem pilt
  • Formaat: Hardback, 233 pages, kõrgus x laius: 235x155 mm, kaal: 541 g, 129 Illustrations, black and white; XIV, 233 p. 129 illus., 1 Hardback
  • Sari: IFIP Advances in Information and Communication Technology 508
  • Ilmumisaeg: 01-Sep-2017
  • Kirjastus: Springer International Publishing AG
  • ISBN-10: 3319671030
  • ISBN-13: 9783319671031
Teised raamatud teemal:
Püsilink: https://www.kriso.ee/db/9783319671031.html
This book contains extended and revised versions of the best papers presented at the 24th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, held in Tallinn, Estonia, in September 2016.
The 11 papers included in the book were carefully reviewed and selected from the 36 full papers presented at the conference. The papers cover a wide range of topics in VLSI technology and advanced research. They address the latest scientific and industrial results and developments as well as future trends in the field of System-on-Chip (SoC) Design.
Enabling Internet-of-Things with Opportunities Brought by Emerging Devices, Circuits and Architectures
1(23)
Xueqing Li
Kaisheng Ma
Sumitha George
John Sampson
Vijaykrishnan Narayanan
Logic with Unipolar Memristors -- Circuits and Design Methodology
24(17)
Nimrod Wald
Elad Amrani
Avishay Drori
Shahar Kvatinsky
Robust Hybrid TFET-MOSFET Circuits in Presence of Process Variations and Soft Errors
41(19)
Maedeh Hemmat
Mehdi Kamal
Ali Afzali-Kusha
Massoud Pedram
Logic Synthesis for Silicon and Beyond-Silicon Multi-gate Pass-Logic Circuits
60(23)
Valerio Tenace
Andrea Calimera
Enrico Macii
Massimo Poncino
Digital Hardware Design Based on Metamodels and Model Transformations
83(25)
Johannes Schreiner
Wolfgang Ecker
Improving the Efficiency of Formal Verification: The Case of Clock-Domain Crossings
108(22)
Guillaume Plassan
Hans-Jorg Peter
Katell Morin-Allory
Shaker Sarwary
Dominique Borrione
Improving Stress Quality for SoC Using Faster-than-At-Speed Execution of Functional Programs
130(22)
Paolo Bernardi
Alberto Bosio
Giorgio Di Natale
Andrea Guerriero
Ernesto Sanchez
Federico Venini
Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping
152(21)
Valentino Peluso
Roberto G. Rizzo
Andrea Calimera
Enrico Macii
Massimo Alioto
Earth Mover's Distance as a Comparison Metric for Analog Behavior
173(19)
Alexander W. Rath
Sebastian Simon
Volkan Esen
Wolfgang Ecker
Approximate Matrix Inversion for Linear Pre-coders in Massive MIMO
192(21)
Syed Mohsin Abbas
Chi-Ying Tsui
A Novel Hardware-Oriented Stereo Matching Algorithm and Its Architecture Design in FPGA
213(20)
Yanzhe Li
Kai Huang
Luc Claesen
Author Index 233