With the end of Moore’s Law, Domain-Specific Architectures (DSA) have become a crucial mode of implementing future computing architectures. This book discusses the system-level design methodology of DSAs and their applications, providing a unified design process that guarantees functionality, performance, energy efficiency and real-time responsiveness for the target application.
DSAs often start from the domain-specific algorithms or applications, analyzing the characteristics of algorithmic applications such as computation, memory access, communication and proposing the heterogeneous accelerator architecture suitable for that particular application. This book places particular focus on accelerator hardware platforms and distributed systems for various novel applications such as machine learning, data mining, neural networks, graph algorithms, and also covers RISC-V open-source instruction sets. It briefly describes the system design methodology based on DSAs and presents the latest research results in academia around domain-specific acceleration architectures.
Providing cutting-edge discussion of big data and artificial intelligence scenarios in contemporary industry and typical DSA applications, this book appeals to industry professionals as well as academicians researching the future of computing in these areas.
This book explores the latest research in high performance domain-specific computer architectures for emerging applications, including Machine Learning and Neural Networks applications. The book discusses domain specific computing architectures and considers research issues related to the state-of-the art architectures in emerging domains.
Domain Specific Computing Architectures. Overview for Domain Specific Computing Architectures. xPU architectures for Artificial Intelligence. Distributed systems, GPU based Architecture. Reconfigurable and Custom accelerators using FPGA/CGRAs. Domain Specific memory architectures and devices. Processing-in-Memory techniques for Domain Specific Computing. Emerging Memory Techniques and Devices: RRAM, NVM, STT-RAM. 3D IC design principles for Memory Design. Hardware/Software Codesign Processing Techniques. Open Instruction Sets Architecture (RISC-V Paradigm). Agile computer architecture development. High Level Synthesis for Domain Specific ArchitecturesSection 4: Emerging ApplicationsChapter 11: Deep learning and neural networksChapter 12: Machine learning, data mining, and neuromorphic engineering
Chapter 13: Bioinformatics Applications
Dr. Chao Wang is a Professor with the University of Science and Technology of China, and also the Vice Dean of the School of Software Engineering. He serves as the Associate Editor of ACM TODAES and IEEE/ACM TCBB. Dr. Wang was the recipient of ACM China Rising Star Honorable Mention, and best IP nomination of DATE 2015, Best Paper Candidate of CODES+ISSS 2018. He is a senior member of ACM, senior member of IEEE, and distinguished member of CCF.
Rohkem infot Taylor & Francis e-raamatute kohta