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E-raamat: PIC16F1847 Microcontroller-Based Programmable Logic Controller: Intermediate Concepts [Taylor & Francis e-raamat]

(Department of Electrical and Electronics Engineering, Meliksah University in Kayseri, Turkey (Retired))
  • Formaat: 444 pages, 130 Tables, black and white; 386 Illustrations, black and white
  • Ilmumisaeg: 23-Oct-2020
  • Kirjastus: CRC Press
  • ISBN-13: 9780367506445
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  • Taylor & Francis e-raamat
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PIC16F1847 Microcontroller-Based Programmable Logic Controller: Intermediate ConceptsSuurem pilt
  • Formaat: 444 pages, 130 Tables, black and white; 386 Illustrations, black and white
  • Ilmumisaeg: 23-Oct-2020
  • Kirjastus: CRC Press
  • ISBN-13: 9780367506445
Teised raamatud teemal:
Taylor & Francis e-raamatudRohkem infot Taylor & Francis e-raamatute kohta
Raamatu kodulehekülg: https://www.taylorfrancis.com/books/9780367506445
The volume focusses on intermediate concepts of the PIC16F1847-Based PLC project, and covers arithmetical operation ability of PLCs, logical function performers and operations like AND, NAND, OR, NOR. Further, it explains shift and rotate macros moving bits in a register to right or left, and selection macros enabling one value to be selected from several given values according to certain criteria. Demultiplexer circuit is illustrated, which is used to send a signal to one of many devices. Finally, it explains decoder, priority encoder and conversion macros. All the concepts are supported using flowcharts. Aimed at researchers and graduate students in electrical engineering, power electronics, robotics and automation, sensors, this book:

Presents arithmetical and logical macros to carry out arithmetical and logical operations to be used for 8-bit or 16-bit variables and/or constant values.

Provides shift and rotate macros to do arithmetical or logical shift and rotate operations to be used for 8-bit or 16-bit variables.

Proposes selection macros to enable the user to do 8-bit or 16-bit move, load, selection, maximum, minimum, limiting, multiplexing and byte multiplexing operations.

Develops demultiplexer macros, decoder macros and priority encoder macros to be used as combinational circuits.

Presents conversion macros to provide functions to convert given data from one format to another one.
Prologue xiii
Preface xv
About the Author xvii
Background and Use of the Book xix
References xxvi
Chapter 1 Arithmetical Macros
1(52)
Introduction
1(1)
1.1 Macro "RladdR2"
2(1)
1.2 Macro "RladdR2_16"
3(2)
1.3 Macro "RaddK"
5(1)
1.4 Macro "RaddK_16"
6(1)
1.5 Macro "RlsubR2"
7(1)
1.6 Macro "RlsubR2_16"
8(2)
1.7 Macro "RsubK"
10(1)
1.8 Macro "RsubK_16"
10(2)
1.9 Macro "RlmulR2"
12(2)
1.10 Macro "DivU16by8"
14(1)
1.11 Macro "incR"
15(1)
1.12 Macro "incR_16"
16(1)
1.13 Macro "decR"
17(2)
1.14 Macro "decR_16"
19(1)
1.15 Macro "Hbit_CNT" (High Bit Counter)
19(11)
1.16 Macro "Lbit_CNT" (Low Bit Counter)
30(3)
1.17 Examples for Arithmetical Macros
33(18)
1.17.1 Example 1.1
34(3)
1.17.2 Example 1.2
37(1)
1.17.3 Example 1.3
38(1)
1.17.4 Example 1.4
39(3)
1.17.5 Example 1.5
42(1)
1.17.6 Example 1.6
43(1)
1.17.7 Example 1.7
44(1)
1.17.8 Example 1.8
44(4)
1.17.9 Example 1.9
48(3)
References
51(2)
Chapter 2 Logical Macros
53(32)
Introduction
53(1)
2.1 Macro "RlandR2"
53(3)
2.2 Macro "RandK"
56(1)
2.3 Macro "R1nandR2"
57(1)
2.4 Macro "RnandK"
58(2)
2.5 Macro "RlorR2"
60(3)
2.6 Macro "RorK"
63(1)
2.7 Macro "RlnorR2"
64(1)
2.8 Macro "RnorK"
65(1)
2.9 Macro "RlxorR2"
66(3)
2.10 Macro "RxorK"
69(2)
2.11 The Macro "RlxnorR2"
71(1)
2.12 Macro "RxnorK"
72(1)
2.13 Macro "invR"
73(3)
2.14 An Example for Logical Macros
76(9)
Chapter 3 Shift and Rotate Macros
85(112)
Introduction
85(1)
3.1 Macro "Ashift_R" (Arithmetic Shift Right Rin)
86(1)
3.2 Macro "Ashift_R_16" (Arithmetic Shift Right Rin)
87(2)
3.3 Macro "Lshift_R" (Logical Shift Right Rin)
89(1)
3.4 Macro "Lshift_R_16" (Logical Shift Right Rin)
90(3)
3.5 Macro "Lshift_L" (Logical Shift Left Rin)
93(1)
3.6 Macro "Lshift_L_16" (Logical Shift Left Rin)
94(3)
3.7 Macro "shift_R" (Shift Right Rin)
97(2)
3.8 Macro "shift_R_16" (Shift Right Rin)
99(2)
3.9 Macro "shift_L" (Shift Left Rin)
101(2)
3.10 Macro "shift_L_16" (Shift Left Rin)
103(2)
3.11 Macro "rotate_R" (Rotate Right Rin)
105(5)
3.12 Macro "rotate_R_16" (Rotate Right Rin)
110(3)
3.13 Macro "rotate_L" (Rotate Left Rin)
113(3)
3.14 Macro "rotate_L_16" (Rotate Left Rin)
116(3)
3.15 Macro "Swap"
119(3)
3.16 Examples for Shift and Rotate Macros
122(75)
3.16.1 Example 3.1
129(10)
3.16.2 Example 3.2
139(9)
3.16.3 Example 3.3
148(9)
3.16.4 Example 3.4
157(10)
3.16.5 Example 3.5
167(10)
3.16.6 Example 3.6
177(9)
3.16.7 Example 3.7
186(11)
Chapter 4 Selection Macros
197(124)
Introduction
197(1)
4.1 Macro "move_R" (Move)
198(1)
4.2 Macro "load_R" (Load)
198(3)
4.3 Macro "select" (Selection of One of Two 8-Bit Input Variables)
201(1)
4.4 Macro "select_16" (Selection of One of Two 16-Bit Input Variables)
201(2)
4.5 Macro "max_5" (Maximum in Five 8-Bit Variables)
203(5)
4.6 Macro "max_10" (Maximum in Ten 8-Bit Variables)
208(1)
4.7 Macro "max_N80" (Maximum in N 8-Bit Variables, N = 2, 3, ..., 80)
209(1)
4.8 Macro "max_N40_16" (Maximum in N 16-Bit Variables, N = 2, 3, ..., 40)
210(3)
4.9 Macro "max_N255" (Maximum in N 8-Bit Variables, N = 2, 3, ..., 255)
213(1)
4.10 Macro "max_N255_16" (Maximum in N 16-Bit Variables, N = 2, 3, ..., 255)
214(2)
4.11 Macro "min _5" (Minimum in Five 8-Bit Variables)
216(2)
4.12 Macro min_10" (Minimum in Ten 8-Bit Variables)
218(1)
4.13 Macro "min_N80" (Minimum in N 8-Bit Variables, N = 2, 3, ..., 80)
218(3)
4.14 Macro "min_N40_16" (Minimum in N 16-Bit Variables, N = 2, 3, ..., 40)
221(2)
4.15 Macro "min_N255" (Minimum in N 8-Bit Variables, N = 2,3, ..., 255)
223(2)
4.16 Macro "min_N255_16" (Minimum in N 16-Bit Variables, N = 2, 3, ..., 255)
225(2)
4.17 Macro "limiter"
227(1)
4.18 Macro "limiter_16"
228(1)
4.19 Multiplexer Macros
229(1)
4.20 Macro "mux_2_1"
230(1)
4.21 Macro "mux_2_1_E"
230(1)
4.22 Macro "mux_4_1"
231(1)
4.23 Macro "mux_4_1_E"
231(2)
4.24 Macro "mux_8_1"
233(1)
4.25 Macro "mux_8_1_E"
233(1)
4.26 Macro "mux_16_1"
234(1)
4.27 Macro "mux_16_1_E"
235(1)
4.28 Macro "B_mux_2_1_E"
236(1)
4.29 Macro "B_mux_4_1_E"
237(1)
4.30 Macro "B_mux_8_1_E"
238(3)
4.31 Examples for Selection Macros
241(80)
4.31.1 Example 4.1
243(4)
4.31.2 Example 4.2
247(1)
4.31.3 Example 4.3
248(1)
4.31.4 Example 4.4
249(3)
4.31.5 Example 4.5
252(9)
4.31.6 Example 4.6
261(2)
4.31.7 Example 4.7
263(5)
4.31.8 Example 4.8
268(7)
4.31.9 Example 4.9
275(4)
4.31.10 Example 4.10
279(5)
4.31.11 Example 4.11
284(7)
4.31.12 Example 4.12
291(5)
4.31.13 Example 4.13
296(7)
4.31.14 Example 4.14
303(3)
4.31.15 Example 4.15
306(2)
4.31.16 Example 4.16
308(1)
4.31.17 Example 4.17
308(2)
4.31.18 Example 4.18
310(1)
4.31.19 Example 4.19
310(3)
4.31.20 Example 4.20
313(3)
4.31.21 Example 4.21
316(2)
4.31.22 Example 4.22
318(3)
Chapter 5 Demultiplexer Macros
321(58)
Introduction
321(1)
5.1 Macro "Dmux_1_2" (1×2 DMUX)
322(1)
5.2 Macro "Dmux_1_2_E" (1×2 DMUX with Enable Input)
322(1)
5.3 Macro "Dmux_1_4" (1×4 DMUX)
323(1)
5.4 Macro "Dmux_1_4_E" (1×4 DMUX with Enable Input)
323(2)
5.5 Macro "Dmux_1_8" (1×8 DMUX)
325(1)
5.6 Macro "Dmux_1_8_E" (1×8 DMUX with Enable Input)
325(5)
5.7 Macro "Dmux_1_16" (1×16 DMUX)
330(1)
5.8 Macro "Dmux_1_16_E" (1×16 DMUX with Enable Input)
330(1)
5.9 Macro "B_Dmux_1_2_E" (1×2 Byte DeMultiplexer with Enable Input)
331(3)
5.10 Macro "B_Dmux_1_4_E" (1×4 Byte DeMultiplexer with Enable Input)
334(2)
5.11 Macro "B_Dmux_1_8_E" (1×8 Byte DeMultiplexer with Enable Input)
336(3)
5.12 Macro "Dispatcher_1_8_E" (1×8 Dispatcher with Enable Input)
339(2)
5.13 Macro "Patcher_8_1_E" (8×1 Patcher with Enable Input)
341(5)
5.14 Examples for Demultiplexer Macros
346(33)
5.14.1 Example 5.1
353(4)
5.14.2 Example 5.2
357(2)
5.14.3 Example 5.3
359(2)
5.14.4 Example 5.4
361(4)
5.14.5 Example 5.5
365(2)
5.14.6 Example 5.6
367(2)
5.14.7 Example 5.7
369(3)
5.14.8 Example 5.8
372(4)
5.14.9 Example 5.9
376(3)
Chapter 6 Conversion Macros
379(70)
Introduction
379(1)
6.1 Macro "Conv_UsInt_2_BCD_U" (Unsigned Short Integer to Unpacked BCD Conversion)
380(3)
6.2 Macro "Conv_UsInt_2_BCD_P" (Unsigned Short Integer to Packed BCD Conversion)
383(2)
6.3 Macro "Conv_UInt_2_BCD_U" (Unsigned Integer to Unpacked BCD Conversion)
385(1)
6.4 Macro "Conv_UInt_2_BCD_P" (Unsigned Integer to Packed BCD Conversion)
386(3)
6.5 Macro "Conv_BCD_U_2_UInt" (5-Digit Unpacked BCD to Unsigned Integer Conversion)
389(3)
6.6 Macro "Conv_BCD_P_2_UInt" (5-Digit Packed BCD to Unsigned Integer Conversion)
392(3)
6.7 Seven-Segment LED Displays
395(4)
6.8 Macro "Segment_CCD" (Segment_CCD Instruction)
399(7)
6.9 Macro "Segment_CAD" (Segment_CAD Instruction)
406(4)
6.10 Macro "Conv_Bin_2_Gray" (Binary to Gray Code Conversion)
410(2)
6.11 Macro "Conv_Bin_2_Gray_16" (Binary to Gray Code Conversion)
412(2)
6.12 Macro "Conv_Gray_2_Bin" (Gray Code to Binary Conversion)
414(4)
6.13 Macro "Conv_Gray_2_Bin_16" (Gray Code to Binary Conversion)
418(2)
6.14 Examples for Conversion Macros
420(28)
6.14.1 Example 6.1
424(3)
6.14.2 Example 6.2
427(1)
6.14.3 Example 6.3
428(2)
6.14.4 Example 6.4
430(1)
6.14.5 Example 6.5
431(2)
6.14.6 Example 6.6
433(1)
6.14.7 Example 6.7
434(1)
6.14.8 Example 6.8
435(1)
6.14.9 Example 6.9
436(1)
6.14.10 Example 6.10
437(2)
6.14.11 Example 6.11
439(2)
6.14.12 Example 6.12
441(7)
References
448(1)
About the Downloadable Files for Intermediate Concepts 449(2)
Index 451
Murat Uzam was borned in Söke, Turkey, in 1968. He received the B.Sc. and M.Sc. degrees from Electrical Engineering Department, Yldz Technical University, stanbul, Turkey, 1989 and 1991, respectively, and the Ph.D. degree from University of Salford, Salford, U.K., in 1998. He was with Nigde University, Turkey, from 1993 to 2010 in the Department of Electrical and Electronics Engineering as a Research Assistant, Assistant Professor, Associate Professor and Professor. He was a Professor in the Department of Electrical and Electronics Engineering, at Melikah University in Kayseri, Turkey from 2011 to 2016. He was a Visiting Researcher with INRIA, University of Metz and University of Rennes, France, in 1999, with University of Toronto, Toronto, ON, Canada, in 2003, and with Xidian University, Xian, China, in 2013, 2015 and 2019. Since 15 April 2020, he has been serving as a Professor in the Department of Electrical and Electronics Engineering, at Yozgat Bozok University in Yozgat, Turkey. He has published 50 conference papers and 85 journal and magazine papers, 70 of which are indexed by Science Citation Index Expanded (SCIE). He has published two books in Turkish and one book in English by CRC Press (Taylor & Francis Group). According to Publons, his H-Index is 15 and his papers have been cited 1269 times by the papers indexed in the SCIE. His current research interests include design and implementation of discrete event control systems modeled by Petri nets and, in particular, deadlock prevention/liveness enforcing in flexible manufacturing systems, programmable logic controllers (PLCs), microcontrollers (especially PIC microcontrollers), and design of microcontroller-based PLCs. Dr. Uzam has been serving as a reviewer for prestigious journals and conferences. According to Publons, the number of his verified reviews is 70.
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