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E-raamat: Real-Time Embedded Systems [Wiley Online]

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Real-Time Embedded SystemsSuurem pilt
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Wiley Online e-raamatudRohkem infot Wiley Online kohta
Raamatu kodulehekülg: https://onlinelibrary.wiley.com/doi/book/10.1002/9781119420712
Offering comprehensive coverage of the convergence of real-time embedded systems scheduling, resource access control, software design and development, and high-level system modeling, analysis and verification 

Following an introductory overview, Dr. Wang delves into the specifics of hardware components, including processors, memory, I/O devices and architectures, communication structures, peripherals, and characteristics of real-time operating systems. Later chapters are dedicated to real-time task scheduling algorithms and resource access control policies, as well as priority-inversion control and deadlock avoidance. Concurrent system programming and POSIX programming for real-time systems are covered, as are finite state machines and Time Petri nets. Of special interest to software engineers will be the chapter devoted to model checking, in which the author discusses temporal logic and the NuSMV model checking tool, as well as a chapter treating real-time software design with UML. The final portion of the book explores practical issues of software reliability, aging, rejuvenation, security, safety, and power management. In addition, the book:





Explains real-time embedded software modeling and design with finite state machines, Petri nets, and UML, and real-time constraints verification with the model checking tool, NuSMV Features real-world examples in finite state machines, model checking, real-time system design with UML, and more Covers embedded computer programing, designing for reliability, and designing for safety Explains how to make engineering trade-offs of power use and performance Investigates practical issues concerning software reliability, aging, rejuvenation, security, and power management

Real-Time Embedded Systems is a valuable resource for those responsible for real-time and embedded software design, development, and management. It is also an excellent textbook for graduate courses in computer engineering, computer science, information technology, and software engineering on embedded and real-time software systems, and for undergraduate computer and software engineering courses.
Preface xiii
Book Layout xv
Acknowledgments xvii
1 Introduction to Real-Time Embedded Systems
1(16)
1.1 Real-Time Embedded Systems
1(2)
1.2 Example: Automobile Antilock Braking System
3(7)
1.2.1 Slip Rate and Brake Force
3(1)
1.2.2 ABS Components
4(1)
1.2.2.1 Sensors
4(1)
1.2.2.2 Valves and Pumps
5(2)
1.2.2.3 Electrical Control Unit
7(1)
1.2.3 ABS Control
8(2)
1.3 Real-Time Embedded System Characteristics
10(3)
1.3.1 System Structure
10(1)
1.3.2 Real-Time Response
10(1)
1.3.3 Highly Constrained Environments
11(1)
1.3.4 Concurrency
12(1)
1.3.5 Predictability
12(1)
1.3.6 Safety and Reliability
13(1)
1.4 Hard and Soft Real-Time Embedded Systems
13(4)
Exercises
14(1)
Suggestions for Reading
15(1)
References
15(2)
2 Hardware Components
17(16)
2.1 Processors
17(6)
2.1.1 Microprocessors
17(2)
2.1.2 Microcontrollers
19(1)
2.1.3 Application-Specific Integrated Circuits (ASICs)
19(1)
2.1.4 Field-Programmable Gate Arrays (FPGAs)
19(1)
2.1.5 Digital Signal Processors (DSPs)
20(1)
2.1.6 Application-Specific Instruction Set Processors (ASIPs)
20(1)
2.1.7 Multicore Processors
20(1)
2.1.8 Von Neumann Architecture and Harvard Architecture
21(1)
2.1.9 Complex Instruction Set Computing and Reduced Instruction Set Computing
22(1)
2.2 Memory and Cache
23(3)
2.2.1 Read-Only Memory (ROM)
23(1)
2.2.2 Random-Access Memory (RAM)
24(1)
2.2.3 Cache Memory
24(2)
2.3 I/O Interfaces
26(1)
2.4 Sensors and Actuators
27(2)
2.5 Timers and Counters
29(4)
Exercises
30(1)
Suggestions for Reading
31(1)
References
31(2)
3 Real-Time Operating Systems
33(20)
3.1 Main Functions of General-Purpose Operating Systems
33(9)
3.1.1 Process Management
34(2)
3.1.2 Memory Management
36(3)
3.1.3 Interrupts Management
39(1)
3.1.4 Multitasking
39(1)
3.1.5 File System Management
39(2)
3.1.6 I/O Management
41(1)
3.2 Characteristics of RTOS Kernels
42(6)
3.2.1 Clocks and Timers
42(2)
3.2.2 Priority Scheduling
44(1)
3.2.3 Intertask Communication and Resource Sharing
45(1)
3.2.3.1 Real-Time Signals
45(1)
3.2.3.2 Semaphores
46(1)
3.2.3.3 Message Passing
46(1)
3.2.3.4 Shared Memory
46(1)
3.2.4 Asynchronous I/O
47(1)
3.2.5 Memory Locking
47(1)
3.3 RTOS Examples
48(5)
3.3.1 LynxOS
48(1)
3.3.2 OSE
49(1)
3.3.3 QNX
49(1)
3.3.4 VxWorks
49(1)
3.3.5 Windows Embedded Compact
50(1)
Exercises
50(2)
Suggestions for Reading
52(1)
References
52(1)
4 Task Scheduling
53(46)
4.1 Tasks
53(6)
4.1.1 Task Specification
54(2)
4.1.2 Task States
56(2)
4.1.3 Precedence Constraints
58(1)
4.1.4 Task Assignment and Scheduling
59(1)
4.2 Clock-Driven Scheduling
59(10)
4.2.1 Structured Clock-Driven Scheduling
62(1)
4.2.1.1 Frames
62(3)
4.2.1.2 Task Slicing
65(1)
4.2.2 Scheduling Aperiodic Tasks
66(2)
4.2.3 Scheduling Sporadic Tasks
68(1)
4.3 Round-Robin Approach
69(1)
4.4 Priority-Driven Scheduling Algorithms
70(19)
4.4.1 Fixed-Priority Algorithms
70(2)
4.4.1.1 Schedulability Test Based on Time Demand Analysis
72(4)
4.4.1.2 Deadline-Monotonic Algorithm
76(1)
4.4.2 Dynamic-Priority Algorithms
76(1)
4.4.2.1 Earliest-Deadline-First (EDF) Algorithm
76(2)
4.4.2.2 Optimality of EDF
78(4)
4.4.3 Priority-Driven Scheduling of Aperiodic and Sporadic Tasks
82(1)
4.4.3.1 Scheduling of Aperiodic Tasks
82(3)
4.4.3.2 Scheduling of Sporadic Tasks
85(1)
4.4.4 Practical Factors
85(1)
4.4.4.1 Nonpreemptivity
85(1)
4.4.4.2 Self-Suspension
86(1)
4.4.4.3 Context Switches
87(1)
4.4.4.4 Schedulability Test
87(2)
4.5 Task Assignment
89(10)
4.5.1 Bin-Packing Algorithms
89(1)
4.5.1.1 First-Fit Algorithm
90(1)
4.5.1.2 First-Fit Decreasing Algorithm
91(1)
4.5.1.3 Rate-Monotonic First-Fit (RMFF) Algorithm
91(1)
4.5.2 Assignment with Communication Cost
92(2)
Exercises
94(3)
Suggestions for Reading
97(1)
References
97(2)
5 Resource Sharing and Access Control
99(28)
5.1 Resource Sharing
99(4)
5.1.1 Resource Operation
100(1)
5.1.2 Resource Requirement Specification
100(1)
5.1.3 Priority Inversion and Deadlocks
101(2)
5.1.4 Resource Access Control
103(1)
5.2 Nonpreemptive Critical Section Protocol
103(3)
5.3 Priority Inheritance Protocol
106(5)
5.3.1 Rules of Priority Inheritance Protocol
106(3)
5.3.2 Properties of Priority Inheritance Protocol
109(2)
5.4 Priority Ceiling Protocol
111(8)
5.4.1 Rules of Priority Ceiling Protocol
112(2)
5.4.2 Properties of Priority Ceiling Protocol
114(2)
5.4.3 Worst-Case Blocking Time
116(3)
5.5 Stack-Sharing Priority Ceiling Protocol
119(8)
5.5.1 Rules of Stack-Sharing Priority Ceiling Protocol
119(2)
5.5.2 Properties of Stack-Sharing Priority Ceiling Protocol
121(1)
Exercises
122(3)
Suggestion for Reading
125(1)
References
125(2)
6 Concurrent Programming
127(52)
6.1 Introduction
127(1)
6.2 POSIX Threads
128(5)
6.3 Synchronization Primitives
133(15)
6.3.1 Race Conditions and Critical Sections
133(1)
6.3.2 Mutex
134(3)
6.3.3 Condition Variables
137(5)
6.3.4 Semaphores
142(6)
6.4 Communication among Tasks
148(14)
6.4.1 Message Queues
149(6)
6.4.2 Shared Memory
155(2)
6.4.3 Shared Memory Protection
157(5)
6.5 Real-Time Facilities
162(17)
6.5.1 Real-Time Signals
162(1)
6.5.1.1 Blocking Signals
163(1)
6.5.1.2 Dealing with Signals
164(1)
6.5.2 Timers
165(4)
6.5.3 Implement Periodic Tasks
169(1)
6.5.3.1 Using sleep() Function
169(3)
6.5.3.2 Using Timers
172(1)
6.5.4 Implement an Application with Multiple Periodic Tasks
173(1)
Exercises
173(4)
Suggestions for Reading
177(1)
References
177(2)
7 Finite-State Machines
179(18)
7.1 Finite State Machine Basics
179(2)
7.2 Deterministic Finite Automation (DFA)
181(7)
7.2.1 Moore Machines
182(2)
7.2.2 Mealy Machines
184(4)
7.3 Nondeterministic Finite Automation
188(1)
7.4 Programming Finite-State Machines
188(9)
Exercises
191(3)
Suggestions for Reading
194(1)
References
195(2)
8 UML State Machines
197(22)
8.1 States
198(2)
8.2 Transitions
200(1)
8.3 Events
201(1)
8.4 Composite States
202(4)
8.4.1 Hierarchy
203(2)
8.4.2 Orthogonality
205(1)
8.4.3 Submachine States
206(1)
8.5 Pseudostates
206(5)
8.5.1 History Pseudostates
206(2)
8.5.2 Entry and Exit Points
208(2)
8.5.3 Fork and Join Pseudostates
210(1)
8.5.4 Terminate Pseudostates
210(1)
8.6 UML State Machine of Antilock Braking System
211(8)
Exercises
215(2)
Suggestions for Reading
217(1)
References
217(2)
9 Timed Petri Nets
219(34)
9.1 Petri Net Definition
219(6)
9.1.1 Transition Firing
221(1)
9.1.2 Modeling Power
222(3)
9.2 Petri Net Properties
225(9)
9.2.1 Behavioral Properties
225(1)
9.2.1.1 Reachability
225(1)
9.2.1.2 ω Markings
226(1)
9.2.1.3 Reachability Analysis Algorithm
227(2)
9.2.1.4 Boundedness and Safeness
229(1)
9.2.1.5 Liveness
229(1)
9.2.2 Structural Properties
230(1)
9.2.2.1 T-Invariants and S-Invariants
230(3)
9.2.2.2 Siphons and Traps
233(1)
9.3 Timed Petri Nets
234(19)
9.3.1 Deterministic Timed Petri Nets
234(3)
9.3.1.1 Performance Evaluation Based on DTPNs
237(3)
9.3.2 Time Petri Nets
240(1)
9.3.2.1 States in a Time Petri Net
241(1)
9.3.2.2 Enabling and Firing Conditions of Transitions
242(1)
9.3.2.3 Firing Rules
243(1)
Exercises
244(6)
Suggestions for Reading
250(1)
References
251(2)
10 Model Checking
253(40)
10.1 Introduction to Model Checking
253(1)
10.2 Temporal Logic
254(15)
10.2.1 Linear Temporal Logic
256(1)
10.2.1.1 Syntax of LTL
256(1)
10.2.1.2 Parse Trees for LTL Formulas
257(1)
10.2.1.3 Semantics of LTL
258(4)
10.2.1.4 Equivalencies of LTL Formulas
262(1)
10.2.1.5 System Property Specification
263(1)
10.2.2 Computation Tree logic
264(1)
10.2.2.1 Syntax of CTL
264(1)
10.2.2.2 Semantics of CTL
265(3)
10.2.2.3 Equivalencies of CTL Formulas
268(1)
10.2.3 LTL versus CTL
268(1)
10.3 The NuSMV Model Checking Tool
269(10)
10.3.1 Description Language
269(1)
10.3.1.1 Single-Module SMV Program
269(2)
10.3.1.2 Multimodule SMV Program
271(2)
10.3.1.3 Asynchronous Systems
273(1)
10.3.2 Specifications
274(1)
10.3.3 Running NuSMV
275(4)
10.4 Real-Time Computation Tree Logic
279(14)
Exercises
285(5)
Suggestions for Reading
290(1)
References
290(3)
11 Practical Issues
293(12)
11.1 Software Reliability
293(3)
11.1.1 Software Faults
293(1)
11.1.2 Reliability Measurement
294(1)
11.1.3 Improving Software Reliability
295(1)
11.1.3.1 Fault Avoidance
295(1)
11.1.3.2 Fault Removal
295(1)
11.1.3.3 Fault Tolerance
295(1)
11.1.3.4 Fault Recovery
296(1)
11.2 Software Aging and Rejuvenation
296(1)
11.3 Security
297(3)
11.3.1 Challenges
297(1)
11.3.2 Common Vulnerabilities
298(1)
11.3.3 Secure Software Design
299(1)
11.4 Safety
300(1)
11.5 Power Conservation
301(4)
Suggestions for Reading
302(1)
References
302(3)
Index 305
Jiacun Wang Ph.D. is a Professor of Software Engineering at Monmouth University, NJ, USA. He is a former member of the scientific staff at Nortel Networks where he worked on embedded software for mobility management of 3G telecommunication systems. He is the author of Timed Petri Nets: Theory and Application (Kluwer 1998) and editor of Handbook of Finite State Based Models and Applications (CRC 2012). He is a senior member of IEEE.
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