Preface |
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xv | |
Acknowledgments |
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xix | |
Dedication |
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xxi | |
Acronyms |
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xxiii | |
Part I: Introduction |
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1 | (128) |
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Chapter 1 Introduction to Embedded and Real-Time Systems |
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3 | (12) |
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3 | (2) |
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5 | (3) |
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1.2.1 Soft Real-Time Systems |
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5 | (1) |
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1.2.2 Hard Real-Time Systems |
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6 | (1) |
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1.2.3 Spectrum of Real-Time Systems |
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7 | (1) |
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1.3 Case Study: Radar System |
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8 | (5) |
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13 | (2) |
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Chapter 2 Cross-Platform Development |
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15 | (26) |
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2.1 Cross-Platform Development Process |
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16 | (1) |
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2.2 Hardware Architecture |
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17 | (1) |
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18 | (7) |
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18 | (1) |
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2.3.2 System Programming Language C/C++ |
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18 | (7) |
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2.3.3 Test Hardware-Independent Modules |
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25 | (1) |
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25 | (13) |
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2.4.1 Cross-Development Toolchain |
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25 | (3) |
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2.4.2 Executable and Linking Format |
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28 | (6) |
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34 | (2) |
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2.4.4 Case Study: Building a QNX Image |
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36 | (2) |
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2.5 Transfer Executable File Object to Target |
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38 | (1) |
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2.6 Integrated Testing on Target |
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39 | (1) |
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39 | (1) |
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40 | (1) |
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Chapter 3 Microprocessor Primer |
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41 | (44) |
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3.1 Introduction to Microprocessors |
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42 | (6) |
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3.1.1 Commonly Used Microprocessors |
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42 | (2) |
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3.1.2 Microprocessor Characteristics |
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44 | (4) |
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48 | (10) |
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3.2.1 Memory Organization |
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48 | (4) |
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52 | (2) |
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54 | (3) |
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57 | (1) |
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58 | (10) |
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3.3.1 Memory Organization |
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60 | (1) |
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3.3.2 Separate I/O Address Space |
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61 | (3) |
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3.3.3 Memory Address Space |
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64 | (1) |
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65 | (3) |
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68 | (9) |
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3.4.1 Bus State Transition |
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71 | (4) |
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3.4.2 Memory Organization |
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75 | (2) |
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77 | (4) |
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78 | (3) |
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81 | (4) |
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85 | (34) |
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4.1 Introduction to Interrupts |
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86 | (1) |
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86 | (9) |
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4.2.1 Nonvectored Interrupting |
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87 | (1) |
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4.2.2 PIC and Vectored Interrupting |
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88 | (7) |
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95 | (1) |
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96 | (1) |
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4.5 Design Patterns for ISRs |
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97 | (7) |
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4.5.1 General ISR Design Pattern |
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97 | (1) |
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4.5.2 ISR with a Server Task |
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98 | (1) |
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99 | (1) |
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100 | (1) |
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4.5.5 Data Sharing with ISRs |
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101 | (3) |
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4.6 Interrupt Response Time |
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104 | (1) |
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105 | (6) |
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4.7.1 Hardware Interrupts |
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108 | (2) |
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4.7.2 Put It All Together |
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110 | (1) |
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4.8 Case Study: ARM Processor |
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111 | (6) |
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4.8.1 Hardware Interrupts |
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113 | (2) |
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4.8.2 Put It All Together |
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115 | (2) |
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117 | (2) |
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Chapter 5 Embedded System Boot Process |
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119 | (10) |
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119 | (1) |
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120 | (3) |
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5.2.1 Load Embedded Software |
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120 | (2) |
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5.2.2 Prepare Embedded Software for Execution |
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122 | (1) |
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5.3 Case Study: AT91SAM9G45 Boot Process |
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123 | (1) |
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5.4 Load ELF Objects Embedded Within an OS Image |
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124 | (1) |
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5.5 Case Study: Boot Process of QNX-based Embedded Systems |
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125 | (2) |
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127 | (2) |
Part II: Real-Time System Modeling |
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129 | (172) |
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Chapter 6 Fundamental UML Structural Modeling |
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131 | (54) |
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6.1 Unified Modeling Language |
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132 | (1) |
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6.2 Class Diagram and Class Modeling |
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133 | (33) |
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136 | (5) |
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6.2.2 Instance-Level Relationships |
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141 | (15) |
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6.2.3 Dependency Relationships |
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156 | (5) |
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161 | (5) |
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6.3 Class Modeling Principles |
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166 | (11) |
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166 | (1) |
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167 | (3) |
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6.3.3 Minimum Information Redundancy |
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170 | (3) |
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173 | (4) |
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177 | (1) |
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177 | (6) |
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179 | (1) |
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180 | (3) |
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183 | (2) |
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Chapter 7 Architecture Modeling in UML |
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185 | (18) |
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7.1 Levels of Architectural Abstraction |
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185 | (1) |
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7.2 UML Structure Diagram |
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186 | (6) |
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192 | (3) |
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195 | (4) |
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7.4.1 Class Diagram Versus Subsystem Diagram |
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197 | (2) |
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7.5 Modeling a Complete System |
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199 | (1) |
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200 | (1) |
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201 | (2) |
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Chapter 8 Fundamental UML Behavioral Modeling |
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203 | (20) |
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8.1 Use Case Diagram and Use Case Modeling |
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203 | (7) |
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203 | (4) |
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8.1.2 Use Case Descriptions |
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207 | (2) |
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209 | (1) |
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210 | (4) |
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214 | (7) |
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221 | (2) |
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Chapter 9 Modeling Stateful Behaviors in UML |
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223 | (24) |
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9.1 Basics of a State Machine Diagram |
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223 | (7) |
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224 | (1) |
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9.1.2 Transitions and Events |
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224 | (2) |
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226 | (2) |
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9.1.4 A Network Protocol Modeled by State Machines |
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228 | (2) |
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230 | (4) |
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9.2.1 Entry Point, Exit Point, and History |
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230 | (3) |
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233 | (1) |
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9.3 Inheritance of State Behavior |
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234 | (2) |
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9.4 Stateful Object Timing Diagrams |
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236 | (1) |
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9.5 Example: Modeling Stateful Behavior of a Radar System |
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237 | (8) |
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9.5.1 Modeling the Transceiver |
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239 | (2) |
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9.5.2 Modeling the Link Driver |
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241 | (2) |
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9.5.3 Modeling the Command Messenger |
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243 | (2) |
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245 | (2) |
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Chapter 10 Real-Time UML: General Resource Modeling |
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247 | (24) |
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10.1 Real-Time UML Profile |
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247 | (4) |
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10.1.1 Meta Modeling, UML Stereotypes, and Tags |
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248 | (3) |
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251 | (9) |
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10.2.1 UML Core Resource Model |
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252 | (2) |
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10.2.2 Action and Action Execution |
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254 | (1) |
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10.2.3 UML Stereotypes for Protected Resources |
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255 | (2) |
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257 | (2) |
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10.2.5 Resource-Client Graph |
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259 | (1) |
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260 | (6) |
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10.3.1 The Notion of Time |
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260 | (1) |
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261 | (3) |
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10.3.3 Time Modeling Stereotypes |
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264 | (2) |
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10.4 Concurrency Modeling |
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266 | (4) |
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270 | (1) |
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Chapter 11 Real-Time UML: Model Analysis |
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271 | (30) |
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11.1 Elicitation of Timing Constraints |
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271 | (4) |
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11.2 RT-UML Profile Schedulability Modeling Subprofile |
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275 | (11) |
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11.2.1 RT-UML Profile Metaconcepts for Schedulability Analysis |
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275 | (6) |
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11.2.2 Schedulability Stereotypes |
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281 | (3) |
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11.2.3 Using the Schedulability Subprofile |
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284 | (2) |
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11.3 RT-UML Profile Performance Modeling Subprofile |
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286 | (10) |
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11.3.1 RT-UML Profile Metaconcepts for Performance Analysis |
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286 | (3) |
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11.3.2 Performance Stereotypes |
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289 | (2) |
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11.3.3 Using the Performance Subprofile |
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291 | (5) |
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296 | (5) |
Part III: Real-Time System Design |
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301 | (170) |
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Chapter 12 Software Architectures for Real-Time Embedded Systems |
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303 | (36) |
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304 | (6) |
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12.1.1 Worst-Case Task Execution Time |
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304 | (2) |
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12.1.2 Task Specification |
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306 | (1) |
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12.1.3 Task Timing Diagrams |
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306 | (3) |
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12.1.4 Worst-Case Response Time |
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309 | (1) |
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12.1.5 Task Implementation |
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310 | (1) |
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12.2 Round-Robin Architecture |
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310 | (14) |
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12.2.1 Case Study: Body Thermometer |
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310 | (10) |
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12.2.2 General Round-Robin Architecture |
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320 | (2) |
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12.2.3 Worst-Case Event Response Time |
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322 | (2) |
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12.3 Round Robin with Interrupts |
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324 | (9) |
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12.3.1 Case Study: The Simon Game |
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324 | (4) |
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12.3.2 General Architecture |
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328 | (3) |
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12.3.3 Worst-Case Event Response Time |
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331 | (2) |
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12.4 Queue-Based Architecture |
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333 | (4) |
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12.4.1 Nonpreemptive FIFO Queue |
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334 | (1) |
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12.4.2 Nonpreemptive Priority Queue |
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335 | (2) |
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337 | (2) |
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Chapter 13 POSIX and RTOS |
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339 | (30) |
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13.1 Introduction to POSIX |
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339 | (12) |
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13.1.1 POSIX Processes and Threads |
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340 | (2) |
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13.1.2 POSIX Real-Time Extensions |
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342 | (8) |
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13.1.3 POSIX Compliance and Conformance |
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350 | (1) |
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13.2 Task Statics and Dynamics |
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351 | (4) |
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13.2.1 General Task Structure |
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351 | (2) |
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13.2.2 Task State Transition |
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353 | (2) |
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355 | (3) |
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13.4 POSIX Real-Time Scheduling Policies |
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358 | (6) |
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13.4.1 FIFO Scheduling Policy |
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359 | (1) |
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13.4.2 Round-Robin Scheduling Policy |
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360 | (1) |
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13.4.3 Sporadic Server Scheduling Policy |
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361 | (3) |
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13.5 Other Real-Time Scheduling Policies |
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364 | (4) |
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13.5.1 Minimum Laxity First |
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364 | (1) |
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13.5.2 Earliest Deadline First |
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365 | (1) |
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13.5.3 Scheduling with Deadline-Monotonic Assignment |
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366 | (1) |
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13.5.4 Scheduling with Rate-Monotonic Assignment |
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367 | (1) |
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368 | (1) |
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369 | (30) |
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14.1 Introduction to Multitasking |
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369 | (1) |
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370 | (11) |
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14.2.1 Task Identification |
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371 | (4) |
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14.2.2 Task Transformation |
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375 | (5) |
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14.2.3 Task Parameter Estimation |
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380 | (1) |
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14.3 Multitask Resource Sharing |
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381 | (5) |
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14.3.1 Resource Deadlocks |
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383 | (1) |
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14.3.2 Priority Inversion |
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384 | (2) |
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14.4 Addressing Resource Deadlocks |
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386 | (4) |
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14.4.1 Deadlock Prevention |
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386 | (1) |
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14.4.2 Deadlock Detection |
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387 | (1) |
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14.4.3 Deadlock Avoidance |
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388 | (2) |
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14.5 Addressing Priority Inversion |
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390 | (7) |
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14.5.1 Priority Inheritance Protocol |
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391 | (1) |
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14.5.2 Highest Locker Protocol |
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392 | (2) |
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14.5.3 Priority Ceiling Protocol |
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394 | (3) |
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397 | (2) |
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Chapter 15 Real-Time Scheduling: Clock-Driven Approach |
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399 | (20) |
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15.1 Introduction to Cyclic Scheduling |
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399 | (3) |
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400 | (1) |
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15.1.2 Preemptable Aperiodic Jobs |
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401 | (1) |
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15.2 Ad-hoc Clock-Driven Scheduling |
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402 | (3) |
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15.2.1 Ad-hoc Clock-Driven Scheduler |
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403 | (1) |
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15.2.2 Execution Overhead |
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404 | (1) |
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15.3 Frame-Based Scheduling |
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405 | (7) |
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15.3.1 Constraints on Frame Size |
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405 | (4) |
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15.3.2 Robust Frame-Based Schedule |
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409 | (2) |
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15.3.3 Frame-Based Scheduler |
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411 | (1) |
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15.4 Scheduling Aperiodic Jobs |
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412 | (2) |
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414 | (3) |
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417 | (2) |
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Chapter 16 Real-Time Scheduling: Rate-Monotonic Approach |
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419 | (30) |
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419 | (2) |
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421 | (3) |
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16.3 Rate-Monotonic Analysis |
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424 | (2) |
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16.4 Completion-Time Test |
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426 | (3) |
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16.5 Period Transformation |
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429 | (5) |
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16.6 Generalized Schedulability Analysis |
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434 | (11) |
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16.6.1 Tasks with Blocking Time |
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434 | (4) |
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16.6.2 Tasks with Earlier Deadlines |
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438 | (2) |
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440 | (4) |
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16.6.4 Tasks with Equal Priorities |
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444 | (1) |
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445 | (4) |
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Chapter 17 Real-Time Scheduling: Sporadic Server |
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449 | (22) |
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449 | (1) |
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450 | (6) |
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17.2.1 Task Design for Sporadic Servers |
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451 | (1) |
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452 | (4) |
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17.3 A Naive Sporadic Server |
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456 | (2) |
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457 | (1) |
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457 | (1) |
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17.4 A Fixed-Priority Sporadic Server |
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458 | (7) |
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17.5 A Dynamic-Priority Sporadic Server |
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465 | (3) |
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468 | (3) |
Part IV: Implementation Patterns |
|
471 | (178) |
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Chapter 18 Resource Sharing |
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473 | (54) |
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473 | (4) |
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477 | (6) |
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18.2.1 Mapping File Objects |
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478 | (3) |
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18.2.2 Shared Memory Objects |
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481 | (2) |
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483 | (16) |
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18.3.1 Task Synchronization |
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485 | (2) |
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487 | (1) |
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18.3.3 Resource Protection |
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488 | (2) |
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18.3.4 POSIX Functions for Semaphores |
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490 | (1) |
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18.3.5 Semaphore Examples |
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491 | (8) |
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499 | (8) |
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18.4.1 Mutex Usage Pattern |
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|
500 | (3) |
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18.4.2 POSIX Functions for Mutexes |
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|
503 | (1) |
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18.4.3 An Example of Using a Mutex |
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504 | (3) |
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507 | (18) |
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18.5.1 Barrier Synchronization |
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509 | (5) |
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18.5.2 Producer-Consumer Pattern |
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514 | (5) |
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519 | (6) |
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525 | (2) |
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Chapter 19 Intertask Communication: Message Queue |
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|
527 | (22) |
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19.1 Introduction to Message Queues |
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|
527 | (1) |
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19.2 Message Queue Statics and Dynamics |
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528 | (3) |
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19.3 Message Queue Usage Patterns |
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|
531 | (7) |
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19.3.1 Unidirectional Communication |
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532 | (1) |
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19.3.2 Acked-Unidirectional Communication |
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533 | (1) |
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19.3.3 Bidirectional Communication |
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534 | (2) |
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19.3.4 Client-Server Communication |
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536 | (2) |
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19.4 POSIX Functions for Message Queues |
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538 | (3) |
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19.5 An Example of Using Message Queues |
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|
541 | (6) |
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547 | (2) |
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Chapter 20 Intertask Communication: Pipe |
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|
549 | (16) |
|
20.1 Introduction to Pipes |
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549 | (1) |
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20.2 Pipe Statics and Dynamics |
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550 | (2) |
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552 | (1) |
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20.4 POSIX Functions for Pipes |
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553 | (5) |
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20.4.1 Multiple Writers and Readers |
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|
555 | (2) |
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20.4.2 POSIX Select Operation on Pipes |
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557 | (1) |
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20.5 An Example of Using Pipes |
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558 | (5) |
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563 | (2) |
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Chapter 21 Intertask Communication: Signaling |
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|
565 | (42) |
|
21.1 Introduction to POSIX Signals |
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|
565 | (2) |
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567 | (1) |
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21.3 Signal Vector Table and Handlers |
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|
568 | (1) |
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21.4 POSIX Signal Functions |
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|
569 | (1) |
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21.5 QNX Implementation of POSIX Signals |
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|
570 | (7) |
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21.5.1 Example: Handling Signals in Different Processes |
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|
570 | (3) |
|
21.5.2 Example: Controlling a Task Server |
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|
573 | (4) |
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21.6 Spinlocks and Interrupt Events from ISRs |
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|
577 | (10) |
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|
577 | (1) |
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21.6.2 QNX Event Structure |
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|
577 | (1) |
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21.6.3 Interrupt Handling in QNX Applications |
|
|
578 | (1) |
|
21.6.4 Example: Interrupt Events from ISRs |
|
|
579 | (8) |
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|
587 | (18) |
|
21.7.1 QNX Synchronous Message Passing |
|
|
587 | (4) |
|
21.7.2 QNX Asynchronous Pulsing Mechanism |
|
|
591 | (2) |
|
21.7.3 Hierarchical Messaging Pattern |
|
|
593 | (1) |
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21.7.4 Priority Inheritance by Message Receivers |
|
|
594 | (1) |
|
21.7.5 Example: A Simple Timer Manager |
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|
594 | (11) |
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|
605 | (2) |
|
Chapter 22 Software Timer Management |
|
|
607 | (18) |
|
22.1 Hardware Timer and Software Timer |
|
|
607 | (3) |
|
22.2 Software Timer Manager |
|
|
610 | (2) |
|
22.2.1 Chain a Dedicated Timer ISR |
|
|
611 | (1) |
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|
612 | (1) |
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|
612 | (6) |
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|
615 | (2) |
|
22.3.2 Timers with Wide Ranges |
|
|
617 | (1) |
|
22.4 Hierarchical Timing Wheels |
|
|
618 | (6) |
|
22.4.1 Reference Context and Timer Management |
|
|
619 | (1) |
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|
620 | (4) |
|
|
624 | (1) |
|
Chapter 23 QNX Resource Management |
|
|
625 | (24) |
|
23.1 Introduction to QNX Resource Management |
|
|
625 | (1) |
|
23.2 Resource Manager Architecture |
|
|
626 | (4) |
|
|
628 | (1) |
|
23.2.2 Key Data Structures |
|
|
629 | (1) |
|
23.3 Example 1: Calculator as a Resource Manager |
|
|
630 | (12) |
|
|
630 | (2) |
|
23.3.2 Handle Messages from Clients |
|
|
632 | (7) |
|
23.3.3 Register to Process Manager |
|
|
639 | (1) |
|
23.3.4 Use Resource Manager |
|
|
640 | (2) |
|
23.4 Example 2: Device Drivers |
|
|
642 | (6) |
|
|
642 | (1) |
|
|
643 | (2) |
|
23.4.3 Polling-Based Input Event Detection |
|
|
645 | (3) |
|
|
648 | (1) |
References |
|
649 | (4) |
Index |
|
653 | |