This proceedings contains the extended versions of a selected subset of the contributions presented at the May 2001 workshop on electronic- based circuit and system testing. The 18 papers address defect- oriented testing, design for testability (DFT), delay testing, mixed- signal testing, transportation of test data, RTL validation, and built-in self test (BIST) resource partitioning. Topics include analyzing the impact of bridging faults on EEPROM cell array, demodulation based testing of off-chip driver performance, on-chip signal level evaluation for mixed-signal ICs using digital window comparators, and reusing scan chains for test pattern decompression. No subject index. Annotation c. Book News, Inc., Portland, OR (booknews.com)
