Muutke küpsiste eelistusi

Analog Circuit Design for Process Variation-Resilient Systems-on-a-Chip 2012 ed. [Pehme köide]

,
  • Formaat: Paperback / softback, 174 pages, kõrgus x laius: 235x155 mm, kaal: 454 g, XVIII, 174 p., 1 Paperback / softback
  • Ilmumisaeg: 16-Apr-2014
  • Kirjastus: Springer-Verlag New York Inc.
  • ISBN-10: 1489992960
  • ISBN-13: 9781489992963
Teised raamatud teemal:
  • Pehme köide
  • Hind: 95,02 €*
  • * hind on lõplik, st. muud allahindlused enam ei rakendu
  • Tavahind: 111,79 €
  • Säästad 15%
  • Raamatu kohalejõudmiseks kirjastusest kulub orienteeruvalt 2-4 nädalat
  • Kogus:
  • Lisa ostukorvi
  • Tasuta tarne
  • Tellimisaeg 2-4 nädalat
  • Lisa soovinimekirja
Analog Circuit Design for Process Variation-Resilient Systems-on-a-Chip 2012 ed.Suurem pilt
  • Formaat: Paperback / softback, 174 pages, kõrgus x laius: 235x155 mm, kaal: 454 g, XVIII, 174 p., 1 Paperback / softback
  • Ilmumisaeg: 16-Apr-2014
  • Kirjastus: Springer-Verlag New York Inc.
  • ISBN-10: 1489992960
  • ISBN-13: 9781489992963
Teised raamatud teemal:
Püsilink: https://www.kriso.ee/db/9781489992963.html
Märksõnad:

This book describes several techniques to address variation-related design challenges for analog blocks in mixed-signal systems-on-chip. The methods presented are results from recent research works involving receiver front-end circuits, baseband filter linearization, and data conversion. These circuit-level techniques are described, with their relationships to emerging system-level calibration approaches, to tune the performances of analog circuits with digital assistance or control. Coverage also includes a strategy to utilize on-chip temperature sensors to measure the signal power and linearity characteristics of analog/RF circuits, as demonstrated by test chip measurements.

  • Describes a variety of variation-tolerant analog circuit design examples, including from RF front-ends, high-performance ADCs and baseband filters;
  • Includes built-in testing techniques, linked to current industrial trends;
  • Balances digitally-assisted performance tuning with analog performance tuning and mismatch reduction approaches;
  • Describes theoretical concepts as well as experimental results for test chips designed with variation-aware techniques.


This book describes several techniques to address variation-related design challenges for analog blocks in mixed-signal systems-on-chip. It Includes built-in testing techniques, linked to current industrial trends.
1 Introduction
1(8)
1.1 Background and Motivation
1(1)
1.2 Book Scope and Organization
2(7)
1.2.1 Linearization Scheme for Transconductance Amplifiers
5(1)
1.2.2 Process Variation-Aware Quantization
5(1)
1.2.3 Non-Invasive On-Chip Measurement of Thermal Gradients and RF Power
6(1)
1.2.4 Analog Calibration for Transistor Mismatch Reduction
7(1)
References
7(2)
2 Process Variation Challenges and Solutions Approaches
9(22)
2.1 Current Trends
9(4)
2.1.1 The Impact of Rising Process Variations
9(2)
2.1.2 Circuit and System Design Tendencies
11(2)
2.2 System Perspective on Transceiver Built-In Testing and Self-Calibration
13(18)
2.2.1 Digital Correction and Calibration
14(1)
2.2.2 Analog Measurements and Tuning
15(3)
2.2.3 Loopback Testing
18(1)
2.2.4 Digital Performance Monitoring with Analog Compensation
19(1)
2.2.5 Combined Digital Monitoring, Analog Measurements, and Tuning
20(1)
2.2.6 High-Volume Manufacturing Testing
21(1)
2.2.7 Analog Tuning "Knobs"
21(5)
2.2.8 Variation-Aware Design of Digital Circuits
26(1)
References
27(4)
3 High-Linearity Transconductance Amplifiers with Digital Correction Capability
31(26)
3.1 Background
31(2)
3.2 Attenuation-Predistortion Linearization Methodology
33(5)
3.2.1 Single-Ended Circuits
33(2)
3.2.2 Fully-Differential Circuits
35(1)
3.2.3 Scaling of Attenuation Ratios
35(3)
3.2.4 Volterra Series Analysis
38(1)
3.3 Circuit-Level Design Considerations
38(5)
3.3.1 Fully-Differential OTA with Floating-Gate Transistors
38(2)
3.3.2 Proof-of-Concept Filter Realization and Application Considerations
40(3)
3.4 Compensation for PVT Variations and High-Frequency Effects
43(1)
3.5 Prototype Measurement Results
44(8)
3.5.1 Standalone OTA
44(2)
3.5.2 Second-Order Lowpass Filter
46(6)
3.6 Summarizing Remarks
52(5)
References
54(3)
4 Multi-Bit Quantizer Design for Continuous-Time Sigma-Delta Modulators with Reduced Device Matching Requirements
57(30)
4.1 Background
57(9)
4.1.1 State of the Art Continuous-Time ΣΔ ADCs
58(1)
4.1.2 Quantizer Design Trends s
59(3)
4.1.3 Quantizer Design Considerations for the ΣΔ Modulator Architecture
62(4)
4.2 3-Bit Two-Step Current-Mode Quantizer Architecture
66(15)
4.2.1 Quantizer Design
66(5)
4.2.2 Process Variations
71(4)
4.2.3 Simulation Results and Technology Scaling
75(4)
4.2.4 ADC Chip Measurements with Embedded Quantizer
79(2)
4.3 Summarizing Remarks
81(6)
References
83(4)
5 An On-Chip Temperature Sensor for the Measurement of RF Power Dissipation and Thermal Gradients
87(26)
5.1 Background
87(2)
5.2 Temperature Sensing Approach
89(7)
5.2.1 Integration with Transceiver Calibration Techniques
89(1)
5.2.2 Modeling of the Thermal Coupling
90(3)
5.2.3 Electro-Thermal Analysis Example: Low-Noise Amplifier
93(3)
5.3 CMOS Differential Temperature Sensor Design
96(8)
5.3.1 Previous Sensors
96(1)
5.3.2 Design of the Sensor Circuit Topology
96(3)
5.3.3 Adjustment of the Sensor's Sensitivity
99(2)
5.3.4 Sensor Design Optimization Procedure
101(3)
5.4 Measurement Results
104(7)
5.4.1 Temperature Sensor Characterization
104(4)
5.4.2 RF Testing with the On-Chip DC Temperature Sensor
108(3)
5.5 Summarizing Remarks
111(2)
References
111(2)
6 Mismatch Reduction for Transistors in High-Frequency Differential Analog Signal Paths
113(38)
6.1 Background
113(1)
6.2 A Mismatch Reduction Technique for Differential Pair Transistors
114(5)
6.2.1 Approach
114(4)
6.2.2 Simulation Results
118(1)
6.3 Second-Order Nonlinearity Enhancement for Double-Balanced Mixers
119(28)
6.3.1 Introduction
119(5)
6.3.2 Alternative Mixer Calibration
124(7)
6.3.3 Double-Balanced Mixer Design
131(4)
6.3.4 Simulation Results
135(12)
6.4 Summarizing Remarks
147(4)
References
147(4)
7 Summary and Conclusions
151(4)
7.1 Overall Perspective
151(1)
7.2 Discussed Projects
152(3)
Appendix A OTA Linearization---Volterra Series Analysis 155(4)
Appendix B OTA Linearization---Advanced Phase Compensation 159(6)
Appendix C OTA Linearization Without Power Budget Increase 165(2)
Appendix D Temperature Sensing Analysis---Relationship Between Circuit Nonlinearities and DC Temperature 167(4)
Index 171