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Analog Integrated Circuit Design by Simulation: Techniques, Tools, and Methods [Kõva köide]

  • Formaat: Hardback, 576 pages, kõrgus x laius x paksus: 274x218x36 mm, kaal: 1202 g, 200 Illustrations
  • Ilmumisaeg: 29-Mar-2019
  • Kirjastus: McGraw-Hill Education
  • ISBN-10: 1260441458
  • ISBN-13: 9781260441451
Teised raamatud teemal:
Analog Integrated Circuit Design by Simulation: Techniques, Tools, and MethodsSuurem pilt
  • Formaat: Hardback, 576 pages, kõrgus x laius x paksus: 274x218x36 mm, kaal: 1202 g, 200 Illustrations
  • Ilmumisaeg: 29-Mar-2019
  • Kirjastus: McGraw-Hill Education
  • ISBN-10: 1260441458
  • ISBN-13: 9781260441451
Teised raamatud teemal:
Püsilink: https://www.kriso.ee/db/9781260441451.html
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Learn the principles and practices of simulation-based analog IC design

This comprehensive textbook and on-the-job reference offers clear instruction on analog integrated circuit design using the latest simulation techniques. Ideal for graduate students and professionals alike, the book shows, step by step, how to develop and deploy integrated circuits for cutting-edge Internet of Things (IoT) and other applications. Analog Integrated Circuit Design by Simulation: Techniques, Tools, and Methods lays out practical, ready-to-apply engineering strategies. Application layer, device layer, and circuit layer IC design are covered in complete detail. You will learn how to tackle real-world design problems and avoid long cycles of trial and error. 

Coverage includes:

•First-order DC response
•Unified closed-loop model
•Accurate modeling of DC response
•Frequency and step response
•Multi-pole dynamic response and stability
•Effect of external network on differential gain
•Continuous-time and discrete-time amplifiers
•MOSFET, NMOS, and PMOS characteristics
•Small-signal modeling and circuit analysis
•Resistor and capacitor design
•Current sources, sinks, and mirrors
•Basic, symmetrical, folded-cascode, and Miller OTAs
•Opamps with source-follower and common-source output stages
•Fully differential OTAs and opamps


1 Preliminaries 1(6)
2 Application Layer 7(138)
2.1 Introduction
7(2)
2.2 First-Order DC Response
9(11)
2.2.1 First-Order Open-Loop DC Transfer Characteristic and Range Limitations
9(2)
2.2.2 DC Analysis with Virtual-Short Approximation
11(9)
2.3 Unified Closed-Loop Model
20(5)
2.3.1 A Generalized External-Network Model
20(2)
2.3.2 Extraction Procedures for Feedback and Input Factors
22(3)
2.4 Accurate Modeling of DC Response
25(11)
2.4.1 Open-Loop and Closed-Loop DC Transfer Functions
26(1)
2.4.2 DC Error
27(9)
2.5 Frequency Response
36(18)
2.5.1 Small-Signal Frequency Response
37(8)
2.5.2 Slew-Limited Bandwidth
45(4)
2.5.3 Harmonic Distortion
49(5)
2.6 Step Response
54(7)
2.6.1 Slew-Free Step Response
54(3)
2.6.2 Slew-Limited Step Response
57(4)
2.7 Multi-Pole Dynamic Response and Stability
61(9)
2.7.1 Two-Pole Dynamic Response
62(3)
2.7.2 Loop Gain, Phase Margin, and Stability
65(5)
2.8 Effect of External Network on Differential Gain
70(4)
2.9 Noise
74(9)
2.9.1 Power Supply Noise
74(1)
2.9.2 Fundamentals of Inherent Noise Analysis
75(3)
2.9.3 Closed-Loop Noise Analysis
78(5)
2.10 Fully-Differential Continuous-Time Amplifiers
83(22)
2.10.1 First-Order DC Response and Range Limitations
83(6)
2.10.2 Unified Closed-Loop Model
89(4)
2.10.3 Accurate Modeling of DC Response
93(5)
2.10.4 Frequency Response and Step Response
98(2)
2.10.5 Loop Gain, Differential Gain, and Noise
100(5)
2.11 Discrete-Time Amplifiers
105(27)
2.11.1 DC Analysis with Charge Conservation
105(5)
2.11.2 Unified Closed-Loop Model
110(5)
2.11.3 Accurate Modeling of DC Response
115(3)
2.11.4 Transient Response
118(11)
2.11.5 Loop-Gain Extraction
129(3)
2.12 Fully-Differential Discrete-Time Amplifiers
132(9)
2.12.1 DC Analysis with Charge Conservation
132(2)
2.12.2 Unified Closed-Loop Model
134(1)
2.12.3 Accurate Modeling of DC Response
134(3)
2.12.4 Transient Analysis and Loop-Gain Extraction
137(4)
2.13 References
141(1)
2.14 Exercises
141(4)
3 Device Layer 145(124)
3.1 Introduction
145(3)
3.2 MOSFET Basics
148(11)
3.2.1 Structure and Electrical Ports
148(9)
3.2.2 Performance Metrics and Design Variables
157(2)
3.3 NMOS Design Relations and Tools
159(17)
3.3.1 Long-Channel Models
159(4)
3.3.2 Threshold Voltage
163(2)
3.3.3 Drain-Source Saturation Voltage
165(2)
3.3.4 Sheet Current
167(2)
3.3.5 Transconductance Efficiency
169(3)
3.3.6 Output Resistance and Early Voltage
172(4)
3.4 PMOS Design Relations and Tools
176(10)
3.4.1 Strong-Inversion Model
176(2)
3.4.2 Subthreshold Model
178(1)
3.4.3 Threshold Voltage
178(1)
3.4.4 Drain-Source Saturation Voltage, Sheet Current, and Transconductance Efficiency
179(2)
3.4.5 Output Resistance and Early Voltage
181(5)
3.5 Thermal Effects
186(2)
3.6 Biasing and Sizing a MOSFET with Design Tools
188(6)
3.7 Small-Signal Modeling and Circuit Analysis
194(31)
3.7.1 MOSFET DC Small-Signal Model
195(1)
3.7.2 DC Small-Signal Circuit Analysis
196(16)
3.7.3 MOSFET Capacitances and High-Frequency Small-Signal Model
212(13)
3.8 MOSFET Noise Model
225(7)
3.9 MOSFET as a Switch
232(6)
3.9.1 Single-Device and Transmission-Gate Switch Properties
232(1)
3.9.2 Charge Injection and Clock Feedthrough
233(5)
3.10 Resistor Design
238(15)
3.10.1 Resistor Structures and Resistance Modeling
238(5)
3.10.2 Design Techniques for Accuracy and Precision
243(5)
3.10.3 MOSFET as a Resistor
248(5)
3.11 Capacitor Design
253(8)
3.11.1 MIM Capacitor
254(3)
3.11.2 MOSFET as a Capacitor
257(4)
3.12 References
261(1)
3.13 Exercises
261(8)
4 Circuit Layer 269(280)
4.1 Introduction
269(1)
4.2 Current Sources, Sinks, and Mirrors
269(34)
4.2.1 Fundamental Concepts and Performance Metrics
269(4)
4.2.2 Accuracy and Precision in Current Mirroring
273(8)
4.2.3 Basic Cascoding
281(14)
4.2.4 Low-Voltage Cascoding
295(2)
4.2.5 Regulated Cascoding
297(3)
4.2.6 Self-Cascoding
300(3)
4.3 Current and Voltage References
303(20)
4.3.1 Voltage-Divider Current Reference
303(4)
4.3.2 Beta-Multiplier Current Reference
307(6)
4.3.3 Bandgap Voltage Reference
313(10)
4.4 Basic Amplifier Stages
323(27)
4.4.1 Common-Source Stage
323(2)
4.4.2 Source Follower
325(7)
4.4.3 Basic Differential Pair
332(10)
4.4.4 Source-Degenerated Differential Pair
342(3)
4.4.5 Super-GM Differential Pair
345(5)
4.5 Basic OTA
350(25)
4.5.1 DC Transfer Characteristic as a Voltage Amplifier
350(1)
4.5.2 Range Limitations
351(2)
4.5.3 DC Differential Gain and Offset
353(2)
4.5.4 Frequency Response and Step Response
355(2)
4.5.5 Noise-Related Properties
357(18)
4.6 Symmetrical OTA
375(36)
4.6.1 Topology and DC Transfer Characteristic
375(2)
4.6.2 Range Limitations
377(1)
4.6.3 DC Differential Gain and Offset
378(1)
4.6.4 Frequency Response and Step Response
379(15)
4.6.5 Noise-Related Properties
394(4)
4.6.6 Cascoded-Symmetrical OTA
398(13)
4.7 Folded-Cascode OTA
411(33)
4.7.1 Topology and DC Transfer Characteristic
412(1)
4.7.2 DC Differential Gain and Range Limitations
413(2)
4.7.3 Frequency Response, Step Response, and Noise-Related Properties
415(9)
4.7.4 Rail-to-Rail Folded-Cascode OTA
424(20)
4.8 Miller OTA
444(31)
4.8.1 Topology and DC Response
444(2)
4.8.2 Frequency Response and Noise-Related Properties
446(10)
4.8.3 Step Response
456(19)
4.9 Opamp with a Push-Pull Source-Follower Output Stage
475(21)
4.9.1 Topologies and Operation
476(2)
4.9.2 DC Response
478(2)
4.9.3 Frequency Response, Step Response, and Noise
480(16)
4.10 Opamp with a Push-Pull Common-Source Output Stage
496(17)
4.11 Fully-Differential OTAs and Opamps
513(32)
4.11.1 Core Topologies and Properties
513(5)
4.11.2 Common-Mode Feedback Circuits
518(5)
4.11.3 Design Examples
523(22)
4.12 References
545(1)
4.13 Exercises
546(3)
Index 549
Uur Çilingirolu received his M.S. in electrical engineering from Istanbul Technical University in 1973, and Ph.D. in microelectronics from Southampton University in 1978. He currently holds a faculty position at Yeditepe University. Dr. Çilingirolu has authored numerous papers and two previous books. He resides in Istanbul, Turkey.