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ARM Assembly Language: Fundamentals and Techniques, Second Edition 2nd edition [Kõva köide]

(ARM, Inc., Austin, Texas, USA), (Consultant, Austin, Texas, USA)
  • Formaat: Hardback, 453 pages, kõrgus x laius: 234x156 mm, kaal: 1800 g, 71 Tables, black and white; 150 Illustrations, black and white
  • Ilmumisaeg: 20-Oct-2014
  • Kirjastus: CRC Press Inc
  • ISBN-10: 1482229854
  • ISBN-13: 9781482229851
  • Formaat: Hardback, 453 pages, kõrgus x laius: 234x156 mm, kaal: 1800 g, 71 Tables, black and white; 150 Illustrations, black and white
  • Ilmumisaeg: 20-Oct-2014
  • Kirjastus: CRC Press Inc
  • ISBN-10: 1482229854
  • ISBN-13: 9781482229851
Delivering a solid introduction to assembly language and embedded systems, ARM Assembly Language: Fundamentals and Techniques, Second Edition continues to support the popular ARM7TDMI, but also addresses the latest architectures from ARM, including Cortex-A, Cortex-R, and Cortex-M processorsall of which have slightly different instruction sets, programmers models, and exception handling.

Featuring three brand-new chapters, a new appendix, and expanded coverage of the ARM7, this edition:





Discusses IEEE 754 floating-point arithmetic and explains how to program with the IEEE standard notation Contains step-by-step directions for the use of Keil MDK-ARM and Texas Instruments (TI) Code Composer Studio Provides a resource to be used alongside a variety of hardware evaluation modules, such as TIs Tiva Launchpad, STMicroelectronics iNemo and Discovery, and NXP Semiconductors Xplorer boards

Written by experienced ARM processor designers, ARM Assembly Language: Fundamentals and Techniques, Second Edition covers the topics essential to writing meaningful assembly programs, making it an ideal textbook and professional reference.

Arvustused

"Relaxed and informal, almost conversational, this writing style makes for comfortable reading that should appeal to everyone while breaking the tension of diving into the complexities of a modern multi-purpose microcontroller." Andrew Mason, Michigan State University, East Lansing, USA

"The authors are obviously authorities on the subject, and this shows clearly. The text is clearly written and easy to follow, with examples and analogies used to make understanding easier. Using Keil and the Tiva Launchpad should make it pretty easy to get the examples up and running on an actual Cortex-M as well as using a simulator." Craig A. Evans, University of Leeds, UK

"This book fills a void in the computer science literature." Don Evans, Southern Methodist University, Dallas, Texas, USA

"This text retains the ease of using the ARM7TDMI while moving the student [ or reader] into the more capable Cortex-M4. The addition of the Cortex-M4 makes this a much stronger text." Ralph Tanner, Western Michigan University, Kalamazoo, USA

"Assembly language programming is still the best way to learn about the internals of processors and this is one of a very few books that teaches that skill for ARM processors. It covers the necessary material in a well-organized manner. Updated for newer versions of ARM processors, it adds good material on floating-point arithmetic that was missing from the first edition." Ronald W. Mehler, California State University, Northridge, USA

"In general, this book contains most of the content that I generally cover in my introduction to computer organization course. It contains very nice exercises at the end of each chapter, and that is a plus when generating questions to help students grasp the concepts. I look forward to a second edition, because I plan to continue using this book." Rose M. Lowe, Clemson University, South Carolina, USA

Preface xv
Authors xxi
Chapter 1 An Overview of Computing Systems
1(32)
1.1 Introduction
1(2)
1.2 History of RISC
3(9)
1.2.1 ARM Begins
5(2)
1.2.2 The Creation of ARM Ltd
7(2)
1.2.3 ARM Today
9(1)
1.2.4 The Cortex Family
10(1)
1.2.4.1 The Cortex-A and Cortex-R Families
10(1)
1.2.4.2 The Cortex-M Family
11(1)
1.3 The Computing Device
12(3)
1.4 Number Systems
15(3)
1.5 Representations of Numbers and Characters
18(6)
1.5.1 Integer Representations
18(3)
1.5.2 Floating-Point Representations
21(2)
1.5.3 Character Representations
23(1)
1.6 Translating Bits to Commands
24(1)
1.7 The Tools
25(5)
1.7.1 Open Source Tools
27(1)
1.7.2 Keil (ARM)
27(1)
1.7.3 Code Composer Studio
28(2)
1.7.4 Useful Documentation
30(1)
1.8 Exercises
30(3)
Chapter 2 The Programmer's Model
33(12)
2.1 Introduction
33(1)
2.2 Data Types
33(1)
2.3 ARM7TDMI
34(5)
2.3.1 Processor Modes
34(1)
2.3.2 Registers
35(3)
2.3.3 The Vector Table
38(1)
2.4 Cortex-M4
39(4)
2.4.1 Processor Modes
40(1)
2.4.2 Registers
40(2)
2.4.3 The Vector Table
42(1)
2.5 Exercises
43(2)
Chapter 3 Introduction to Instruction Sets: v4T and v7-M
45(14)
3.1 Introduction
45(1)
3.2 ARM, Thumb, and Thumb-2 Instructions
46(1)
3.3 Program 1: Shifting Data
46(5)
3.3.1 Running the Code
47(2)
3.3.2 Examining Register and Memory Contents
49(2)
3.4 Program 2: Factorial Calculation
51(2)
3.5 Program 3: Swapping Register Contents
53(1)
3.6 Program 4: Playing with Floating-Point Numbers
54(1)
3.7 Program 5: Moving Values between Integer and Floating-Point Registers
55(1)
3.8 Programming Guidelines
56(1)
3.9 Exercises
57(2)
Chapter 4 Assembler Rules and Directives
59(20)
4.1 Introduction
59(1)
4.2 Structure of Assembly Language Modules
59(4)
4.3 Predefined Register Names
63(1)
4.4 Frequently Used Directives
63(10)
4.4.1 Defining a Block of Data or Code
63(1)
4.4.1.1 Keil Tools
64(1)
4.4.1.2 Code Composer Studio Tools
65(1)
4.4.2 Register Name Definition
66(1)
4.4.2.1 Keil Tools
66(1)
4.4.2.2 Code Composer Studio
66(1)
4.4.3 Equating a Symbol to a Numeric Constant
66(1)
4.4.3.1 Keil Tools
67(1)
4.4.3.2 Code Composer Studio
67(1)
4.4.4 Declaring an Entry Point
67(1)
4.4.5 Allocating Memory and Specifying Contents
68(1)
4.4.5.1 Keil Tools
68(1)
4.4.5.2 Code Composer Studio
69(1)
4.4.6 Aligning Data or Code to Appropriate Boundaries
70(1)
4.4.6.1 Keil Tools
70(1)
4.4.6.2 Code Composer Studio
71(1)
4.4.7 Reserving a Block of Memory
71(1)
4.4.7.1 Keil Tools
71(1)
4.4.7.2 Code Composer Studio
71(1)
4.4.8 Assigning Literal Pool Origins
72(1)
4.4.9 Ending a Source File
72(1)
4.5 Macros
73(1)
4.6 Miscellaneous Assembler Features
74(3)
4.6.1 Assembler Operators
74(2)
4.6.2 Math Functions in CCS
76(1)
4.7 Exercises
77(2)
Chapter 5 Loads, Stores, and Addressing
79(24)
5.1 Introduction
79(1)
5.2 Memory
79(4)
5.3 Loads and Stores: The Instructions
83(5)
5.4 Operand Addressing
88(3)
5.4.1 Pre-Indexed Addressing
88(1)
5.4.2 Post-Indexed Addressing
89(2)
5.5 Endianness
91(4)
5.5.1 Changing Endianness
93(1)
5.5.2 Defining Memory Areas
94(1)
5.6 Bit-Banded Memory
95(1)
5.7 Memory Considerations
96(3)
5.8 Exercises
99(4)
Chapter 6 Constants and Literal Pools
103(16)
6.1 Introduction
103(1)
6.2 The ARM Rotation Scheme
103(4)
6.3 Loading Constants into Registers
107(5)
6.4 Loading Constants with MOVW, MOVT
112(1)
6.5 Loading Addresses into Registers
113(3)
6.6 Exercises
116(3)
Chapter 7 Integer Logic and Arithmetic
119(36)
7.1 Introduction
119(1)
7.2 Flags and Their Use
119(5)
7.2.1 The N Flag
120(1)
7.2.2 The V Flag
121(1)
7.2.3 The Z Flag
122(1)
7.2.4 The C Flag
123(1)
7.3 Comparison Instructions
124(1)
7.4 Data Processing Operations
125(16)
7.4.1 Boolean Operations
126(1)
7.4.2 Shifts and Rotates
127(6)
7.4.3 Addition/Subtraction
133(2)
7.4.4 Saturated Math Operations
135(2)
7.4.5 Multiplication
137(2)
7.4.6 Multiplication by a Constant
139(1)
7.4.7 Division
140(1)
7.5 DSP Extensions
141(2)
7.6 Bit Manipulation Instructions
143(2)
7.7 Fractional Notation
145(5)
7.8 Exercises
150(5)
Chapter 8 Branches and Loops
155(20)
8.1 Introduction
155(1)
8.2 Branching
155(7)
8.2.1 Branching (ARM7TDMI)
156(4)
8.2.2 Version 7-M Branches
160(2)
8.3 Looping
162(5)
8.3.1 While Loops
162(1)
8.3.2 For Loops
163(3)
8.3.3 Do-While Loops
166(1)
8.4 Conditional Execution
167(3)
8.4.1 v4T Conditional Execution
167(2)
8.4.2 v7-M Conditional Execution: The IT Block
169(1)
8.5 Straight-Line Coding
170(2)
8.6 Exercises
172(3)
Chapter 9 Introduction to Floating-Point: Basics, Data Types, and Data Transfer
175(34)
9.1 Introduction
175(1)
9.2 A Brief History of Floating-Point in Computing
175(3)
9.3 The Contribution of Floating-Point to the Embedded Processor
178(2)
9.4 Floating-Point Data Types
180(3)
9.5 The Space of Floating-Point Representable Values
183(2)
9.6 Floating-Point Representable Values
185(7)
9.6.1 Normal Values
185(1)
9.6.2 Subnormal Values
186(2)
9.6.3 Zeros
188(1)
9.6.4 Infinities
189(1)
9.6.5 Not-a-Numbers (NaNs)
190(2)
9.7 The Floating-Point Register File of the Cortex-M4
192(1)
9.8 FPU Control Registers
193(4)
9.8.1 The Floating-Point Status and Control Register, FPSCR
193(1)
9.8.1.1 The Control and Mode Bits
194(1)
9.8.1.2 The Exception Bits
195(1)
9.8.2 The Coprocessor Access Control Register, CPACR
196(1)
9.9 Loading Data into Floating-Point Registers
197(4)
9.9.1 Floating-Point Loads and Stores: The Instructions
197(2)
9.9.2 The VMOV instruction
199(2)
9.10 Conversions between Half-Precision and Single-Precision
201(1)
9.11 Conversions to Non-Floating-Point Formats
202(4)
9.11.1 Conversions between Integer and Floating-Point
203(1)
9.11.2 Conversions between Fixed-Point and Floating-Point
203(3)
9.12 Exercises
206(3)
Chapter 10 Introduction to Floating-Point: Rounding and Exceptions
209(26)
10.1 Introduction
209(1)
10.2 Rounding
209(10)
10.2.1 Introduction to Rounding Modes in the IEEE 754-2008 Specification
211(1)
10.2.2 The roundTiesToEven (RNE) Rounding Mode
212(2)
10.2.3 The Directed Rounding Modes
214(1)
10.2.3.1 The roundTowardPositive (RP) Rounding Mode
215(1)
10.2.3.2 The roundTowardNegative (RM) Rounding Mode
215(1)
10.2.3.3 The roundTowardZero (RZ) Rounding Mode
215(1)
10.2.4 Rounding Mode Summary
216(3)
10.3 Exceptions
219(7)
10.3.1 Introduction to Floating-Point Exceptions
219(1)
10.3.2 Exception Handling
220(1)
10.3.3 Division by Zero
220(2)
10.3.4 Invalid Operation
222(1)
10.3.5 Overflow
223(2)
10.3.6 Underflow
225(1)
10.3.7 Inexact Result
226(1)
10.4 Algebraic Laws and Floating-Point
226(2)
10.5 Normalization and Cancelation
228(4)
10.6 Exercises
232(3)
Chapter 11 Floating-Point Data-Processing Instructions
235(24)
11.1 Introduction
235(1)
11.2 Floating-Point Data-Processing Instruction Syntax
235(1)
11.3 Instruction Summary
236(1)
11.4 Flags and Their Use
237(5)
11.4.1 Comparison Instructions
237(1)
11.4.2 The N Flag
237(1)
11.4.3 The Z Flag
238(1)
11.4.4 The C Flag
238(1)
11.4.5 The V Flag
238(1)
11.4.6 Predicated Instructions, or the Use of the Flags
239(2)
11.4.7 A Word about the IT Instruction
241(1)
11.5 Two Special Modes
242(1)
11.5.1 Flush-to-Zero Mode
242(1)
11.5.2 Default NaN
243(1)
11.6 Non-Arithmetic Instructions
243(1)
11.6.1 Absolute Value
243(1)
11.6.2 Negate
243(1)
11.7 Arithmetic Instructions
244(10)
11.7.1 Addition/Subtraction
244(2)
11.7.2 Multiplication and Multiply-Accumulate
246(1)
11.7.2.1 Multiplication and Negate Multiplication
247(1)
11.7.2.2 Chained Multiply-Accumulate
247(3)
11.7.2.3 Fused Multiply-Accumulate
250(2)
11.7.3 Division and Square Root
252(2)
11.8 Putting It All Together: A Coding Example
254(3)
11.9 Exercises
257(2)
Chapter 12 Tables
259(16)
12.1 Introduction
259(1)
12.2 Integer Lookup Tables
259(5)
12.3 Floating-Point Lookup Tables
264(4)
12.4 Binary Searches
268(4)
12.5 Exercises
272(3)
Chapter 13 Subroutines and Stacks
275(22)
13.1 Introduction
275(1)
13.2 The Stack
275(7)
13.2.1 LDM/STM Instructions
276(3)
13.2.2 PUSH and POP
279(1)
13.2.3 Full/Empty Ascending/Descending Stacks
280(2)
13.3 Subroutines
282(1)
13.4 Passing Parameters to Subroutines
283(6)
13.4.1 Passing Parameters in Registers
283(2)
13.4.2 Passing Parameters by Reference
285(1)
13.4.3 Passing Parameters on the Stack
286(3)
13.5 The ARM APCS
289(3)
13.6 Exercises
292(5)
Chapter 14 Exception Handling: ARM7TDMI
297(28)
14.1 Introduction
297(1)
14.2 Interrupts
297(1)
14.3 Error Conditions
298(1)
14.4 Processor Exception Sequence
299(2)
14.5 The Vector Table
301(2)
14.6 Exception Handlers
303(1)
14.7 Exception Priorities
304(1)
14.8 Procedures for Handling Exceptions
305(17)
14.8.1 Reset Exceptions
305(1)
14.8.2 Undefined Instructions
306(5)
14.8.3 Interrupts
311(1)
14.8.3.1 Vectored Interrupt Controllers
312(7)
14.8.3.2 More Advanced VICs
319(1)
14.8.4 Aborts
319(1)
14.8.4.1 Prefetch Aborts
320(1)
14.8.4.2 Data Aborts
320(1)
14.8.5 SVCs
321(1)
14.9 Exercises
322(3)
Chapter 15 Exception Handling: v7-M
325(16)
15.1 Introduction
325(1)
15.2 Operation Modes and Privilege Levels
325(5)
15.3 The Vector Table
330(1)
15.4 Stack Pointers
331(1)
15.5 Processor Exception Sequence
331(2)
15.5.1 Entry
331(2)
15.5.2 Exit
333(1)
15.6 Exception Types
333(4)
15.7 Interrupts
337(3)
15.8 Exercises
340(1)
Chapter 16 Memory-Mapped Peripherals
341(24)
16.1 Introduction
341(1)
16.2 The LPC2104
341(8)
16.2.1 The UART
342(1)
16.2.2 The Memory Map
343(2)
16.2.3 Configuring the UART
345(2)
16.2.4 Writing the Data to the UART
347(1)
16.2.5 Putting the Code Together
348(1)
16.2.6 Running the Code
349(1)
16.3 The LPC2132
349(7)
16.3.1 The D/A Converter
350(2)
16.3.2 The Memory Map
352(1)
16.3.3 Configuring the D/A Converter
353(1)
16.3.4 Generating a Sine Wave
353(1)
16.3.5 Putting the Code Together
354(2)
16.3.6 Running the Code
356(1)
16.4 The Tiva Launchpad
356(7)
16.4.1 General-Purpose I/O
359(1)
16.4.2 The Memory Map
359(1)
16.4.3 Configuring the GPIO Pins
359(1)
16.4.4 Turning on the LEDs
360(2)
16.4.5 Putting the Code Together
362(1)
16.4.6 Running the Code
363(1)
16.5 Exercises
363(2)
Chapter 17 ARM, Thumb and Thumb-2 Instructions
365(14)
17.1 Introduction
365(1)
17.2 ARM and 16-Bit Thumb Instructions
365(6)
17.2.1 Differences between ARM and 16-Bit Thumb
369(1)
17.2.2 Thumb Implementation
370(1)
17.3 32-Bit Thumb Instructions
371(2)
17.4 Switching between ARM and Thumb States
373(2)
17.5 How to Compile for Thumb
375(2)
17.6 Exercises
377(2)
Chapter 18 Mixing C and Assembly
379(14)
18.1 Introduction
379(1)
18.2 Inline Assembler
379(5)
18.2.1 Inline Assembly Syntax
382(2)
18.2.2 Restrictions on Inline Assembly Operations
384(1)
18.3 Embedded Assembler
384(3)
18.3.1 Embedded Assembly Syntax
386(1)
18.3.2 Restrictions on Embedded Assembly Operations
387(1)
18.4 Calling between C and Assembly
387(3)
18.5 Exercises
390(3)
Appendix A Running Code Composer Studio 393(6)
Appendix B Running Keil Tools 399(8)
Appendix C ASCII Character Codes 407(2)
Appendix D 409(6)
Glossary 415(4)
References 419(2)
Index 421
William Hohl held the position of worldwide university relations manager for ARM, based in Austin, Texas, for 10 years. In total, he was with ARM for nearly 15 years and began as a principal design engineer to help build the ARM1020 microprocessor. His travel and university lectures have taken him to over 40 countries on 5 continents, and he continues to lecture on low-power microcontrollers and assembly language programming. In addition to his engineering duties, he also held an adjunct faculty position in Austin from 1998 to 2004, teaching undergraduate mathematics. Before joining ARM, he worked at Motorola (now Freescale Semiconductor) in the ColdFire and 68040 design groups and at Texas Instruments as an applications engineer. He holds MSEE and BSEE degrees from Texas A&M University as well as six patents in the field of debug architectures.

Christopher Hinds has worked in the microprocessor design field for over 25 years, holding design positions at Motorola (now Freescale Semiconductor), AMD, and ARM. While at ARM, he was the primary author of the ARM VFP floating-point architecture and led the design of the ARM10 VFP, the first hardware implementation of the new architecture. He recently joined the Patents Group in ARM, identifying patentable inventions within the company and assisting in patent litigation. He holds BSEE and MSEE degrees from Texas A&M University and an M.Div from Oral Roberts University, where he worked to establish the School of Engineering, creating and teaching the first digital logic and microprocessor courses. He has numerous published papers and presentations on the floating-point architecture of ARM processors, and is a named inventor on over 30 US patents in the areas of floating-point implementation, instruction set design, and circuit design.