Muutke küpsiste eelistusi

Bulk-Driven Circuit Techniques for CMOS FDSOI Processes: From Circuit Concept to Implementations [Kõva köide]

  • Formaat: Hardback, 237 pages, kõrgus x laius: 235x155 mm, 178 Illustrations, color; 33 Illustrations, black and white; XXXV, 237 p. 211 illus., 178 illus. in color., 1 Hardback
  • Ilmumisaeg: 28-Aug-2025
  • Kirjastus: Springer International Publishing AG
  • ISBN-10: 3031851137
  • ISBN-13: 9783031851131
Teised raamatud teemal:
  • Kõva köide
  • Hind: 122,82 €*
  • * hind on lõplik, st. muud allahindlused enam ei rakendu
  • Tavahind: 144,49 €
  • Säästad 15%
  • Raamatu kohalejõudmiseks kirjastusest kulub orienteeruvalt 2-4 nädalat
  • Kogus:
  • Lisa ostukorvi
  • Tasuta tarne
  • Tellimisaeg 2-4 nädalat
  • Lisa soovinimekirja
  • Formaat: Hardback, 237 pages, kõrgus x laius: 235x155 mm, 178 Illustrations, color; 33 Illustrations, black and white; XXXV, 237 p. 211 illus., 178 illus. in color., 1 Hardback
  • Ilmumisaeg: 28-Aug-2025
  • Kirjastus: Springer International Publishing AG
  • ISBN-10: 3031851137
  • ISBN-13: 9783031851131
Teised raamatud teemal:

In the contemporary technology landscape dominated by digital-centric systems and applications, the significance of analog front-end signal processing remains indispensable. The precision and performance of critical analog, mixed-signal or mm-wave components such as low-noise amplifiers, equalizers, and data converters are fundamentally determined by technological parameters, such as transconductance, DC gain, device matching, linearity, and timing accuracy, among others.

Enhancing these parameters through intrinsic design improvements presents a significant challenge and becomes infeasible beyond certain limits with state-of-the-art circuit design techniques. As the performance of CMOS transistors is fundamentally constrained, foreground or background calibration schemes are commonly employed to mitigate the limitations of MOS devices. However, these constraints can be effectively addressed through the implementation of active and passive bulk-driven circuits enabled by silicon-on-insulator (SOI) CMOS technologies. Fully-Depleted Silicon-on-Insulator (FD-SOI) CMOS technologies offer superior transistor characteristics compared to standard bulk CMOS technology, providing enhanced electrical performance, improved power efficiency, and better scalability.

This book offers a comprehensive analysis of FD-SOI CMOS technology, presenting key innovations in design methodologies and circuit implementations adopting bulk-biasing techniques across analog, digital, mixed-signal, and mmWave circuits and systems. It addresses critical transistor limitations, including finite transistor gain, offset, mismatch, noise and linearity, among others.

The authors provide detailed technical insights, mathematical modelling, design approaches and circuit realizations covering circuit advances using both static and dynamic transistor body-biasing techniques. Emphasis is placed on overcoming state-of-the-art circuit limitations such as finite DC gain, bandwidth, matching/accuracy and power efficiency. These performance metrics are rigorously investigated through mathematical modelling, validated through simulation and experimentally demonstrated using both dynamic and static body-biasing architectures.

Chapter
1. Common-Source Amplifier Feedback using Back-Gate
Transconductance.
Chapter
2. Transconductance Amplifier Linearization using
Active Back-Gate Input Signal Injection.
Chapter
3. A Gain-enhanced
Inverter-based OTA Employing Active Body-Bias Feedback.
Chapter
4. Ultra
Low-Power Voltage-Mode VCSEL-Driver with Back-Gate Bias Tuning.
Chapter
5.
Maximizing the Figures of Merit, Temperature Range, and Optimizing the
Algorithmic Design Methodologies Based on Constant Current Density Bias for
FDSOI Analog-Mixed-Signal, Digital, mm-Wave, and Fibreoptic Circuits from the
Back-Gate Voltage.
Chapter
6. A Back-Gate Linearization Technique for
Current-Steering DACs.
Chapter
7. Highly-Linear T&H-Amplifiers Utilizing
Bandwidth Boosting for Time-Interleaved ADCs.
Chapter
8. High-Speed Flash
ADC using Bulk-Driven Flash Reference Generation Technique.
Chapter
9. RF
Switches in CMOS FDSOI Process from Circuit Concepts to Implementation.-
Chapter
10. Variable Gain-Control with Bulk Biasing in mmW Amplifier.
Friedel Gerfers (Senior Member, IEEE) received the Dr.-Ing. degree from the University of Freiburg, Germany, in 2005. He has gained his first industrial R&D experience at Philips Semiconductor, Starnberg, Germany. In 2006, he joined Intel Research, Santa Clara, USA, as a Post-Doctoral Research Fellow, working on new types of piezoelectric MEMS sensors and their readout circuits. His entrepreneurial spirit led him from 2007 to 2011 to the start-up companies Aquantia and Alvand Technologies, USA. In the role of a technical director, he led the mixed-signal departments, which were crucial for the successful market positioning of these companies in the field of high-speed data transmission systems that operate close to the Shannon limit.





In 2009, he founded the technology startup, NiederRhein Technologies, Mountain View, USA. More recently, he was responsible for the worldwide development of high-precision data-converters for Integrated Device Technology (IDT), San José, USA. The team was later in 2014 acquired by Apple Inc., Cupertino, CA, USA.



Since 2015, he has been a full professor at the Technische Universität Berlin, Germany, where he is currently the director and head of the "Mixed Signal Circuit Design (MSC)" chair. In 2018, he co-founded IC4X GmbH, Berlin, which specializes in the development of high-performance analog and mixed-signal circuits and systems.



In recognition of these achievements in his field, he was awarded in 2019 the Einstein-Professorship for Mixed Signal Circuit Design from the Einstein Foundation. He is currently a member of the Scientific Advisory Board of the Leibniz Institutes - Innovations for High Performance Microelectronics (IHP) and the Ferdinand Braun Institute (FBH), and of the Research Fab Microelectronics Germany (FMD).



He is co-author of the book Continuous-Time Sigma-Delta A/D Conversion, Fundamentals, Error Correction and Robust Implementations. In addition, Dr. Gerfers has authored or co-authored several other book chapters and holds more than 18 patents.



His current research interests include energy-efficient mixed-signal integrated circuit design, self-correcting and reconfigurable analog circuits, and high-speed and high-performance data converters for wireless, wireline and optical communications systems. Dr. Gerfers is currently a member of the Technical Program Committee of the IEEE Custom Integrated Circuits Conference (CICC), the IEEE European Solid-State Devices and Circuits Conference (ESSERC), the European Microwave Week (EUMW), and the Optical Fiber Communication Conference (OFC). He was a guest editor of the IEEE Journal of Solid-State Circuits (JSSC) in 2021.