This book discusses the complex technology of building CMOS computer chips and covers some of the unusual problems that can occur during chip manufacturing. Readers will learn how plasma and process damage results from the high-energy processes that are used in chip manufacturing, causing harm to the chips, functional failure and reliability problems.
Chapter
1. BACKGROUND.
Chapter
2. THE ANTENNA EFFECT.
Chapter
3. DIODE
AND TRANSISTOR PROTECTION.
Chapter
4. SIGNATURES OF PROCESS DAMAGE.
Chapter
5. ELECTRICAL SIGNATURES OF PROCESS DAMAGE.
Chapter
6. LATENT DAMAGE AND
RELIABILITY DEGRADATION.
Chapter
7. ATOMIC-LEVEL DEFECTS AND ELECTRICAL
EFFECTS.
Chapter
8. TECHNOLOGY SPECIFIC PROCESS DAMAGE.
Chapter
9. COMMON
SOURCES OF PROCESS DAMAGE.
Chapter
10. INLINE PROCESS DAMAGE MEASUREMENTS.-
Chapter
11. PROCESS DAMAGE TEST STRUCTURES.
Chapter
12. DESIGN RULES RELATED
TO PROCESS DAMAGE .
Chapter
13. PARAMETRIC DAMAGE TESTING STRATEGY AND
PROCEDURES.
Chapter
14. THE ROLE OF HYDROGEN.
Chapter
15. METALLIC
DEFECTS.
Chapter
16. MOBILE ION CONTAMINATION.
Chapter
17. FIXED CHARGE.
Kirk D. Prall (M'82) was born in 1958. He received the Ph.D. degree in electrical engineering from the University of New Mexico, Albuquerque, in 1990. He worked for Philips Semiconductors from 1982 to 1991, in the areas of EPROM, ROM, microprocessors. He joined Micron, Inc., Boise, ID, in 1991 working on DRAM, NOR, NAND, and emerging memories. He retired from Micron in 2019 and is currently writing engineering books. He has published several papers and holds more than 200 patents.
