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Co-Design of Integrated Circuits and On-Chip Antennas Unabridged edition [Kõva köide]

  • Formaat: Hardback
  • Ilmumisaeg: 30-Jun-2021
  • Kirjastus: Artech House Publishers
  • ISBN-10: 1608078183
  • ISBN-13: 9781608078189
  • Formaat: Hardback
  • Ilmumisaeg: 30-Jun-2021
  • Kirjastus: Artech House Publishers
  • ISBN-10: 1608078183
  • ISBN-13: 9781608078189
Antennas are essential part of every wireless communication system. The increasing trend of applications in the radio frequency (RF) and millimeter wave frequency spectrum has reduced the antenna sizes to only a few millimeters, which makes it practical for on-chip implementations. Integrated Circuit (IC) designers who have traditionally remained isolated from antenna design now need to understand its design process and trade-offs. This comprehensive resource addresses the challenges, benefits and trade-offs of on-chip antenna implementation.





It presents practical design and integration considerations of the IC and antenna combination and how both ends of the system can be utilized in a complimentary way. The book includes on-chip antenna layout considerations, layout for testability and various methods of their characterization. A look at the future trends and utilization of on-chip antennas for different applications concludes the book.
Preface xi
1 Introduction To Antenna-On-Chip
1(30)
1.1 Antennas and ICs: A Brief History
2(3)
1.2 Circuit Integration Technologies
5(14)
1.2.1 Interconnection Technologies
6(2)
1.2.2 MCMs
8(4)
1.2.3 SiP
12(2)
1.2.4 SoP
14(3)
1.2.5 SoC
17(2)
1.3 On-Chip Antennas: Benefits and Opportunities
19(7)
1.3.1 Cost and Size
20(2)
1.3.2 The 50Ω Boundary: Not Needed Anymore
22(1)
1.3.3 Integration and Robustness
23(2)
1.3.4 Fabrication Precision and Repeatability
25(1)
1.4 AoC: An Inevitable Choice for the Future
26(1)
1.5 Conclusion
27(4)
References
27(4)
2 Design And Implementation Challenges
31(42)
2.1 Incompatible Silicon Substrate
32(9)
2.1.1 Low Resistivity of Silicon
33(2)
2.1.2 High Dielectric Constant of Silicon
35(1)
2.1.3 Surface Waves
36(5)
2.2 Limitations of the CMOS Stack-Up
41(1)
2.3 Modeling and Simulation Challenges
42(3)
2.3.1 Cosimulation Tools
42(3)
2.4 Size and Layout Challenges
45(8)
2.4.1 DRC
46(7)
2.5 Fabrication Tolerances
53(1)
2.6 Coupling and Interference Issues
54(7)
2.6.1 Coupling from the Antenna to the Circuit
54(2)
2.6.2 Coupling from Circuits to the Antenna
56(5)
2.7 Characterization Challenges
61(6)
2.7.1 Reflection from the Probe
63(1)
2.7.2 Radiation of the Probe
64(1)
2.7.3 Radiation Blockage or Shadowing
64(1)
2.7.4 AUT Movement Restrictions
65(1)
2.7.5 Measurement of Standalone Antennas
66(1)
2.8 Packaging Challenges
67(1)
2.9 Conclusion
68(5)
References
68(5)
3 Radiation Enhancement And Measurement Techniques
73(52)
3.1 Substrate Post-Processing Techniques
75(8)
3.1.1 Substrate Thinning
75(3)
3.1.2 High-Resistivity Substrates
78(1)
3.1.3 Substrate Micromachining
79(4)
3.2 On-Chip Reflecting Surfaces
83(7)
3.2.1 AMCs
85(5)
3.3 Off-Chip Techniques
90(13)
3.3.1 Dielectric Superstrates
91(3)
3.3.2 Artificial Dielectric Layers
94(2)
3.3.3 Dielectric Resonator Loading
96(4)
3.3.4 Dielectric Lens
100(3)
3.4 3-D and MEMS-Based Antennas
103(8)
3.4.1 Suspended Antennas
104(1)
3.4.2 Vertical Monopoles
104(2)
3.4.3 Movable Antennas
106(1)
3.4.4 Bond-Wire Antennas
107(4)
3.5 Measurement and Characterization Techniques
111(8)
3.5.1 Mitigating the Effects of On-Chip Circuits
111(2)
3.5.2 Mitigating the Effects of Measurement Setup
113(6)
3.6 Conclusion
119(6)
References
120(5)
4 Codesign Of Circuits And Antennas
125(50)
4.1 Codesign Considerations
126(7)
4.1.1 AoC in Receiver
126(4)
4.1.2 AoC in Transmitter
130(2)
4.1.3 AoC in the Transceiver
132(1)
4.2 Choice of Transistor Technology
133(2)
4.3 Impedance Matching
135(11)
4.3.1 LNA-Antenna Matching
137(3)
4.3.2 PA-Antenna Matching
140(2)
4.3.3 T/R Switch-Antenna Matching
142(4)
4.4 Circuit-Compatible Antenna Layout and Design
146(5)
4.4.1 Size and Layout Codesign
146(2)
4.4.2 Differential and Single-Ended Feeding
148(1)
4.4.3 On-Chip Antennas with Added Functionality
148(3)
4.5 Codesign to Prevent Antenna-Circuit Coupling
151(5)
4.6 Antenna Circuit Cosimulation
156(5)
4.7 Codesign of Package and Antenna
161(8)
4.7.1 Packaging Design Considerations
161(2)
4.7.2 Packaging Materials
163(2)
4.7.3 Codesign for Performance Enhancement
165(4)
4.8 Conclusion
169(6)
References
169(6)
5 Aoc Design Example
175(54)
5.1 Design Flow
175(3)
5.2 71-GHz Oscillator Transmitter with an On-Chip Monopole Antenna
178(4)
5.3 Antenna Simulation
182(14)
5.3.1 Substrate
182(3)
5.3.2 Antenna Element
185(3)
5.3.3 AMC
188(5)
5.3.4 Superstate Layer
193(1)
5.3.5 Lens Integrated Package
194(2)
5.4 Circuit Simulation
196(18)
5.4.1 Adding a Design Library
198(1)
5.4.2 Schematic Design
198(7)
5.4.3 Layout Design
205(2)
5.4.4 DRC
207(3)
5.4.5 LVS
210(1)
5.4.6 Parasitic Extraction
211(3)
5.4.7 Post-Layout Simulation
214(1)
5.5 Cosimulation
214(7)
5.5.1 Simulating the Circuit in EM Simulator
214(4)
5.5.2 Simulating the Antenna in the IC Simulator
218(3)
5.6 Fabrication
221(1)
5.7 Measurement and Characterization
222(5)
5.7.1 Standalone Characterization
222(3)
5.7.2 Active Characterization
225(2)
5.8 Conclusion
227(2)
References
228(1)
6 Future Trends In Aoc
229(18)
6.1 Performance Enhancement: A Continuing Challenge
230(1)
6.2 Codesign and Multifunctional Role of AoC
231(1)
6.3 Specialized Radios and Implantable Applications
232(2)
6.4 Energy-Harvesting AoCs
234(1)
6.5 Miniaturization of Low-Frequency AoCs
235(1)
6.6 Terahertz Applications
236(1)
6.7 MEMS and CMOS Codesign
237(1)
6.8 Wireless Networks on Chip
238(2)
6.9 Future Role of Foundries in AoC
240(1)
6.10 Advances in Simulation and Measurement
241(1)
6.11 Conclusion
242(5)
References
242(5)
Acronyms 247(8)
About the Authors 255(2)
Index 257