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Communicating Process Architectures 2004 [Pehme köide]

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  • Formaat: Paperback / softback, 428 pages, kõrgus x laius x paksus: 234x156x22 mm, kaal: 598 g, 1
  • Sari: Concurrent Systems Engineering Series v. 62
  • Ilmumisaeg: 01-Jan-2004
  • Kirjastus: IOS Press,US
  • ISBN-10: 1586034588
  • ISBN-13: 9781586034580
  • Formaat: Paperback / softback, 428 pages, kõrgus x laius x paksus: 234x156x22 mm, kaal: 598 g, 1
  • Sari: Concurrent Systems Engineering Series v. 62
  • Ilmumisaeg: 01-Jan-2004
  • Kirjastus: IOS Press,US
  • ISBN-10: 1586034588
  • ISBN-13: 9781586034580
Communicating Process Architecture (CPA) describes an approach to system development that is process-oriented. It makes no great distinction between hardware and software. It has a major root in the theory of Communicating Sequential Processes (CSP). However, the underlying theory is not limited to CSP. The importance of mobility of both channel and process within a network sees integration with ideas from the eth-calculus. Other formalisms are also exploited, such as BSP and MPI. The focus is on sound methods for the engineering of significant concurrent systems, including those that are distributed (across the Internet or within a single chip) and/or software-scheduled on a single execution unit. Traditionally, at CPA, the emphasis has been on theory and practice - developing and applying tools based upon CSP and related theories to build high-integrity systems of significant size. In particular, interest focuses on achieving scalability and security against error. The development of Java, C, and C++, libraries to facilitate secure concurrent programming using 'mainstream' languages has allowed CPA to continue and proliferate. This work continues in support of the engineering of distributed applications. Recently, there has been greater reference to theory and its more direct application to programming systems and languages. In this volume the formal CSP is very well presented. The papers provide a healthy mixture of the academic and commercial, software and hardware, application and infrastructure, which reflects the nature of the discipline.
Preface
Ian R. East, Jeremy Martin, Peter Welch, Mark Green and David Duce
vii
Programme Committee viii
Finitary Refinement Checks for Infmitary Specifications 1(18)
A.W. Roscoe
An Automatic Translation of CSP to Handel-C 19(20)
J.D. Phillips and G.S. Stiles
On Linear Time and Congruence in Channel-Passing Calculi 39(16)
F. Peschanski
Prioritised Service Architecture 55(16)
I.R. East
Debugging and Verification of Parallel Systems - The picoChip Way! 71(14)
D. Towner, G. Panesar, A. Duller, A. Gray and W. Robbins
Active Serial Port: A Component for JCSP.net Embedded Systems 85(14)
S. Clayton and J. Kerridge
The Transterpreter: A Transputer Interpreter 99(8)
C.L. Jacobsen and M. C. Jadud
Adding Mobility to Networked Channel-Types 107(20)
M. Schweigler
A Comparison of Three MPI Implementations 127(10)
B. Vinter
An Evaluation of Inter-Switch Connections 137(10)
B. Vinter and H.H. Happe
Observing Processes
A.E. Lawrence
147(10)
Triples 157(28)
A.E. Lawrence
C++CSP Networked 185(16)
N. Brown
Communicating Mobile Processes 201(18)
F.R.M Barnes and P.H. Welch
Dynamic BSP: Towards a Flexible Approach to Parallel Computing over the Grid 219(8)
J.M.R. Martin and A.V. Tiskin
CSP: The Best Concurrent-System Description Language in the World - Probably! 227(6)
M. Goldsmith
gCSP: A Graphical Tool for Designing CSP Systems 233(20)
D.S. Jovanovic, B. Orlic, G.K. Liet and J.F. Broenink
Towards a Semantics for Prioritised Alternation 253(12)
I.R. East
A Calculated Implementation of a Control System 265(16)
A.A. McEwan
Refining Industrial Scale Systems in Circus 281(30)
M. Oliveira, A. Cavalcanti and J. Woodcock
K-CSP: Component Based Development of Kernel Extensions 311(14)
B. Sputh and A.R. Allen
Chaining Communications Algorithms with Process Networks 325(14)
O. Faust, B. Sputh, D. Endler and A.R. Allen
Using CSP to Verify Aspects of an occam-to-FPGA Compiler 339(14)
R.M.A. Peel and H.F. Wong
Focussing on Traces to Link VCR and CSP 353(8)
M.L. Smith
Design of a Transputer Core and its Implementation in an FPGA 361(12)
M. Tanaka, N. Fukuchi, Y. Ooki, and C. Fukunaga
Derivation of Scalable Message-Passing Algoritlmis Using Parallel Combinatorial List Generator Functions 373(14)
A.E. Abdallah and J. Hawkins
Reconfigurable Hardware Synthesis of the IDEA Cryptographic Algorithm 387(30)
A.E. Abdallah and I.W. Damaj
Author Index 417