Introduction |
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xi | |
Acknowledgments |
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xv | |
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Introduction to PCB Design and CAD |
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1 | (14) |
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Computer-Aided Design and the OrCAD Design Suite |
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1 | (1) |
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Printed Circuit Board Fabrication |
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2 | (7) |
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PCB Cores and Layer Stack-Up |
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2 | (2) |
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4 | (1) |
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Photolithography and Chemical Etching |
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5 | (2) |
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7 | (1) |
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7 | (2) |
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Function of OrCAD PCB Editor in the PCB Design Process |
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9 | (3) |
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Design Files Created by PCB Editor |
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12 | (3) |
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12 | (1) |
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12 | (1) |
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PCB Assembly Layers and Files |
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13 | (2) |
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Introduction to the PCB Design Flow by Example |
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15 | (18) |
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Overview of the Design Flow |
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15 | (7) |
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Creating a Circuit Design with Capture |
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15 | (7) |
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Designing the PCB with PCB Editor |
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22 | (11) |
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22 | (2) |
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Drawing the Board Outline |
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24 | (1) |
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25 | (1) |
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Moving and Rotating Parts |
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25 | (2) |
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27 | (4) |
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Creating Artwork for Manufacturing |
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31 | (2) |
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Project Structures and the PCB Editor Tool Set |
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33 | (24) |
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Project Setup and Schematic Entry Details |
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33 | (5) |
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Capture Projects Explained |
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33 | (3) |
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Capture Part Libraries Explained |
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36 | (2) |
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Understanding the PCB Editor Environment and Tool Set |
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38 | (19) |
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38 | (1) |
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PCB Editor Windows and Tools |
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39 | (1) |
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39 | (1) |
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39 | (5) |
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Control Panel with Foldable Window Panes |
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44 | (2) |
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46 | (1) |
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47 | (1) |
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47 | (1) |
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Color and Visibility Dialog Box |
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48 | (1) |
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Layout Cross Section (Layer Stack-Up) Dialog Box |
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48 | (1) |
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48 | (4) |
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Manufacturing Artwork and Drill Files |
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52 | (2) |
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Understanding the Documentation Files |
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54 | (3) |
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Introduction to Industry Standards |
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57 | (14) |
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Introduction to the Standards Organizations |
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58 | (2) |
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Institute for Printed Circuits (IPC---Association Connecting Electronics Industries) |
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58 | (1) |
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Electronic Industries Alliance (EIA) |
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58 | (1) |
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Joint Electron Device Engineering Council (JEDEC) |
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59 | (1) |
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International Engineering Consortium (IEC) |
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59 | (1) |
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59 | (1) |
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American National Standards Institute (ANSI) |
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59 | (1) |
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Institute of Electrical and Electronics Engineers (IEEE) |
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60 | (1) |
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Classes and Types of PCBs |
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60 | (2) |
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60 | (1) |
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61 | (1) |
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Fabrication Types and Assembly Subclasses |
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61 | (1) |
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IPC Land Pattern Density Levels |
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62 | (1) |
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Introduction to Standard Fabrication Allowances |
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62 | (1) |
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62 | (1) |
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Breakout and Annular Ring Control |
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62 | (1) |
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PCB Dimensions and Tolerances |
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63 | (4) |
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63 | (1) |
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Tooling Area Allowances and Effective Panel Usage |
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64 | (1) |
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Standard Finished PCB Thickness |
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64 | (1) |
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65 | (1) |
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65 | (1) |
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Copper Thickness for PTHs and Vias |
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66 | (1) |
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Copper Cladding/Foil Thickness |
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66 | (1) |
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Copper Trace and Etching Tolerances |
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67 | (1) |
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68 | (1) |
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69 | (1) |
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69 | (1) |
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70 | (1) |
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70 | (1) |
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Introduction to Design for Manufacturing |
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71 | (26) |
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Introduction to PCB Assembly and Soldering Processes |
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71 | (6) |
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71 | (2) |
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73 | (4) |
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Component Placement and Orientation Guide |
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77 | (5) |
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Component Spacing for Through-Hole Devices |
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78 | (1) |
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Component Spacing for Surface-Mounted Devices |
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78 | (4) |
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Mixed THD and SMD Spacing Requirements |
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82 | (1) |
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Footprint and Padstack Design for PCB Manufacturability |
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82 | (14) |
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Land Patterns for Surface-Mounted Devices |
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84 | (6) |
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Land Patterns for Through-Hole Devices |
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90 | (6) |
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96 | (1) |
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PCB Design for Signal Integrity |
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97 | (62) |
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Circuit Design Issues Not Related to PCB Layout |
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97 | (2) |
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97 | (1) |
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98 | (1) |
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99 | (1) |
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Issues Related to PCB Layout |
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99 | (7) |
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Electromagnetic Interference and Cross Talk |
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99 | (1) |
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Magnetic Fields and Inductive Coupling |
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100 | (3) |
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103 | (2) |
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Electric Fields and Capacitive Coupling |
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105 | (1) |
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Ground Planes and Ground Bounce |
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106 | (8) |
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What Ground Is and What It Is Not |
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106 | (4) |
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110 | (1) |
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Ground Bounce and Rail Collapse |
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110 | (2) |
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Split Power and Ground Planes |
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112 | (2) |
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PCB Electrical Characteristics |
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114 | (18) |
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114 | (5) |
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119 | (5) |
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124 | (1) |
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125 | (4) |
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129 | (1) |
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Transmission Line Terminations |
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129 | (3) |
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132 | (20) |
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Parts Placement for Electrical Considerations |
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132 | (1) |
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133 | (4) |
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Bypass Capacitors and Fan-Out |
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137 | (1) |
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Trace Width for Current-Carrying Capability |
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138 | (1) |
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Trace Width for Controlled Impedance |
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139 | (10) |
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Trace Spacing for Voltage Withstanding |
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149 | (1) |
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Trace Spacing to Minimize Cross Talk (3w Rule) |
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149 | (1) |
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Traces with Acute and 90° Angles |
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150 | (2) |
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Using PSpice to Simulate Transmission Lines |
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152 | (4) |
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Simulating Digital Transmission Lines |
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153 | (3) |
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Simulating Analog Signals |
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156 | (1) |
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156 | (1) |
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157 | (2) |
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Making and Editing Capture Parts |
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159 | (38) |
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The Capture Part Libraries |
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159 | (1) |
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160 | (2) |
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160 | (1) |
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160 | (1) |
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161 | (1) |
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162 | (2) |
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The Select Tool and Settings |
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162 | (1) |
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162 | (1) |
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163 | (1) |
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163 | (1) |
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Methods of Constructing Capture Parts |
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164 | (30) |
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Constructing Parts Using the New Part Option (Design Menu) |
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164 | (12) |
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Constructing Parts with Capture Using the Design Spreadsheet |
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176 | (3) |
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Constructing Parts Using Generate Part from the Tools Menu |
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179 | (1) |
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Generating Parts with the PSpice Model Editor |
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180 | (14) |
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Constructing Capture Symbols |
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194 | (3) |
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Making and Editing Footprints |
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197 | (36) |
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Introduction to PCB Editor's Symbols Library |
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197 | (2) |
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198 | (1) |
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Composition of a Footprint |
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199 | (4) |
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200 | (1) |
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201 | (1) |
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202 | (1) |
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Minimum Footprint Requirements |
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202 | (1) |
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Optional Footprint Objects |
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202 | (1) |
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Introduction to the Padstack Designer |
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203 | (2) |
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Padstack Designer Parameters Tab |
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203 | (1) |
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Padstack Designer Layers Tab |
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204 | (1) |
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Footprint Design Examples |
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205 | (14) |
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Design of a Through-Hole Device from Scratch |
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206 | (6) |
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Design of Surface-Mount Device from an Existing Symbol |
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212 | (4) |
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PGA Design Using the Symbol Wizard |
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216 | (3) |
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Flash Symbols for Thermal Reliefs |
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219 | (3) |
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222 | (5) |
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223 | (2) |
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Creating Mechanical Drawings |
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225 | (1) |
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Placing Mechanical Symbols on a Board Design |
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226 | (1) |
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Blind, Buried, and Microvias |
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227 | (2) |
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Using the IPC-7351 Land Pattern Viewer |
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229 | (3) |
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232 | (1) |
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233 | (166) |
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233 | (1) |
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Overview of the Design Flow |
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234 | (2) |
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Dual Power Supply, Analog Design |
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236 | (68) |
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Initial Design Concept and Preparation |
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237 | (1) |
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Setting Up the Project in Capture |
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238 | (7) |
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Preparing the Design for PCB Editor |
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245 | (8) |
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253 | (23) |
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Design Rule Check and Status |
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276 | (2) |
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Defining the Layer Stack-Up |
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278 | (4) |
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282 | (3) |
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Verifying Connectivity between Pins and Planes |
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285 | (4) |
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Defining Trace Width and Spacing Rules |
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289 | (3) |
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292 | (3) |
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295 | (3) |
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298 | (6) |
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Mixed Analog/Digital Design Using Split Power, Ground Planes |
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304 | (22) |
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Mixed-Signal Circuit Design in Capture |
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304 | (6) |
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Defining the Layer Stack-Up for Split Planes |
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310 | (6) |
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Setting Up Routing Constraints |
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316 | (6) |
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Adding Ground Planes to Routing Layers |
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322 | (4) |
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Multipage, Multipower, and Multiground Mixed A/D PCB Design with PSpice |
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326 | (32) |
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326 | (1) |
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Multiplane Layer Methodologies |
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327 | (3) |
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Capture Project Setup for PSpice Simulation and Board Design |
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330 | (10) |
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Designing the Board with PCB Editor |
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340 | (8) |
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348 | (6) |
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Alternate Methods of Connecting Separate Ground Planes |
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354 | (4) |
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High-Speed Digital Design |
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358 | (25) |
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Layer Setup for Microstrip Transmission Lines |
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360 | (2) |
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Constructing a Heat Spreader with Copper Pours and Vias |
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362 | (7) |
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Determining Critical Trace Length of Transmission Lines |
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369 | (4) |
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Moated Ground Areas for Clock Circuits |
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373 | (2) |
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375 | (2) |
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377 | (3) |
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Using the Autoswap Option |
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380 | (3) |
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383 | (8) |
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Positive Plane Artwork Production |
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389 | (1) |
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Positive vs. Negative Plane File Sizes |
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389 | (1) |
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Pros and Cons of Using Positive vs. Negative Planes |
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389 | (2) |
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391 | (2) |
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Making a Custom Capture Template |
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391 | (1) |
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Making a Custom PCB Editor Board Template |
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391 | (1) |
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Making a Custom PCB Editor Technology Template |
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392 | (1) |
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393 | (3) |
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Moving on to Manufacturing |
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396 | (1) |
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396 | (3) |
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Artwork Development and Board Fabrication |
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399 | (30) |
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Schematic Design in Capture |
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399 | (1) |
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The Board Design with PCB Editor |
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400 | (21) |
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400 | (2) |
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Placing Mechanical Symbols |
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402 | (3) |
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Generating Manufacturing Data |
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405 | (1) |
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Generating the Artwork Files |
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405 | (10) |
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415 | (2) |
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Generating Route Path Files |
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417 | (2) |
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Generating the Route File |
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419 | (1) |
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420 | (1) |
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Using CAD Tools to 3-D Model the PCB Design |
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421 | (2) |
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423 | (2) |
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Receipt Inspection and Testing |
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425 | (1) |
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Generating Pick and Place Files |
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425 | (3) |
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428 | (1) |
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429 | (38) |
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Appendix A List of Design Standards |
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431 | (2) |
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Appendix B Partial List of Packages and Footprints and Some of the Footprints Included in OrCAD Layout |
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433 | (14) |
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Appendix C Rise and Fall Times for Various Logic Families |
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447 | (2) |
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Appendix D Drill and Screw Dimensions |
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449 | (2) |
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Appendix E References by Subject |
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451 | (16) |
Index |
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467 | |