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Computers as Components: Principles of Embedded Computing System Design 5th edition [Pehme köide]

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(Department of Computer Science and Engineering, University of Nebraska, Lincoln, NE, USA)
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Computers as Components: Principles of Embedded Computing System Design 5th editionSuurem pilt
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Computers as Components: Principles of Embedded Computing System Design, Fifth Edition continues to focus on foundational content in embedded systems technology and design while updating material throughout the book and introducing new content on machine learning and Internet-of-Things (IoT) systems.
  • Uses real processors to demonstrate both technology and techniques
  • Shows readers how to apply principles to actual design practice
  • Stresses necessary fundamentals that can be applied to evolving technologies and helps readers gain facility to design large, complex embedded systems
  • Covers the design of Internet-of-Things (IoT) devices and systems, including applications, devices and communication systems and databases
  • Describes wireless communication standards such as Bluetooth® and ZigBee®
  • Introduces a new chapter on machine learning applications, techniques and edge intelligence
Foreword to the First Edition xvii
Preface to the First Edition xix
Preface to the Second Edition xxiii
Preface to the Third Edition xxv
Preface to the Fourth Edition xxvii
Preface to the Fifth Edition xxix
Chapter 1 Embedded Computing
1(52)
1.1 Introduction
1(1)
1.2 Complex systems and microprocessors
1(9)
1.2.1 Embedding computers
2(2)
1.2.2 Characteristics of embedded computing applications
4(1)
1.2.3 Why use microprocessors?
5(2)
1.2.4 Embedded computing, IoT systems, and Cyber-Physical Systems
7(1)
1.2.5 Safety and security
7(1)
1.2.6 Challenges in embedded computing system design
8(1)
1.2.7 Performance of embedded computing systems
9(1)
1.3 The embedded system design process
10(19)
1.3.1 Requirements
12(5)
1.3.2 Specification
17(1)
1.3.3 Architecture design
18(2)
1.3.4 Designing hardware and software components
20(1)
1.3.5 System integration
20(1)
1.3.6 Formalisms for system design
21(1)
1.3.7 Structural description
22(4)
1.3.8 Behavioral description
26(3)
1.4 Design example: Model train controller
29(14)
1.4.1 Requirements
31(1)
1.4.2 Digital Command Control (DCC)
32(1)
1.4.3 Conceptual specification
33(3)
1.4.4 Detailed specification
36(7)
1.4.5 Lessons learned
43(1)
1.5 A guided tour of this book
43(6)
1.5.1
Chapter 2: Instruction sets
44(1)
1.5.2
Chapter 3: CPUs
45(1)
1.5.3
Chapter 4: Computing platforms
45(1)
1.5.4
Chapter 5: Program design and analysis
46(1)
1.5.5
Chapter 6: Processes and operating systems
47(1)
1.5.6
Chapter 7: System design techniques
48(1)
1.5.7
Chapter 8: Internet-of-Things
48(1)
1.5.8
Chapter 9: Automotive and aerospace systems
49(1)
1.5.9
Chapter 10: Embedded multiprocessors
49(1)
1.6 Summary
49(4)
What we learned
49(1)
Further reading
50(1)
Questions
50(2)
Lab exercises
52(1)
Chapter 2 Instruction Sets
53(44)
2.1 Introduction
53(1)
2.2 Preliminaries
53(7)
2.2.1 Computer architecture taxonomy
54(3)
2.2.2 Assembly languages
57(1)
2.2.3 VLIW processors
58(2)
2.3 ARM processor
60(16)
2.3.1 Processor and memory organization
60(1)
2.3.2 Data operations
61(8)
2.3.3 Flow of control
69(7)
2.3.4 Advanced Arm features
76(1)
2.4 PICmicro mid-range family
76(4)
2.4.1 Processor and memory organization
77(1)
2.4.2 Data operations
77(1)
2.4.3 Flow of control
78(2)
2.5 TI C55x DSP
80(11)
2.5.1 Processor and memory organization
81(2)
2.5.2 Addressing modes
83(3)
2.5.3 Data operations
86(1)
2.5.4 Flow of control
87(2)
2.5.5 C coding guidelines
89(2)
2.6 TI C64x
91(2)
2.7 Summary
93(4)
What we learned
94(1)
Further reading
94(1)
Questions
94(2)
Lab exercises
96(1)
Chapter 3 CPUs
97(64)
3.1 Introduction
97(1)
3.2 Programming input and output
98(18)
3.2.1 I/O devices
98(2)
3.2.2 Input and output primitives
100(1)
3.2.3 Busy-wait I/O
101(2)
3.2.4 Interrupts
103(13)
3.3 Supervisor mode, exceptions, and traps
116(2)
3.3.1 Supervisor mode
116(1)
3.3.2 Exceptions
117(1)
3.3.3 Traps
117(1)
3.4 Coprocessors
118(1)
3.5 Memory system mechanisms
118(12)
3.5.1 Caches
119(6)
3.5.2 Memory management units and address translation
125(4)
3.5.3 Memory protection units
129(1)
3.6 CPU performance
130(6)
3.6.1 Pipelining
131(5)
3.6.2 Cache performance
136(1)
3.7 CPU power consumption
136(4)
3.7.1 CMOS power consumption
136(1)
3.7.2 Power management modes
137(2)
3.7.3 Program-level power management
139(1)
3.8 Safety and security
140(2)
3.9 Design example: Data compressor
142(12)
3.9.1 Requirements and algorithm
142(2)
3.9.2 Specification
144(2)
3.9.3 Program design
146(6)
3.9.4 Testing
152(2)
3.10 Summary
154(7)
What we learned
154(1)
Further reading
154(1)
Questions
155(4)
Lab exercises
159(2)
Chapter 4 Computing Platforms
161(58)
4.1 Introduction
161(1)
4.2 Basic computing platforms
161(4)
4.2.1 Platform hardware components
162(2)
4.2.2 Platform software components
164(1)
4.3 The CPU bus
165(12)
4.3.1 Bus organization and protocol
165(7)
4.3.2 Direct memory access
172(3)
4.3.3 System bus configurations
175(2)
4.4 Memory devices and systems
177(4)
4.4.1 Memory system organization
179(2)
4.5 I/O devices
181(2)
4.6 Designing with computing platforms
183(11)
4.6.1 Example platforms
183(1)
4.6.2 Choosing a platform
184(3)
4.6.3 Intellectual property
187(1)
4.6.4 Development environments
188(1)
4.6.5 Watchdog timers
189(1)
4.6.6 Debugging techniques
189(3)
4.6.7 Debugging challenges
192(2)
4.7 Embedded file systems
194(1)
4.8 Platform-level performance analysis
194(6)
4.9 Platform-level power management
200(1)
4.10 Platform security
201(1)
4.11 Design example: alarm clock
202(8)
4.11.1 Requirements
202(2)
4.11.2 Specification
204(4)
4.11.3 System architecture
208(1)
4.11.4 Component design and testing
209(1)
4.11.5 System integration and testing
210(1)
4.12 Design example: jet engine controller
210(3)
4.12.1 Theory of operation and requirements
210(1)
4.12.2 Specifications
211(1)
4.12.3 System architecture
211(1)
4.12.4 Component design
212(1)
4.12.5 System integration and testing
212(1)
4.13 Summary
213(6)
What we learned
213(1)
Further reading
213(1)
Questions
213(4)
Lab exercises
217(2)
Chapter 5 Program Design and Analysis
219(102)
5.1 Introduction
219(1)
5.2 Components for embedded programs
220(10)
5.2.1 State machines
220(2)
5.2.2 Circular buffers and stream-oriented programming
222(6)
5.2.3 Queues and producer/consumer systems
228(2)
5.3 Models of programs
230(5)
5.3.1 Data flow graphs
230(3)
5.3.2 Control/data flow graphs
233(2)
5.4 Assembly, linking, and loading
235(7)
5.4.1 Assemblers
236(4)
5.4.2 Linking
240(2)
5.4.3 Object code design
242(1)
5.5 Compilation techniques
242(18)
5.5.1 The compilation process
243(1)
5.5.2 Basic compilation methods
244(8)
5.5.3 Compiler optimizations
252(8)
5.6 Program-level performance analysis
260(10)
5.6.1 Analysis of program performance
262(5)
5.6.2 Measurement-driven performance analysis
267(3)
5.7 Software performance optimization
270(5)
5.7.1 Basic loop optimizations
270(2)
5.7.2 Cache-oriented loop optimizations
272(2)
5.7.3 Performance optimization strategies
274(1)
5.8 Program-level energy, and power analysis and optimization
275(4)
5.9 Analysis and optimization of program size
279(1)
5.10 Program validation and testing
280(10)
5.10.1 Clear-box testing
281(7)
5.10.2 Black-box testing
288(1)
5.10.3 Evaluating functional tests
289(1)
5.11 Safety and security
290(2)
5.12 Design example: software modem
292(4)
5.12.1 Theory of operation and requirements
292(2)
5.12.2 Specification
294(1)
5.12.3 System architecture
294(1)
5.12.4 Component design and testing
295(1)
5.12.5 System integration and testing
296(1)
5.13 Design example: digital still camera
296(12)
5.13.1 Theory of operation and requirements
296(5)
5.13.2 Specification
301(4)
5.13.3 System architecture
305(1)
5.13.4 Component design and testing
306(1)
5.13.5 System integration and testing
306(2)
5.14 Summary
308(13)
What we learned
308(1)
Further reading
308(1)
Questions
309(9)
Lab exercises
318(3)
Chapter 6 Processes and Operating Systems
321(60)
6.1 Introduction
321(1)
6.2 Multiple tasks and processes
322(2)
6.3 Multirate systems
324(10)
6.3.1 Timing requirements for processes
326(4)
6.3.2 CPU usage metrics
330(1)
6.3.3 Process state and scheduling
331(1)
6.3.4 Running periodic processes
332(2)
6.4 Preemptive Real-Time Operating Systems
334(6)
6.4.1 Two basic concepts
335(1)
6.4.2 Processes and context
336(3)
6.4.3 Processes and object-oriented design
339(1)
6.5 Priority-based scheduling
340(16)
6.5.1 Rate-monotonic scheduling
341(4)
6.5.2 Earliest-deadline-first scheduling
345(4)
6.5.3 RMS vs. EDF
349(1)
6.5.4 Shared resources, mutexes, and semaphores
349(3)
6.5.5 Priority inversion
352(1)
6.5.6 Scheduling for low power
353(1)
6.5.7 A closer look at our modeling assumptions
353(2)
6.5.8 Events and sporadic tasks
355(1)
6.6 Interprocess communication mechanisms
356(5)
6.6.1 Shared memory communication
357(1)
6.6.2 Message passing
358(1)
6.6.3 Signals
359(1)
6.6.4 Mailboxes
360(1)
6.7 Evaluating operating system performance
361(4)
6.8 POSIX real-time operating systems
365(1)
6.9 Design example: engine control unit
366(5)
6.9.1 Theory of operation and requirements
366(1)
6.9.2 Specification
367(1)
6.9.3 System architecture
368(3)
6.9.4 Component design and testing
371(1)
6.9.5 System integration and testing
371(1)
6.10 Summary
371(10)
What we learned
372(1)
Further reading
372(1)
Questions
372(6)
Lab exercises
378(3)
Chapter 7 System Design Techniques
381(30)
7.1 Introduction
381(1)
7.2 Design methodologies
381(4)
7.2.1 Why design methodologies?
381(2)
7.2.2 Design methodologies for embedded computing
383(2)
7.3 Requirements analysis and specification
385(6)
7.3.1 Requirements capture
385(4)
7.3.2 From requirements to specification
389(1)
7.3.3 Validating the specification
389(2)
7.4 System modeling
391(7)
7.4.1 Model-based design
391(3)
7.4.2 UML dialects for modeling
394(4)
7.5 System analysis and architecture design
398(2)
7.5.1 Design patterns
398(2)
7.5.2 Transaction-level modeling
400(1)
7.6 Dependability, safety, and security
400(9)
7.6.1 Quality assurance techniques
401(2)
7.6.2 Design reviews
403(1)
7.6.3 Safety-oriented methodologies
404(4)
7.6.4 Security
408(1)
7.7 Summary
409(2)
What we learned
409(1)
Further reading
409(1)
Questions
409(1)
Lab exercises
410(1)
Chapter 8 Internet-of-Things Systems
411(26)
8.1 Introduction
411(1)
8.2 IoT system applications
411(2)
8.3 IoT system architectures
413(1)
8.4 Networks for IoT
414(14)
8.4.1 The open systems interconnection model
415(1)
8.4.2 Ip
416(3)
8.4.3 IoT networking concepts
419(4)
8.4.4 Bluetooth and Bluetooth Low Energy
423(2)
8.4.5 802.15.4 and ZigBee
425(2)
8.4.6 Wi-Fi
427(1)
8.4.7 LoRa
428(1)
8.5 Databases and timewheels
428(4)
8.5.1 Databases
428(3)
8.5.2 Timewheels
431(1)
8.6 Example: smart home
432(3)
8.7 Summary
435(2)
What we learned
435(1)
Further reading
435(1)
Questions
435(1)
Lab exercises
436(1)
Chapter 9 Automotive and Aerospace Systems
437(16)
9.1 Introduction
437(1)
9.2 Vehicular use cases
437(3)
9.2.1 Vehicles as cyber-physical systems
437(2)
9.2.2 Driver assistance and autonomy
439(1)
9.3 Networked control systems in cars and airplanes
440(3)
9.3.1 Network devices
440(2)
9.3.2 Vehicle network architectures
442(1)
9.4 Vehicular networks
443(5)
9.4.1 CAN bus
443(3)
9.4.2 Other automotive networks
446(2)
9.5 Safety and security
448(3)
9.6 Summary
451(2)
What we learned
451(1)
Further reading
451(1)
Questions
452(1)
Lab exercises
452(1)
Chapter 10 Embedded Multiprocessors
453(32)
10.1 Introduction
453(1)
10.2 Why multiprocessors?
453(3)
10.3 Categories of multiprocessors
456(1)
10.4 MPSoCs and shared memory multiprocessors
457(15)
10.4.1 Heterogeneous shared memory multiprocessors
457(1)
10.4.2 Accelerators
458(2)
10.4.3 Accelerator performance analysis
460(5)
10.4.4 Scheduling and allocation
465(2)
10.4.5 System integration
467(5)
10.4.6 Debugging
472(1)
10.5 Design example: video accelerator
472(9)
10.5.1 Video compression
472(2)
10.5.2 Algorithm and requirements
474(2)
10.5.3 Specification
476(2)
10.5.4 Architecture
478(2)
10.5.5 Component design
480(1)
10.5.6 System testing
481(1)
10.6 Summary
481(4)
What we learned
481(1)
Further reading
482(1)
Questions
482(1)
Lab exercises
483(2)
Glossary 485(20)
References 505(14)
Index 519