Preface |
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xiii | |
About the Author |
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xvii | |
1 Introduction |
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1 | (26) |
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1.1 Silicon: The Semiconductor |
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2 | (1) |
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2 | (2) |
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1.3 Revolution in Integrated Circuit Fabrication Technology and the Art of Device Miniaturization |
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4 | (2) |
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1.4 Use of Silicon as a Semiconductor |
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6 | (5) |
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1.5 Silicon Devices for Boolean Applications |
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11 | (1) |
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1.6 Integration of Silicon Devices and the Art of Circuit Miniaturization |
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12 | (6) |
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1.7 MOS and CMOS Devices for Digital Applications |
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18 | (1) |
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1.8 LSI, VLSI, and ULSI Circuits and Applications |
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18 | (2) |
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1.9 Silicon for MEMS Applications |
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20 | (3) |
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23 | (1) |
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23 | (4) |
2 Silicon: The Key Material for Integrated Circuit Fabrication Technology |
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27 | (18) |
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27 | (1) |
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2.2 Preparation of Raw Silicon Material |
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28 | (1) |
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2.3 Metallurgical-Grade Silicon |
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29 | (2) |
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2.4 Purification of Metallurgical-Grade Silicon |
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31 | (6) |
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2.5 Ultra-High Pure Silicon for Electronics Applications |
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37 | (1) |
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2.6 Polycrystalline Silicon Feed for Crystal Growth |
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37 | (4) |
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41 | (1) |
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41 | (4) |
3 Importance of Single Crystals for Integrated Circuit Fabrication |
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45 | (14) |
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45 | (1) |
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45 | (2) |
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3.2.1 Different Crystal Structures in Nature |
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47 | (1) |
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47 | (1) |
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3.3 Diamond Crystal Structure |
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47 | (1) |
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3.3.1 Silicon Crystal Structure |
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47 | (1) |
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3.3.2 Silicon Crystals and Atomic Packing Factors |
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48 | (1) |
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3.4 Crystal Order and Perfection |
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48 | (2) |
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3.5 Crystal Orientations and Planes |
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50 | (4) |
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3.6 Influence of Dopants and Impurities in Silicon Crystals |
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54 | (4) |
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58 | (1) |
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58 | (1) |
4 Different Techniques for Growing Single-Crystal Silicon |
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59 | (98) |
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59 | (1) |
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4.2 Bridgman Crystal Growth Technique |
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60 | (1) |
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4.3 Czochralski Crystal Growth/Pulling Technique |
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60 | (64) |
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4.3.1 Crucible Choice for Molten Silicon |
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64 | (8) |
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4.3.2 Chamber Temperature Profile |
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72 | (5) |
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4.3.3 Seed Selection for Crystal Pulling |
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77 | (5) |
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4.3.4 Environmental and Ambient Control in the Crystal Chamber |
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82 | (2) |
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4.3.5 Crystal Pull Rate and Seed/Crucible Rotation |
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84 | (10) |
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4.3.6 Dopant Addition for Growing Doped Crystals |
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94 | (6) |
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94 | (1) |
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95 | (1) |
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96 | (1) |
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96 | (1) |
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96 | (1) |
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97 | (2) |
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99 | (1) |
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4.3.7 Methods for Continuous Czochralski Crystal Growth |
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100 | (2) |
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4.3.8 Impurity Segregation Between Liquid and Grown Silicon Crystals |
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102 | (5) |
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4.3.9 Crystal Growth Striations |
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107 | (1) |
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4.3.10 Use of a Magnetic Field in the Czochralski Growth Technique |
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108 | (9) |
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4.3.11 Large-Area Silicon Crystals for VLSI and ULSI Applications |
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117 | (5) |
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4.3.12 Post-Growth Thermal Gradient and Crystal Cooling after Pull-Out |
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122 | (2) |
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4.4 Float-Zone Crystal Growth Technique |
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124 | (11) |
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125 | (1) |
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4.4.2 Environment and Chamber Ambient Control |
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125 | (1) |
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4.4.3 Heating Mechanisms and RF Coil Shape |
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125 | (1) |
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4.4.4 Crystal Growth Rate and Seed Rotation |
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126 | (2) |
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4.4.5 Dopant Distribution in Growing Crystals |
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128 | (2) |
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4.4.6 Impurity Segregation between Liquid and Grown Silicon Crystals |
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130 | (1) |
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4.4.7 Use of Magnetic Fields for Float-Zone Growth |
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130 | (1) |
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4.4.8 Large Area Silicon Crystals and Limitations of Shape and Size |
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131 | (4) |
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4.4.9 Thermal Gradient and Post-Growth Crystal Cooling |
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135 | (1) |
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4.5 Zone Refining of Single-Crystal Silicon |
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135 | (1) |
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4.6 Other Silicon Crystalline Structures and Growth Techniques |
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136 | (2) |
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136 | (1) |
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137 | (1) |
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4.6.3 Silicon Whiskers and Fibers |
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137 | (1) |
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4.6.4 Silicon in Circular and Spherical Shapes |
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137 | (1) |
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4.6.5 Silicon Hollow Tubes |
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138 | (1) |
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4.6.6 Casting of Polycrystalline Silicon for Photovoltaic Applications |
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138 | (1) |
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138 | (1) |
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139 | (18) |
5 From Silicon Ingots to Silicon Wafers |
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157 | (18) |
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157 | (1) |
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5.2 Radial Resistivity Measurements |
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157 | (1) |
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5.3 Boule Formation, Identification of Crystal Orientation, and Flats |
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158 | (4) |
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162 | (2) |
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5.5 Mechanical Lapping of Wafer Slices |
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164 | (3) |
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5.6 Edge Profiling of Slices |
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167 | (1) |
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5.7 Chemical Etching and Mechanical Damage Removal |
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167 | (1) |
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5.8 Chemimechanical Polishing for Planar Wafers |
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168 | (2) |
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5.9 Surface Roughness and Overall Wafer Topography |
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170 | (1) |
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170 | (1) |
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5.11 Final Cleaning and Inspection |
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171 | (1) |
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171 | (1) |
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172 | (3) |
6 Evaluation of Silicon Wafers |
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175 | (50) |
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175 | (1) |
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6.2 Acoustic Laser Probing Technique |
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175 | (3) |
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6.3 Atomic-Force Microscope Studies on Surfaces |
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178 | (1) |
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6.4 Auger Electron Spectroscopic Studies |
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178 | (3) |
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6.5 Chemical Staining and Etching Techniques |
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181 | (3) |
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6.6 Contactless Characterization |
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184 | (1) |
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6.7 Deep-Level Transient Spectroscopy |
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185 | (2) |
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6.8 Defect Decoration by Metals |
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187 | (1) |
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6.9 Electron Beam and High-Energy Electron Diffraction Studies |
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188 | (1) |
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6.10 Flame Emission Spectrometry |
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188 | (1) |
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6.11 Four-Point Probe Technique for Resistivity Measurement and Mapping |
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189 | (2) |
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6.12 Fourier Transform Infrared Spectroscopy Measurements for Impurity Identification |
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191 | (4) |
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195 | (1) |
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195 | (1) |
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6.15 Mass Spectra Analysis |
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196 | (1) |
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6.16 Minority Carrier Diffusion Length/Lifetime/Surface Photovoltage |
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197 | (2) |
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6.17 Optical Methods for Impurity Evaluation |
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199 | (1) |
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6.18 Photoluminescence Method for Determining Impurity Concentrations |
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199 | (2) |
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6.19 Gamma-Ray Diffractometry |
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201 | (1) |
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6.20 Scanning Electron Microscopy for Defect Analysis |
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201 | (1) |
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6.21 Scanning Optical Microscope |
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202 | (1) |
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6.22 Secondary Ion Mass Spectrometer for Impurity Distribution |
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203 | (2) |
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6.23 Spreading Resistance and Two-Point Probe Measurement Technique |
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205 | (2) |
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207 | (2) |
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6.25 Transmission Electron Microscopy |
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209 | (1) |
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6.26 van der Pauw Resistivity Measurement Technique for Irregular-Shaped Wafers |
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210 | (1) |
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6.27 X-ray Technique for Crystal Perfection and Dislocation Density |
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210 | (4) |
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214 | (1) |
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214 | (11) |
7 Resistivity and Impurity Concentration Mapping of Silicon Wafers |
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225 | (22) |
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225 | (3) |
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7.2 Electrically Active and Inactive Impurities |
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228 | (1) |
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7.3 Surface Mapping and Concentration Contours |
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228 | (1) |
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7.4 Surface Roughness Mapping on a Complete Wafer |
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229 | (15) |
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244 | (1) |
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245 | (2) |
8 Impurities in Silicon Wafers |
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247 | (46) |
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8.1 Effect of Intentional and Unintentional Impurities and Their Influence on Silicon Devices |
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247 | (3) |
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8.2 Intentional Dopant Impurities in Silicon Wafers |
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250 | (4) |
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250 | (1) |
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250 | (1) |
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251 | (1) |
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252 | (1) |
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253 | (1) |
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253 | (1) |
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8.3 Unintentional Dopant Impurities in Silicon Wafers |
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254 | (28) |
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255 | (4) |
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259 | (1) |
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260 | (1) |
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261 | (1) |
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261 | (1) |
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262 | (1) |
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262 | (1) |
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263 | (2) |
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265 | (1) |
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265 | (3) |
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268 | (13) |
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281 | (1) |
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8.4 Other Metallic Impurities |
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282 | (1) |
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282 | (1) |
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283 | (10) |
9 Defects in Silicon Wafers |
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293 | (54) |
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293 | (1) |
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9.2 Impact of Defects in Silicon Devices and Structures |
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294 | (4) |
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9.3 Point Defects and Vacancies |
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298 | (6) |
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304 | (2) |
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9.5 Bulk Defects and Voids |
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306 | (4) |
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9.6 Dislocations and Screw Dislocations |
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310 | (2) |
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312 | (3) |
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315 | (7) |
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322 | (4) |
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9.10 Surface Pits/Crystal-Originated Particles |
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326 | (3) |
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9.11 Grown Vacancies and Defects |
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329 | (2) |
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331 | (1) |
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9.13 Slips, Cracks, and Shape Irregularities |
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332 | (2) |
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9.14 Stress, Bowing, and Warpage |
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334 | (3) |
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337 | (1) |
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337 | (10) |
10 Silicon Wafer Preparation for VLSI and ULSI Processing |
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347 | (30) |
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347 | (1) |
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10.2 Purity of Chemicals Used for Silicon Processing |
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347 | (1) |
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10.3 Degreasing of Silicon Wafers |
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348 | (1) |
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10.4 Removal of Metallic and Other Impurities |
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348 | (3) |
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10.5 Gettering of Metallic Impurities |
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351 | (11) |
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10.6 Denuding of Silicon Wafers |
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362 | (4) |
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366 | (1) |
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10.8 Argon Annealing of Wafers |
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366 | (2) |
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10.9 Hydrogen Annealing of Wafers |
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368 | (3) |
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10.10 Final Cleaning, Rinsing, and Wafer Drying |
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371 | (1) |
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371 | (1) |
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372 | (5) |
11 Packing of Silicon Wafers |
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377 | (18) |
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11.1 Packing of Fully Processed Blank Silicon Wafers |
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377 | (11) |
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11.2 Storage of Wafers and Control of Particulate Contamination |
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388 | (4) |
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11.3 Storage of Wafers and Control of Particulate Contamination with Process-Bound Wafers |
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392 | (1) |
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392 | (1) |
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393 | (2) |
Index |
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395 | |