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Designing Audio Power Amplifiers [Pehme köide]

4.46/5 (26 hinnangut Goodreads-ist)

Bob Cordell

Formaat: Paperback / softback, 640 pages, kõrgus x laius x paksus: 244x180x33 mm, kaal: 1032 g, 100 Illustrations
Ilmumisaeg: 16-Nov-2010
Kirjastus: TAB Books Inc
ISBN-10: 007164024X
ISBN-13: 9780071640244

Teised raamatud teemal:

Communications engineering / telecommunications

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Formaat: Paperback / softback, 640 pages, kõrgus x laius x paksus: 244x180x33 mm, kaal: 1032 g, 100 Illustrations
Ilmumisaeg: 16-Nov-2010
Kirjastus: TAB Books Inc
ISBN-10: 007164024X
ISBN-13: 9780071640244

Teised raamatud teemal:

Communications engineering / telecommunications

Püsilink: https://www.kriso.ee/db/9780071640244.html

Märksõnad:

"This practical guide is the single best source for designing and optimizing high-performance audio power amplifiers--for fun or profit"--

Provided by publisher.

This comprehensive book on audio power amplifier design will appeal to members of the professional audio engineering community as well as the hobbyist. Designing Audio Power Amplifiers begins with power amplifier design basics that a novice can understand and moves all the way through to in-depth design techniques for the very sophisticated audiophile and professional audio power amplifier designer. This is the single best source of knowledge for anyone who wants to design an audio power amplifier, whether for fun or profit.

The single best source for designing and optimizing high-performance audio power amplifiers

Designing Audio Power Amplifiers covers power amplifier basics all the way through to in-depth design techniques. This practical guide teaches you how to understand the concepts and nuances of power amplifiers, then analyze and synthesize the many possible variations of audio power amplifier design. An accompanying website includes invaluable downloads (SPICE, LTspice™, and Working LTspice simulations and models, datasheets of all transistors used in the book) to help you get started designing high-performance amplifiers quickly.

Designing Audio Power Amplifiers covers:

Ultra-low distortion input and voltage amplifier topologies
Non-conventional feedback compensation techniques
Lateral and vertical MOSFET power amplifiers
Output stage error correction circuits
Thermal stability analysis of BJT and MOSFET output stages
Output transistors with integral temperature tracking diodes
Integrated circuit amplifiers and drivers
SPICE simulation for amplifier design, including distortion analysis
Amplifier measurement instrumentation and techniques
PC-based instrumentation for amplifier evaluation
How amplifiers misbehave and why they sound different

Complete coverage of audio power amplifiers:
Basics; Power Amplifier Design Evolution; Negative Feedback, Compensation and Slew Rate; Amplifier Classes, Output Stages and Efficiency; Integrated Circuit Power Amplifiers and Drivers; Summary of Amplifier Design Considerations; Advanced Power Amplifier Design Techniques; Input and VAS Circuits; Advanced Forms of Feedback Compensation; Output Stage Design and Crossover Distortion; MOSFET Power Amplifiers; Error Correction; BJT and MOSFET Output Transistors; Other Sources of Distortion; Real-World Design Considerations; Output Stage Thermal Design and Stability; Safe Area and Short Circuit Protection; Power Supplies and Grounding; Clipping Control and Civilized Amplifier Behavior; Interfacing the Real World; Simulation and Measurement; SPICE Simulation; SPICE Models and Libraries; Audio Instrumentation; Distortion and its Measurement; Other Amplifier Tests; The Negative Feedback Controversy; Amplifiers without Negative Feedback; Balanced and Bridged Amplifiers

Preface

xxix

Acknowledgments

xxxi

Part 1 Audio Power Amplifier Basics

(124)

1 Introduction

(12)

1.1 Organization of the Book

(1)

1.2 The Role of the Power Amplifier

(1)

1.3 Basic Performance Specifications

(2)

Rated Output Power

(1)

Frequency Response

(1)

Noise

(1)

Distortion

(1)

1.4 Additional Performance Specifications

(3)

Damping Factor

(1)

Dynamic Headroom

(1)

Slew Rate

(1)

Output Current

(1)

Minimum Load Impedance

(1)

1.5 Output Voltage and Current

(1)

1.6 Basic Amplifier Topology

(3)

1.7 Summary

(1)

References

(1)

2 Power Amplifier Basics

(38)

2.1 About Transistors

(10)

Current Gain

(1)

Base-Emitter Voltage

(1)

The Gummel Plot

(1)

Transconductance

(1)

Input Resistance

(1)

Early Effect

(1)

Junction Capacitance

(1)

Speed and ƒT

(2)

The Hybrid Pi Model

(1)

The Ideal Transistor

(1)

Safe Operating Area

(1)

JFETs and MOSFETs

(1)

2.2 Circuit Building Blocks

(16)

Common-Emitter Stage

(2)

Bandwidth of the Common-Emitter Stage and Miller Effect

(1)

Differential Amplifier

(2)

Emitter Follower

(3)

Cascode

(1)

Current Mirror

(2)

Current Sources

(4)

Vbe Multiplier

(1)

2.3 Amplifier Design Analysis

(10)

Basic Operation

(1)

Input Stage

(1)

The VAS

(1)

Open-Loop Gain

(1)

Miller Feedback Compensation

(2)

The Output Stage

(2)

Output Stage Bias Current

(1)

Performance Limitations of the Simple Amplifier

(1)

References

(2)

3 Power Amplifier Design Evolution

(26)

3.1 The Basic Power Amplifier

(2)

3.2 Adding Input Stage Degeneration

(4)

3.3 Adding a Darlington VAS

(3)

3.4 Input Stage Current Mirror Load

(2)

3.5 The Output Triple

(4)

3.6 Cascoded VAS

(1)

3.7 Paralleling Output Transistors

(3)

3.8 Higher-Power Amplifiers

(1)

3.9 Crossover Distortion

(2)

3.10 Performance Summary

(1)

3.11 Completing an Amplifier

(2)

Input Network

(1)

Feedback AC Decoupling Network

(1)

Output Network

(1)

Power Supply Decoupling

(1)

3.12 Summary

(1)

References

(2)

4 Negative Feedback Compensation and Slew Rate

(18)

4.1 How Negative Feedback Works

(1)

4.2 Input-Referred Feedback Analysis

(1)

4.3 Feedback Compensation and Stability

(3)

Poles and Zeros

(1)

Phase and Gain Margin

(2)

Gain and Phase Variation

(1)

4.4 Feedback Compensation Principles

(3)

Dominant Pole Compensation

(1)

Excess Phase

(1)

Lag Compensation

(1)

Miller Compensation

(1)

4.5 Evaluating Loop Gain

(2)

Breaking the Loop

(2)

Exposing Open-Loop Gain

(1)

Simulation

(1)

4.6 Evaluating Stability

(3)

Probing Internal Nodes in Simulation

(1)

Checking Gain Margin

(1)

Checking Phase Margin

(1)

Recommendations

(1)

4.7 Compensation Loop Stability

(1)

4.8 Slew Rate

(2)

Calculating the Required Miller Capacitance

(1)

Slew Rate

(1)

References

(2)

5 Amplifier Classes, Output Stages, and Efficiency

(20)

5.1 Class A, AB, and B Operation

(1)

5.2 The Complementary Emitter Follower Output Stage

(5)

Output Stage Voltage Gain

(2)

The Optimal Class AB Bias Condition

101

(1)

Output Stage Bias Current

101

(1)

gm Doubling

102

(1)

The Small Class A Region of Many Amplifiers

103

(1)

5.3 Output Stage Efficiency

103

(2)

Heat versus Sound Quality

104

(1)

Estimating Power Dissipation

104

(1)

Estimating the Input Power

104

(1)

An Example

105

(1)

5.4 Complementary Feedback Pair Output Stages

105

(5)

The Quasi-Complementary Output Stage

106

(1)

The CFP Output Stage

106

(1)

Biasing and Thermal Stability

107

(1)

Optimum Class AB Bias Point and gm Doubling

107

(1)

High-Frequency Stability

107

(1)

Turn-Off Issues in CFP Output Stages

107

(1)

Miller Effect in the CFP Output Stage

108

(1)

CFP Triples

108

(1)

CFP Degeneration

108

(2)

5.5 Stacked Output Stage

110

(1)

Cascode Output Stage

110

(1)

Soft Rail Regulation

110

(1)

5.6 Classes G and H

110

(5)

Conflicting Terminology

110

(1)

Class G Operation

111

(2)

Class G Efficiency

113

(1)

Choice of Intermediate Rail Voltage

113

(1)

Headroom Considerations

113

(1)

Rail Commutation Diode Speed

114

(1)

The Transition to Cascode Operation

114

(1)

Safe Operating Area

114

(1)

5.7 Class D

115

(1)

References

115

(2)

6 Summary of Amplifier Design Considerations

117

(8)

6.1 Power and Loads

117

(1)

Worst-Case Loads

117

(1)

Peak Output Current

117

(1)

Slew Rate

118

(1)

6.2 Sizing the Power Supply

118

(1)

Average Power Supply Current

118

(1)

Sizing the Power Transformer

118

(1)

Sizing the Reservoir Capacitors

119

(1)

6.3 Sizing the Output Stage

119

(1)

Number of Output Pairs

119

(1)

6.4 Sizing the Heat Sink

120

(1)

A Simple Guideline

120

(1)

6.5 Protecting the Amplifier and Loudspeaker

121

(1)

Loudspeaker Protection

121

(1)

Short Circuit Protection

121

(1)

Safe Area Protection

121

(1)

6.6 Power and Ground Distribution

121

(1)

When Ground is Not Ground

122

(1)

Ground Loops

122

(1)

Nonlinear Power Supply Currents

122

(1)

Current Flows Through the Shortest Path

122

(1)

6.7 Other Considerations

122

(1)

Output Stage Bias and Thermal Stability

122

(1)

Output Node Catch Diodes

123

(1)

Protection of Speaker Relay Contacts

123

(1)

Physical Design and Layout

123

(1)

The Feedback Path

123

(1)

References

123

(2)

Part 2 Advanced Power Amplifier Design Techniques

125

(150)

7 Input and VAS Circuits

127

(28)

7.1 Single-Ended IPS-VAS

127

(4)

Improved Single-Ended IPS-VAS

128

(1)

Shortcoming of the Single-Ended IPS-VAS

128

(2)

Opportunities for Further Improvement

130

(1)

Input Stage Stress

130

(1)

7.2 JFET Input Stages

131

(5)

JFET Transistors

132

(1)

JFET Id versus V gs Behavior

133

(2)

JFET RFI Immunity

135

(1)

Voltage Ratings

135

(1)

JFET Input Pairs and Matching

136

(1)

7.3 Complementary IPS and Push-Pull VAS

136

(6)

Complementary IPS with Current Mirrors

137

(3)

Complementary IPS with JFETs

140

(1)

Floating Complementary JFET-IPS

141

(1)

Complementary IPS with Unipolar JFETs

142

(1)

7.4 Unipolar Input Stage and Push-Pull VAS

142

(4)

Differential Pair VAS with Current Mirror

143

(1)

IPS with Differential Current Mirror Load

144

(2)

7.5 Input Common Mode Distortion

146

(1)

7.6 Early Effect

147

(1)

7.7 Baker Clamps

148

(1)

7.8 Amplifier Noise

148

(5)

Noise Power

148

(1)

Noise Bandwidth

149

(1)

Noise Voltage Density

149

(1)

Relating Input Noise Density to Signal-to-Noise Ratio

149

(1)

A-Weighted Noise Specifications

149

(1)

VAS Noise

150

(1)

Power Supply Noise

150

(1)

Resistor Noise

151

(1)

Shot Noise

151

(1)

BJT Input Noise Current

152

(1)

Noise of a Degenerated LTP

152

(1)

JFET Noise

152

(1)

Noise Simulation

153

(1)

References

153

(2)

8 DC Servos

155

(16)

8.1 Origins and Consequences of DC Offset

156

(4)

Input Bias Current

156

(1)

Conflicting Impedance Requirements

157

(1)

Bypassed Equalizing Resistor

158

(1)

DC-Coupled Feedback Network

158

(1)

Complementary Input Stages

159

(1)

DC Trim Pots

159

(1)

JFET Input Stages

160

(1)

8.2 DC Servo Basics

160

(4)

DC Servo Architectures

161

(1)

Setting the Low-Frequency Corner

161

(1)

Amount of Offset to Be Corrected

162

(1)

Servo Control Range

163

(1)

Servo Clipping

163

(1)

Servo Headroom

163

(1)

The JFET Advantage

163

(1)

8.3 The Servo is in the Signal Path

164

(3)

Servo Op Amp Distortion and Noise

164

(1)

Adding a Second Pole

165

(2)

8.4 DC Offset Detection and Protection

167

(1)

8.5 DC Servo Example

167

(2)

8.6 Eliminating the Input Coupling Capacitor

169

(1)

8.7 DC Servo Design Issues and Nuances

169

(2)

Servo Start-Up Transients

169

(1)

Low-Frequency Testing of Amplifiers Employing Servos

169

(1)

Simulation

169

(2)

9 Advanced Forms of Feedback Compensation

171

(14)

9.1 Understanding Stability Issues

172

(1)

Dominant Pole Compensation

172

(1)

9.2 Miller Compensation

172

(5)

Pole-Splitting

174

(1)

Limitation on Slew Rate

174

(1)

Distortion Reduction as a Free Side Benefit

175

(1)

VAS Output Impedance

175

(1)

The Feed-Forward Zero

176

(1)

Inserting a Zero to Cancel or Mitigate a Pole

176

(1)

Power Supply Rejection

177

(1)

Buffered Miller Feedback Pick-Off Point

177

(1)

9.3 Two-Pole Compensation

177

(3)

Conditional Stability

179

(1)

Frequency Response Peaking and Overshoot

180

(1)

9.4 Miller Input Compensation

180

(2)

Combining the Best of Input and Miller Compensation

181

(1)

Compensating the Compensation Loop

181

(1)

9.5 Transitional Miller Compensation

182

(1)

9.6 The Summing Node Pole

183

(1)

References

183

(2)

10 Output Stage Design and Crossover Distortion

185

(30)

10.1 The Class AB Output Stage

185

(1)

Class B or Class AB?

186

(1)

10.2 Static Crossover Distortion

186

(2)

Crossover Distortion as a Function of Signal Level

188

(1)

10.3 Optimum Bias and Bias Stability

188

(2)

Setting the Bias

189

(1)

Bias Stability

189

(1)

Dynamic Bias Stability

189

(1)

The Bias Spreader

190

(1)

10.4 Output Stage Driver Circuits

190

(3)

Darlington Output Stage

190

(1)

The Triple

191

(1)

The Diamond Driver

191

(2)

10.5 Output Transistor Matching Considerations

193

(2)

Beta Matching

193

(1)

Emitter and Base Resistance Matching

194

(1)

Base Stopper Resistors

194

(1)

10.6 Dynamic Crossover Distortion

195

(5)

Transistor Turn-Off Current Requirements

195

(2)

An Example BJT Power Transistor

197

(1)

Turning off the Transistor under Conditions of Beta Droop and ƒ Droop

198

(1)

The Role of Collector-Base Capacitance

198

(1)

The Speedup Capacitor

199

(1)

Current Slew Rate Requirements

200

(1)

10.7 The Output Emitter Resistors

200

(1)

Power Dissipation

200

(1)

Inductance

201

(1)

Paralleled Emitter Resistors

201

(1)

10.8 Output Networks

201

(4)

The Zobel Network

202

(1)

Distributed Zobel Networks

203

(1)

The Series L-R Network

203

(1)

The Effect of the Coil on Sound Quality

203

(1)

Variations on the Networks

204

(1)

The Pi Output Network

204

(1)

Eliminating the Output Coil

204

(1)

10.9 Output Stage Frequency Response and Stability

205

(4)

Variation with Operating Point

205

(1)

Base Stopper Resistors

206

(1)

Load Capacitance

206

(1)

Excess Phase

207

(1)

Gain and Phase Margin

207

(1)

Stabilizing the Triple

207

(2)

10.10 Sizing the Output Stage

209

(1)

Power Dissipation

209

(1)

Safe Operating Area

209

(1)

10.11 Delivering High Current

210

(2)

Driving Low-Impedance Loads

210

(1)

Loudspeaker Peak Current Requirements

210

(1)

Beta Droop

210

(1)

fT Droop

211

(1)

Safe Operating Area of the Driver

211

(1)

10.12 Driving Paralleled Output Stages

212

(1)

Output Transistor Current Sharing

212

(1)

Output Transistor Capacitances

212

(1)

10.13 Advanced Output Transistors

212

(1)

References

213

(2)

11 MOSFET Power Amplifiers

215

(30)

11.1 MOSFET Types and Characteristics

216

(2)

Lateral MOSFET Structure

217

(1)

Vertical MOSFET Structure

218

(1)

11.2 MOSFET Advantages and Disadvantages

218

(6)

Freedom from Second Breakdown and Device Protection

218

(2)

Fragile Gate Oxide

220

(1)

The Body Diode

220

(1)

Supply of High Current

220

(2)

The Role of Rds (on)

222

(1)

Transconductance

222

(1)

High Speed

223

(1)

Transconductance Frequency Response

223

(1)

MOSFET Disadvantages and Caveats

223

(1)

MOSFETs versus Bipolar Transistors

224

(1)

11.3 Lateral versus Vertical Power MOSFETs

224

(1)

11.4 Parasitic Oscillations

225

(2)

Gate Stopper Resistors

225

(1)

Origin of Parasitic Oscillations

225

(1)

MOSFET Internal Inductances

226

(1)

MOSFET Output Capacitance

226

(1)

Gate Zobel Networks

226

(1)

Ferrite Beads

227

(1)

Paralleled MOSFETs

227

(1)

Spotting Parasitic Oscillations

227

(1)

11.5 Biasing Power MOSFETs

227

(4)

TCvgs Crossover Current

228

(1)

Bias Spreaders for MOSFET Output Stages

228

(1)

Dynamic Thermal Bias Stability

229

(2)

11.6 Crossover Distortion

231

(3)

Transconductance Droop

231

(1)

Absence of gm Doubling

232

(1)

Use of Source Resistors

233

(1)

Wingspread Simulations

233

(1)

Memory Distortion

234

(1)

11.7 Driving Power MOSFETs

234

(6)

Driving the Gate Capacitance

235

(1)

Gate-Source Capacitance

235

(1)

Gate-Drain Capacitance

235

(1)

Required Drive Current versus Slew Rate

236

(1)

Excess Phase at Signal Peaks

236

(1)

Driving Multiple Output Pairs

236

(1)

Maximum Drive Considerations

237

(1)

Gate Protection

237

(1)

Flying Catch Diodes

237

(1)

Natural Current Limiting

238

(1)

Short Circuit Protection

238

(1)

Folded Drivers

238

(2)

Boosted Driver Supplies

240

(1)

11.8 Paralleling and Matching MOSFETs

240

(1)

11.9 Simulating MOSFET Power Amplifiers

241

(2)

High-Frequency Simulations

243

(1)

11.10 A MOSFET Power Amplifier Design

243

(1)

References

243

(2)

12 Error Correction

245

(16)

12.1 Feed-Forward Error Correction

245

(1)

Reduced Effectiveness at High Frequencies

246

(1)

12.2 Hawksford Error Correction

246

(2)

A Specialized Form of Negative Feedback

247

(1)

Frequency Compensation

248

(1)

Effect on Output Impedance

248

(1)

12.3 Error Correction for MOSFET Output Stages

248

(2)

Simplified Error-Correction Circuit

249

(1)

Error-Correction Circuit Operating Voltage

250

(1)

Error-Correction Circuit Clipping

250

(1)

12.4 Stability and Compensation

250

(3)

Stability Considerations

251

(1)

Frequency Compensation Approach

251

(1)

Simulation of Effective Gain Crossover Frequency

252

(1)

Effect on the Global Feedback Loop

252

(1)

12.5 Performance and Design Issues

253

(4)

Trimming

253

(1)

High-Frequency Limitations

254

(1)

Nonlinearity in the Error Amplifier

254

(1)

Headroom and Clipping

255

(1)

Boosted Rails

255

(1)

Use with Low-V gs MOSFETs

255

(1)

Error Correction for BJT Output Stages

256

(1)

12.6 Circuit Refinements and Nuances

257

(2)

Complementary Error Amplifier

257

(1)

CFP Error Amplifier

257

(1)

Cascoded Drivers

258

(1)

References

259

(2)

13 Other Sources of Distortion

261

(14)

13.1 Distortion Mechanisms

261

(1)

13.2 Early Effect Distortion

262

(1)

13.3 Junction Capacitance Distortion

262

(1)

MOSFET Gate Capacitance Nonlinearity

262

(1)

13.4 Grounding Distortion

263

(1)

13.5 Power Rail Distortion

263

(1)

Output Stage Power Supply Rejection

264

(1)

13.6 Input Common Mode Distortion

264

(1)

Testing for Common Mode Distortion

264

(1)

13.7 Resistor Distortion

264

(2)

13.8 Capacitor Distortion

266

(1)

13.9 Inductor and Magnetic Distortions

267

(1)

Magnetic Core Distortion

267

(1)

Distortion from Proximity to Ferrous Materials

268

(1)

Ferrite Beads

268

(1)

13.10 Magnetic Induction Distortion

268

(1)

Minimizing Magnetic Induction Distortion

268

(1)

13.11 Fuse, Relay, and Connector Distortion

268

(5)

Fuse Distortion

269

(1)

Relay Distortion

269

(3)

Connector Distortion

272

(1)

13.12 Load-Induced Distortion

273

(1)

13.13 EMI-Induced Distortion

273

(1)

13.14 Thermally Induced Distortion (Memory Distortion)

273

(1)

References

274

(1)

Part 3 Real-World Design Considerations

275

(108)

14 Output Stage Thermal Design and Stability

277

(38)

14.1 Power Dissipation versus Power and Load

277

(2)

14.2 Thermal Design Concepts and Thermal Models

279

(6)

Temperature versus Log Time Plots

280

(1)

Thermal Attenuation

280

(1)

Lumped and Distributed Models

281

(1)

Transient Thermal Impedance

281

(1)

Thermal Simulation

282

(2)

Measuring Heat Sink Thermal Resistance

284

(1)

14.3 Transistor Power Ratings

285

(1)

Transistor Insulators

286

(1)

14.4 Sizing the Heat Sink

286

(4)

Output Stage Power Dissipation

287

(1)

Required Heat Sink Thermal Resistance

287

(1)

Power Dissipation into Reactive Loads

287

(1)

Transistor Junction Temperature

287

(1)

The Thermal Breaker

288

(1)

The Finger Test

288

(1)

The Heat Sink Is Not Isothermal

288

(1)

Sizing the Output Stage

288

(2)

14.5 The Bias Spreader and Temperature Compensation

290

(9)

The V be Multiplier

291

(1)

V be Multiplier Impedance

291

(2)

V be Multiplier Variations

293

(1)

Darlington Bias Spreaders

294

(1)

CFP Bias Spreaders

294

(1)

Location of the Sensing Junction

295

(1)

Isothermal Bias Spreader and Driver Circuit

296

(1)

Thermal Attenuation Revisited

296

(1)

Setting the Bias and the Temperature Compensation

297

(1)

Biasing Lateral Power MOSFETs

297

(1)

Biasing Vertical Power MOSFETs

298

(1)

14.6 Thermal Bias Stability

299

(4)

Local Bias Stability

299

(3)

Base Stopper Resistors and Thermal Bias Stability

302

(1)

Measuring Thermal Bias Stability

302

(1)

Bias Stability of MOSFETs versus BJTs

302

(1)

14.7 Thermal Lag Distortion

303

(1)

14.8 Thermal Trak™ Power Transistors

304

(9)

Construction and Physical Characteristics

304

(1)

Bias Spreaders Employing Thermal Trak™ Transistors

305

(2)

Tracking Diode Temperature Characteristics

307

(1)

Thermal Model

307

(2)

Tracking Diode Response Time

309

(1)

Thermal Attenuation

310

(1)

Compensation of Predriver and Driver

310

(1)

Bias as a Function of Time

310

(2)

THD as a Function of Bias Setting

312

(1)

Thermal Trak™ Transistors as Part of a Monitoring and Protection Scheme

313

(1)

References

313

(2)

15 Safe Area and Short Circuit Protection

315

(28)

15.1 Power Transistor Safe Operating Area

315

(3)

Secondary Breakdown Mechanism

316

(1)

Temperature Derating of SOA

317

(1)

Transient SOA

317

(1)

Long-Term Reliability and Destruct Point

317

(1)

Managing Risk

318

(1)

15.2 Output Stage Safe Operating Area

318

(5)

Resistive Loads

318

(1)

Reactive Loads

318

(2)

Impedance and Conductance as a Function of Phase Angle

320

(2)

Overlapped Elliptical Load Lines

322

(1)

15.3 Short Circuit Protection

323

(6)

Rail Fuses

325

(1)

Current Limiting

325

(1)

A Simple Current Limiter

325

(1)

Natural Current Limiting

326

(1)

Shutdown Circuits

327

(1)

Speaker Relays

328

(1)

Load-Sensing Circuits

328

(1)

15.4 Safe-Area-Limiting Circuits

329

(4)

Single-Slope V-I Limiters

330

(1)

Multi-Slope V-I Limiters

331

(1)

Drawbacks of V-I Limiters

331

(2)

Flyback Protection Diodes

333

(1)

Avoiding the Use of V-I Limiters

333

(1)

15.5 Testing Safe-Area-Limiting Circuits

333

(1)

Simulation of Protection Circuits

334

(1)

15.6 Protection Circuits for MOSFETs

334

(1)

15.7 Protecting the Driver Transistors

334

(1)

15.8 Loudspeaker Protection Circuits

335

(6)

Speaker Fuses

335

(1)

The Speaker Relay and Its Control

335

(1)

The TA7317 Loudspeaker Protection IC

336

(2)

Protecting the Speaker Relay

338

(1)

Closing the Feedback Loop Around a Protection Device

339

(1)

Crowbar Circuits

340

(1)

Avoiding Speaker Relays

340

(1)

Protection Processors

341

(1)

References

341

(2)

16 Power Supplies and Grounding

343

(20)

16.1 The Design of the Power Supply

343

(3)

Alternative Supply Arrangements

343

(1)

Boosted Supply Rails

344

(1)

Power Supply Stiffness and Regulation

345

(1)

Effective Power Supply Resistance

346

(1)

16.2 Sizing the Transformer

346

(2)

VA Rating Rules of Thumb

347

(1)

VA versus Weight

347

(1)

Toroid versus Conventional

347

(1)

Modifying Toroidal Transformers

348

(1)

16.3 Sizing the Rectifier

348

(1)

16.4 Sizing the Reservoir Capacitors

349

(2)

Equivalent Series Resistance (ESR) and Inductance (ESL)

349

(1)

Bypasses and Snubbers for Reservoir Capacitors

350

(1)

Split Reservoir Capacitors

351

(1)

16.5 Rectifier Speed

351

(2)

Soft Recovery and Fast Recovery

352

(1)

Rectifier Noise and Snubbers

352

(1)

Measuring Rectifier Performance

352

(1)

16.6 Regulation and Active Smoothing of the Supply

353

(1)

Regulation of Input and VAS Power Supplies

354

(1)

16.7 SPICE Simulation of Power Supplies

354

(1)

16.8 Soft-Start Circuits

355

(2)

Passive Soft-Start Circuits

355

(1)

Active Soft-Start Circuits

356

(1)

16.9 Grounding Architectures

357

(2)

Noisy and Quiet Grounds

357

(1)

When Ground Is Not Ground

357

(1)

Star Grounding

357

(1)

Star-on-Star Grounding

358

(1)

Ground Corruption

358

(1)

Dual-Mono Designs

358

(1)

16.10 Radiated Magnetic Fields

359

(1)

Antenna Loop Area

359

(1)

Circuit Path Crossing Angle

359

(1)

16.11 Safety Circuits

359

(1)

Safety Ground

359

(1)

Breaking Safety Ground Loops

359

(1)

16.12 DC on the Mains

360

(1)

16.13 Switching Power Supplies

361

(1)

References

362

(1)

17 Clipping Control and Civilized Amplifier Behavior

363

(10)

17.1 The Incidence of Clipping

363

(1)

Clipping Experiments

364

(1)

17.2 Clipping and Sticking

364

(1)

17.3 Negative Feedback and Clipping

364

(1)

17.4 Baker Clamps

365

(3)

Flying Baker Clamps and Flying Catch Diodes

367

(1)

Feedback Baker Clamps

367

(1)

17.5 Soft Clipping

368

(1)

The Klever Klipper

368

(1)

17.6 Current Limiting

369

(1)

Active Current Limiting

370

(1)

Natural Current Limiting

370

(1)

17.7 Parasitic Oscillation Bursts

370

(1)

17.8 Optional Output Impedance

371

(1)

References

371

(2)

18 Interfacing the Real World

373

(10)

18.1 The Amplifier-Loudspeaker Interface

373

(3)

The Loudspeaker Is not a Resistive Load

373

(2)

Transmission Line Effects of Speaker Cables

375

(1)

18.2 EMI Ingress: Antennas Everywhere

376

(4)

RFI and EMI

376

(1)

EMI Ingress from the Amplifier Input

376

(2)

Implications for Input Stage Design

378

(1)

EMI Ingress from the Loudspeaker Cable

378

(1)

Implications for Output Network Design

379

(1)

Implications for Feedback Network Design

379

(1)

EMI Ingress from the Mains

379

(1)

EMI Distortion Mechanisms

379

(1)

18.3 Input Filtering

380

(1)

Achieving a Linear Phase Response

380

(1)

18.4 Input Ground Loops

380

(1)

Ground Break Resistor

380

(1)

Balanced Inputs

380

(1)

Interconnect Alternatives

381

(1)

18.5 Mains Filtering

381

(1)

Line Filters

381

(1)

Ferrites and Inductors

381

(1)

18.6 EMI Egress

381

(1)

18.7 EMI Susceptibility Testing

381

(1)

Cell Phones and Electric Drills

381

(1)

EMI Generators

382

(1)

References

382

(1)

Part 4 Simulation and Measurement

383

(114)

19 SPICE Simulation

385

(34)

19.1 LTspice

385

(2)

Installation

385

(1)

The Toolbars

386

(1)

Control Panel

387

(1)

Help

387

(1)

The LTspice Users' Group

387

(1)

19.2 Schematic Capture

387

(3)

Placing Components

388

(1)

Picking and Placing Transistors

389

(1)

Other Components and Subcircuit Libraries

389

(1)

Parameterized Elements

389

(1)

Completing the Schematic

389

(1)

19.3 DC, AC, and Transient Simulation

390

(4)

The DC Operating Point

390

(1)

The SPICE Error Log

391

(1)

Convergence

391

(1)

AC Analysis

392

(1)

Transient Simulation

393

(1)

19.4 Distortion Analysis

394

(2)

FFT Spectral Plots

394

(1)

Optimizing FFT Simulations

395

(1)

Total Harmonic Distortion

396

(1)

19.5 Noise Analysis

396

(1)

Noise of Individual Contributors

397

(1)

Weighted Noise Simulations

397

(1)

19.6 Controlled Voltage and Current Sources

397

(1)

19.7 Swept and Stepped Simulations

398

(2)

DC Sweep

398

(1)

Dc Transfer

398

(1)

Stepped Simulations

399

(1)

Example: A Wingspread Simulation

399

(1)

19.8 Plotting Results

400

(3)

Gummel Plot

401

(1)

Beta versus Ic

402

(1)

Transconductance versus Ic

402

(1)

19.9 Subcircuits

403

(3)

Creating a Subcircuit

403

(1)

The Symbol Editor

404

(1)

Modifying an Existing Symbol

405

(1)

Summary for Creating the LPF1 Symbol

405

(1)

Using the Subcircuit in a Schematic

405

(1)

Installing Subcircuit Models in a Library

405

(1)

19.10 SPICE Models

406

(2)

Bipolar Junction Transistors

406

(1)

Junction Field Effect Transistors

406

(1)

Power MOSFETs

407

(1)

Include Statements

408

(1)

Libraries

408

(1)

19.11 Simulating a Power Amplifier

408

(9)

DC Analysis

409

(1)

Frequency Response

410

(1)

1-kHz Transient Analysis

410

(1)

20-kHz Transient Analysis

410

(1)

Square-Wave Response

411

(1)

1-kHz Total Harmonic Distortion

411

(1)

20-kHz THD

412

(1)

CCIF Intermodulation Distortion

413

(1)

Signal-to-Noise Ratio

414

(1)

Damping Factor and Output Impedance

415

(1)

Stability

415

(1)

Inferring Loop Gain

415

(1)

Measuring Loop Gain

416

(1)

Output Stage Power Dissipation

416

(1)

Output Current Limiting

416

(1)

Safe Operating Area

416

(1)

References

417

(2)

20 SPICE Models and Libraries

419

(40)

20.1 Verifying SPICE Models

420

(1)

The Hybrid Pi Model

420

(1)

20.2 Tweaking SPICE Model

421

(3)

A Typical SPICE Model File

421

(1)

Base-Emitter Voltage

422

(1)

Current Gain

423

(1)

Speed

423

(1)

Base-Emitter Capacitance

424

(1)

Base-Collector Capacitance

424

(1)

20.3 Creating a SPICE Model

424

(16)

Gathering Data Sheet Information

425

(1)

Measuring Device Data

425

(1)

Saturation Current and Nominal V be

425

(2)

Early Voltage

427

(2)

Nominal Beta

429

(1)

Beta Droop at High and Low Current

429

(4)

Establish RB

433

(1)

Establish RB at High Base Current

434

(1)

Establish Nominal Transit Time and ƒt

435

(1)

Establish ƒt Droop at High Current

435

(2)

Establish ƒt Droop at Low Voltage and High Current

437

(1)

Establish ƒt Droop at Low Current

437

(2)

Determine Base-Collector Capacitance

439

(1)

Check the Model

439

(1)

BJT Model Example

439

(1)

20.4 JFET Models

440

(2)

DC Behavior of JFETs

440

(1)

The JFET SPICE Model

441

(1)

Creating and Tweaking the JFET Model

441

(1)

20.5 Vertical Power MOSFET Models

442

(5)

Establishing the DC Parameters

442

(1)

Gate-Source Capacitance

443

(1)

Gate-Drain Capacitance

444

(1)

Cgd Test Circuit

444

(1)

The Subcircuit Model

445

(1)

Subthreshold Conduction

446

(1)

Applicability

447

(1)

Power Amplifier Design Concerns

447

(1)

20.6 LTspice™ VDMOS Models

447

(3)

Establishing the Model Parameters

448

(1)

Applicability

449

(1)

20.7 The EKV Model

450

(4)

Subthreshold MOSFET Measurements

452

(1)

Model Creation Procedure

453

(1)

Applicability

454

(1)

20.8 Hybrid VDMOS-EKV Model

454

(1)

20.9 Lateral Power MOSFETs

455

(1)

20.10 Installing Models

456

(1)

References

456

(3)

21 Audio Instrumentation

459

(12)

21.1 Basic Audio Test Instruments

459

(1)

Audio Oscillator

459

(1)

AC Voltmeter

460

(1)

Oscilloscope

460

(1)

21.2 Dummy Loads

460

(1)

Choose Load Resistors Wisely

460

(1)

Inductive versus Noninductive

460

(1)

Power Dissipation and Cooling

461

(1)

Connecting to the Dummy Load

461

(1)

21.3 Simulated Loudspeaker Loads

461

(1)

Protection Circuit Testing

462

(1)

21.4 THD Analyzer

462

(2)

Interpreting Results

463

(1)

Spectral Analysis

463

(1)

Obtaining a THD Analyzer

464

(1)

21.5 PC-Based Instruments

464

(1)

Sound Card Software

464

(1)

Sound Cards

465

(1)

PC-Based Oscilloscopes

465

(1)

21.6 Purpose-Built Test Gear

465

(5)

Sound Card Interface Boxes

465

(1)

The Distortion Magnifier

466

(1)

Balanced Interfaces

467

(1)

IM Test Signal Combiner

468

(1)

Synchronous Tone Burst Generator

468

(1)

Signal-to-Noise Measurement Preamp with A Weighting

469

(1)

Powering Purpose-Built Test Equipment

469

(1)

References

470

(1)

22 Distortion and Its Measurement

471

(18)

22.1 Nonlinearity and Its Consequences

471

(1)

The Order of a Nonlinearity

472

(1)

22.2 Total Harmonic Distortion

472

(2)

Interpretation of THD

472

(1)

Advantages of THD

473

(1)

Limitations of THD

474

(1)

22.3 SMPTE IM

474

(1)

22.4 CCIF IM

475

(1)

22.5 TIM and SID

476

(2)

Slew Rate Limiting and Input Stage Stress

476

(1)

The DIM Test

477

(1)

THD-20 Will Always Accompany TIM

477

(1)

22.6 PIM

478

(2)

Differential Gain and Phase

478

(1)

Measuring PIM

479

(1)

Negative Feedback and PIM

479

(1)

Input Stage Stress

480

(1)

PIM in Amplifiers Without Negative Feedback

480

(1)

22.7 IIM

480

(4)

Loudspeaker emf and Peak Current Requirements

481

(1)

High-Current Amplifier Design

482

(1)

Measuring IIM

482

(1)

Open-Loop Output Impedance

483

(1)

22.8 Multitone Intermodulation Distortion

484

(1)

22.9 Highly Sensitive Distortion Measurement

484

(1)

22.10 Input-Referred Distortion Analysis

485

(1)

Input Referral Breaks the Feedback Loop

485

(1)

Input Referral Demonstrates Why High Forward-Path Gain Reduces Distortion

485

(1)

References

486

(3)

23 Other Amplifier Tests

489

(8)

23.1 Measuring Damping Factor

489

(1)

23.2 Sniffing Parasitic Oscillations

490

(1)

23.3 EMI Ingress Susceptibility

491

(1)

23.4 Burst Power and Peak Current

492

(1)

23.5 PSRR Tests

493

(1)

23.6 Low-Frequency Tests

493

(1)

Beat Frequency Tests

493

(1)

23.7 Back-Feeding Tests

494

(1)

Back-Fed Beat Frequency Test

494

(1)

THD-20 in the Presence of Low-Frequency Back-Feed

494

(1)

Current-Induced Distortion Tests

495

(1)

References

495

(2)

Part 5 Topics in Amplifier Design

497

(54)

24 The Negative Feedback Controversy

499

(10)

24.1 How Negative Feedback Got its Bad Rap

499

(1)

Amplifier Limitations of the 1970s

499

(1)

Guilt by Association

499

(1)

TIM, PIM, and IIM

500

(1)

24.2 Negative Feedback and Open-Loop Bandwidth

500

(2)

The Input Stage Error Signal

500

(2)

24.3 Spectral Growth Distortion

502

(3)

Baxandall's Findings

502

(1)

Real-World Amplifiers

503

(1)

Degeneration and SGD

503

(1)

SGD and Crossover Distortion

504

(1)

24.4 Global versus Local Feedback

505

(1)

24.5 Timeliness of Correction

505

(1)

24.6 EMI from the Speaker Cable

505

(1)

24.7 Stability and Burst Oscillations

505

(1)

24.8 Clipping Behavior

506

(1)

References

506

(3)

25 Amplifiers Without Negative Feedback

509

(18)

25.1 Design Trade-Offs and Challenges

509

(10)

Input Stage Dynamic Range and Distortion

510

(2)

JEET Input Buffers

512

(1)

Cascoding the Input Stage

512

(1)

Gain Allocation

512

(1)

Controlling VAS Gain

513

(1)

VAS Noise

514

(1)

Amplifiers with Local Negative Feedback

515

(1)

Output Stage Distortion

515

(1)

MOSFET Output Stages

516

(1)

Damping Factor

517

(1)

Power Supply Rejection and Power Supply Design

518

(1)

DC Offset

518

(1)

Balanced Inputs

519

(1)

25.2 Additional Design Techniques

519

(3)

A Complementary IPS-VAS

519

(1)

The Cascomp Input Stage

520

(2)

25.3 An Example Design with No Feedback

522

(2)

25.4 A Feedback Amplifier with Wide Open-Loop Bandwidth

524

(2)

Achieving Wide Open-Loop Bandwidth

524

(1)

A 200-W MOSFET Design

524

(2)

References

526

(1)

26 Balanced and Bridged Amplifiers

527

(10)

26.1 Balanced Input Amplifiers

527

(4)

Gain and Input Impedance Considerations

527

(1)

Single and Triple Op-Amp Solutions

528

(1)

Configuring the Power Amplifier as a Differential Amplifier

529

(1)

The Differential Complementary Feedback Quad (DCFQ)

530

(1)

26.2 Bridged Amplifiers

531

(2)

Sound Quality

532

(1)

Power Supply Advantages

532

(1)

26.3 Balanced Amplifiers

533

(4)

True Balanced Amplifiers

533

(1)

Differential-Mode Feedback

533

(1)

Differential-Mode DC Servo

534

(1)

Common-Mode DC Servo

534

(3)

27 Integrated Circuit Power Amplifiers and Drivers

537

(14)

27.1 IC Power Amplifiers

537

(1)

27.2 The Gain Clones

538

(1)

A Basic Gain Clone Design

538

(1)

A Gain Clone Using the Inverting Mode

538

(1)

Avoiding Electrolytic Capacitors While Controlling Offset

539

(1)

27.3 The Super Gain Clone

539

(3)

Input Circuits

539

(2)

Power Amplifier

541

(1)

Output Network

541

(1)

DC Servo

541

(1)

Performance

541

(1)

27.4 Integrated Circuit Drivers

542

(2)

The LME49810

542

(2)

The LME49830

544

(1)

27.5 An Integrated Circuit Bias Controller

544

(6)

Compensation of the Amplifier

547

(1)

Compensation of the LT1166

548

(1)

A Non-Switching Amplifier

548

(1)

A MOSFET Power Amplifier Using the LT1166 and LME49830

548

(2)

27.6 Summary

550

(1)

References

550

(1)

Part 6 Class D Amplifiers

551

(50)

28 Class D Audio Amplifiers

553

(12)

28.1 How Class D Amplifiers Work

554

(1)

Analog Class D and Digital Class D

555

(1)

Synchronous and Asynchronous Class D

555

(1)

28.2 Buck Converters

555

(7)

Synchronous Buck Converter

557

(1)

Gate Drive Requirements and Power Dissipation

558

(1)

Gate Charge

558

(2)

MOSFET Figure of Merit

560

(1)

Conduction Loss

560

(1)

Switching Loss

561

(1)

Reverse Recovery Loss

561

(1)

28.3 Class D Output Stages

562

(2)

Single-Ended and H-Bridge Output Stages

562

(1)

N-Channel Output Stages

562

(1)

Gate Drive Control

563

(1)

Dead Time Control

563

(1)

Adaptive Dead Time Control

564

(1)

28.4 Summary

564

(1)

References

564

(1)

29 Class D Design Issues

565

(18)

29.1 The Output Filter and EMI

565

(4)

The Zobel Network

567

(1)

Differing Loudspeaker Impedance

567

(1)

Linear Phase Approximation

567

(1)

Reducing Output Filter Size

567

(1)

Input Filter and Aliasing

568

(1)

Other EMI Issues

568

(1)

Output Filter Distortion

568

(1)

29.2 Sources of Distortion

569

(5)

Triangle Reference Linearity and Bandwidth

569

(1)

Pulse Width Quantization

569

(1)

Dead Time

569

(2)

PWM Crossover Distortion

571

(1)

The PWM Central Region

572

(1)

Extending the PWM Central Region

573

(1)

Asymmetrical Rise/Fall Times

573

(1)

Body Diode Conduction Time

573

(1)

Sliver Pulses

573

(1)

29.3 Bus Pumping

574

(1)

29.4 Power Supply Rejection

575

(1)

Loop Gain Modulation

576

(1)

Power Supply Feedback to the Triangle Generator

576

(1)

29.5 Power Supplies for Class D Amplifiers

576

(1)

Linear Power Supplies

576

(1)

Switching Power Supplies

577

(1)

29.6 Negative Feedback

577

(3)

Closing the Loop Before the Output Filter

578

(1)

Closing the Loop Around the Output Filter

579

(1)

29.7 Damping Factor and Load Invariance

580

(1)

29.8 Summary

581

(1)

References

581

(2)

30 Alternative Class D Modulators

583

(12)

30.1 Self-Oscillating Loops

583

(4)

Self-Oscillation with Pre-filter Feedback

584

(1)

Self-Oscillation with the Output Filter

585

(1)

Self-Oscillation Using a One-Shot

585

(1)

Synchronized Self-Oscillating Loops

586

(1)

30.2 Sigma-Delta Modulators

587

(6)

Oversampling

588

(1)

High-Speed Class D Sigma-Delta Amplifiers

589

(1)

High Sigma-Delta Modulator Clock Frequencies

590

(1)

Adaptive Transition Density Limiting

590

(1)

Noise Shaping

590

(1)

Second-Order Sigma-Delta Modulators

591

(1)

Higher-Order Sigma-Delta Modulators

592

(1)

EMI of Sigma-Delta Class D Amplifiers

592

(1)

The Output Filter

592

(1)

Post-Filter Feedback

592

(1)

30.3 Digital Modulators

593

(1)

Digital PWM Modulators

593

(1)

Digital Sigma-Delta Modulators

593

(1)

Feedback and PSRR

593

(1)

References

594

(1)

31 Class D Measurement, Performance, and Efficiency

595

(6)

31.1 Hybrid Class D

595

(2)

31.2 Measuring Class D Amplifiers

597

(2)

The AES17 Filter

597

(1)

Total Harmonic Distortion

597

(1)

SMPTE IM

598

(1)

CCIF Tests

598

(1)

Aliasing

598

(1)

PSRR

598

(1)

Conductive Emissions

599

(1)

31.3 Achievable Performance

599

(1)

Efficiency

599

(1)

Distortion

599

(1)

References

600

(1)

Index

601

Bob Cordell, an electrical engineer, is a prolific designer of amplifiers, audio test equipment, and other audio gear. He has published articles on power amplifier design in the Journal of the Audio Engineering Society (JAES) and other publications. Bob is a member of the JAES Review Board and he maintains an audiophile website at www.cordellaudio.com.

Designing Audio Power Amplifiers [Pehme köide]

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