Muutke küpsiste eelistusi

Embedded Systems Design with FPGAs 2012 [Kõva köide]

Edited by , Edited by , Edited by
  • Formaat: Hardback, 278 pages, kõrgus x laius: 235x155 mm, kaal: 5561 g, X, 278 p., 1 Hardback
  • Ilmumisaeg: 05-Dec-2012
  • Kirjastus: Springer-Verlag New York Inc.
  • ISBN-10: 1461413613
  • ISBN-13: 9781461413615
  • Kõva köide
  • Hind: 95,02 €*
  • * hind on lõplik, st. muud allahindlused enam ei rakendu
  • Tavahind: 111,79 €
  • Säästad 15%
  • Raamatu kohalejõudmiseks kirjastusest kulub orienteeruvalt 2-4 nädalat
  • Kogus:
  • Lisa ostukorvi
  • Tasuta tarne
  • Tellimisaeg 2-4 nädalat
  • Lisa soovinimekirja
  • Formaat: Hardback, 278 pages, kõrgus x laius: 235x155 mm, kaal: 5561 g, X, 278 p., 1 Hardback
  • Ilmumisaeg: 05-Dec-2012
  • Kirjastus: Springer-Verlag New York Inc.
  • ISBN-10: 1461413613
  • ISBN-13: 9781461413615
"This book presents methodologies for modern applications of embedded systems design, using field programmable gate array (FPGA) devices. Coverage includes state-of-the-art research from academia and industry on a wide range of topics, including advancedelectronic design automation (EDA), novel system architectures, embedded processors, arithmetic, dynamic reconfiguration and applications."--pub. desc.

This publication presents the most modern applications of field-programmable gate array devices (FPGAs) as deployed in the design of embedded systems. The coverage includes state-of-the-art material from both academia and industry on an wealth of topics.



This book presents the methodologies and for embedded systems design, using field programmable gate array (FPGA) devices, for the most modern applications. Coverage includes state-of-the-art research from academia and industry on a wide range of topics, including applications, advanced electronic design automation (EDA), novel system architectures, embedded processors, arithmetic, and dynamic reconfiguration.
Widening the Memory Bottleneck by Automatically-Compiled Application-Specific Speculation Mechanisms
1(30)
Benjamin Thielmann
Jens Huthmann
Thorsten Wink
Andreas Koch
Decimal Division Using the Newton-Raphson Method and Radix-1000 Arithmetic
31(24)
Mario P. Vestias
Horacio C. Neto
Lifetime Reliability Sensing in Modern FPGAs
55(24)
Abdulazim Amouri
Mehdi Tahoori
Hardware Design for C-Based Complex Event Processing
79(22)
Hiroaki Inoue
Takashi Takenaka
Masato Motomura
Model-based Performance Evaluation of Dynamic Partial Reconfigurable Datapaths for FPGA-based Systems
101(24)
Rehan Ahmed
Peter Hallschmid
Switch Design for Soft Interconnection Networks
125(24)
Giorgos Dimitrakopoulos
Christoforos Kachris
Emmanouil Kalligeros
Embedded Systems Start-Up Under Timing Constraints on Modern FPGAs
149(24)
Joachim Meyer
Juanjo Noguera
Michael Hubner
Rodney Stewart
Jurgen Becker
Run-Time Scalable Architecture for Deblocking Filtering in H.264/AVC and SVC Video Codecs
173(28)
Andres Otero
Teresa Cervero
Eduardo de la Torre
Sebastian Lopez
Gustavo M. Callico
Teresa Riesgo
Roberto Sarmiento
CAPH: A Language for Implementing Stream-Processing Applications on FPGAs
201(24)
Jocelyn Serot
Francois Berry
Sameer Ahmed
Compact CLEFIA Implementation on FPGAs
225(20)
Ricardo Chaves
A Systematic Method to Evaluate and Compare the Performance of Physical Unclonable Functions
245(24)
Abhranil Maiti
Vikash Gunreddy
Patrick Schaumont
Index 269