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Essential Knowledge for Transistor-Level LSI Circuit Design 1st ed. 2016 [Kõva köide]

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  • Formaat: Hardback, 211 pages, kõrgus x laius: 235x155 mm, kaal: 5022 g, 9 Illustrations, color; 165 Illustrations, black and white; XI, 211 p. 174 illus., 9 illus. in color., 1 Hardback
  • Ilmumisaeg: 18-May-2016
  • Kirjastus: Springer Verlag, Singapore
  • ISBN-10: 9811004234
  • ISBN-13: 9789811004230
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Essential Knowledge for Transistor-Level LSI Circuit Design 1st ed. 2016Suurem pilt
  • Formaat: Hardback, 211 pages, kõrgus x laius: 235x155 mm, kaal: 5022 g, 9 Illustrations, color; 165 Illustrations, black and white; XI, 211 p. 174 illus., 9 illus. in color., 1 Hardback
  • Ilmumisaeg: 18-May-2016
  • Kirjastus: Springer Verlag, Singapore
  • ISBN-10: 9811004234
  • ISBN-13: 9789811004230
Teised raamatud teemal:
Püsilink: https://www.kriso.ee/db/9789811004230.html
Märksõnad:
This book is a collection of the miscellaneous knowledge essential for transistor-level LSI circuit design, summarized as the issues that need to be considered in each design step. To design an LSI that actually functions and to be able to properly measure it, an extremely large amount of diverse, detailed knowledge is necessary. Even though one may read a textbook about an op-amp, for example, the op-amp circuit design cannot actually be completed on one’s CAD tools. The first half of this text explains important design issues such as the operating principles of CAD tools including schematic entry, SPICE simulation, layout and verification, and RC extraction. Then, topics about which many circuit design beginners are prone to make mistakes because of the lack of their consideration of those subjects are explained including IO buffers, noise, and problems due to the progress of miniaturization. Following these, basic but very specialized issues for LSI circuit measurement are explained including measurement devices and measurement techniques. Readers will get the simulated experience of a whole flow from the top to the bottom of circuit design and measurement. The book will be useful for newcomers to a lab or to new graduates who are assigned to a circuit design group but have little experience in circuit design. This published work is also ideal for those who have some experience in circuit design, to confirm and complement the knowledge that they already possess.
1 Schematic Entry
1(18)
1.1 Schematic Entry
1(5)
1.1.1 The Body Terminal and the Well Structure
1(2)
1.1.2 Transistor Parameters
3(3)
1.2 Models and Parameters
6(9)
1.2.1 Physical Phenomena, the Model, and Parameters
6(1)
1.2.2 Model Equations
7(5)
1.2.3 SPICE Parameters
12(2)
1.2.4 Understanding the Model
14(1)
1.3 Techniques for Circuit Design
15(4)
1.3.1 Hierarchical Design
15(1)
1.3.2 Dealing with Supply and Ground
16(1)
1.3.3 Connections by Labeling
17(1)
1.3.4 Connection Points
18(1)
2 SPICE Simulation
19(30)
2.1 Principles of Simulation
19(13)
2.1.1 DC Analysis
19(1)
2.1.2 Linear Circuit Elements
19(2)
2.1.3 Nonlinear Circuit Elements
21(2)
2.1.4 AC Analysis
23(2)
2.1.5 Transient Analysis
25(5)
2.1.6 Harmonic Balance Analysis
30(1)
2.1.7 Analysis Method Characteristics and Comparison
31(1)
2.2 Fast SPICE
32(5)
2.2.1 Partitioning and Event-Driven Simulation
33(2)
2.2.2 Unpartitionable Circuits
35(1)
2.2.3 Time Step Control
35(1)
2.2.4 Simplification of the Model
36(1)
2.2.5 Automatic Decision and Specification of Simulation Accuracy
36(1)
2.3 A Simple HSPICE Manual
37(12)
2.3.1 Basic Points
37(1)
2.3.2 Denning Elements
38(2)
2.3.3 Voltage and Current Sources
40(2)
2.3.4 Simulation Types
42(1)
2.3.5 File Includes and Libraries
43(1)
2.3.6 Options and the MEASURE Command
43(6)
3 Layout and Verification
49(34)
3.1 The Basic Process of LSI Fabrication
49(9)
3.1.1 The Three-Dimensional LSI Structure
49(1)
3.1.2 Photolithography
50(3)
3.1.3 Deposition
53(1)
3.1.4 Removal of Unnecessary Parts
53(2)
3.1.5 Introduction of Impurities
55(1)
3.1.6 CMOS Fabrication Process
55(1)
3.1.7 Dual Damascene
55(3)
3.2 Design Rules
58(6)
3.2.1 Basic Rules
58(1)
3.2.2 The Grid
59(1)
3.2.3 Density Rules
59(2)
3.2.4 Dummy Transistors
61(1)
3.2.5 Antenna Rules
62(1)
3.2.6 Electromigration
62(1)
3.2.7 Hand-Drawn Layers and Autogenerated Layers
63(1)
3.3 Basic Layout
64(3)
3.3.1 Layout of Transistors
64(1)
3.3.2 Layout of Resistors
64(2)
3.3.3 Layout of Capacitors
66(1)
3.3.4 Layout of Inductors
67(1)
3.4 Layout Editors
67(3)
3.4.1 Layers
68(1)
3.4.2 Display and Grid
68(1)
3.4.3 Objects
69(1)
3.5 Layout Know-How
70(5)
3.5.1 Layout Editor Settings
70(1)
3.5.2 Hierarchical Layout
71(1)
3.5.3 Double Back
71(1)
3.5.4 Supply Lines
72(1)
3.5.5 Clock Distribution
73(1)
3.5.6 Shields
74(1)
3.6 Layout Verification
75(8)
3.6.1 DRC
75(1)
3.6.2 LVS
76(3)
3.6.3 ERC
79(1)
3.6.4 Antenna Check
80(1)
3.6.5 Density Check
80(1)
3.6.6 Verification Types and Order
80(1)
3.6.7 Flat Verification and Hierarchical Verification
81(2)
4 Interconnect RC Extraction
83(20)
4.1 Parasitic Resistance and Parasitic Capacitance
83(1)
4.2 Principles of RC Extraction Tools
84(7)
4.2.1 Resistance Extraction
84(2)
4.2.2 Resistance Measurement
86(1)
4.2.3 Capacitance Extraction
86(5)
4.3 AD/AS/PD/PS and HDIF
91(2)
4.4 Typical Options
93(6)
4.4.1 C Extraction and RC Extraction
93(1)
4.4.2 Compaction
94(1)
4.4.3 Dealing with Cross-Coupled Capacitances
95(1)
4.4.4 Dealing with Supply Lines
96(1)
4.4.5 Node Specification and Cell Specification
97(1)
4.4.6 Dealing with Floating Nodes and Dummies
98(1)
4.4.7 XREF with LVS
99(1)
4.5 Reduction of Interconnect RC
99(4)
4.5.1 Process Technology
100(1)
4.5.2 Design Techniques
101(2)
5 IO Buffers
103(18)
5.1 Signal Path Between Chips
103(9)
5.1.1 Pads
103(1)
5.1.2 Packages and Bonding Wires
104(2)
5.1.3 Transmission Lines
106(4)
5.1.4 Termination Methods
110(1)
5.1.5 Voltage Levels
111(1)
5.2 ESD
112(3)
5.2.1 ESD Models
112(1)
5.2.2 ESD Protection Circuits
113(1)
5.2.3 Miscellaneous Topics Regarding ESD Protection Circuitry
114(1)
5.3 Types of IO Buffers and Their Layout
115(3)
5.3.1 IO Buffer Examples
116(2)
5.3.2 Supply Rings
118(1)
5.4 Determining Pin Placement
118(3)
5.4.1 Supply Pin
119(1)
5.4.2 Shielding
119(1)
5.4.3 Symmetry
120(1)
5.4.4 Assembly and Measurement
120(1)
6 Noise
121(14)
6.1 Types and Causes of Malfunction
121(3)
6.1.1 No Response
121(1)
6.1.2 Timing Errors
122(2)
6.1.3 Analog Errors
124(1)
6.2 Types of Noise and Their Countermeasures
124(11)
6.2.1 PVT Variations
124(3)
6.2.2 Supply Noise
127(3)
6.2.3 Substrate Noise
130(2)
6.2.4 Cross-Talk Noise
132(1)
6.2.5 EMC
133(2)
7 Problems Due To the Progress of Miniaturization
135(20)
7.1 Variation
135(9)
7.1.1 About Variation
135(1)
7.1.2 Types and Causes of Variation
135(2)
7.1.3 The Effects of Variation
137(4)
7.1.4 Monte Carlo Simulations
141(3)
7.2 Leakage Currents
144(3)
7.2.1 Gate Leakage and High-K
145(1)
7.2.2 Subthreshold Leakage
145(1)
7.2.3 Junction Leakage
146(1)
7.3 Degradation of Characteristics
147(8)
7.3.1 Electromigration
147(1)
7.3.2 Stress Migration
148(1)
7.3.3 Soft Errors
148(1)
7.3.4 Hot Carrier Injection
149(1)
7.3.5 NBTI
150(1)
7.3.6 Random Telegraph Noise
151(1)
7.3.7 Simulation of Degradation Prediction
151(4)
8 Measurement Devices
155(22)
8.1 Sources of Signals to the Chip
155(4)
8.1.1 Power Supply
155(1)
8.1.2 Signal Generators
156(2)
8.1.3 Pulse Pattern Generators
158(1)
8.2 Observers of Signals from the Chip
159(10)
8.2.1 Sampling Oscilloscopes
159(6)
8.2.2 Real-Time Oscilloscopes
165(2)
8.2.3 Spectrum Analyzers
167(2)
8.3 Equipment with Both Signal Input and Output
169(8)
8.3.1 BERT
169(2)
8.3.2 Network Analyzers
171(4)
8.3.3 Logic Analyzers
175(2)
9 Measurement Techniques
177(18)
9.1 Supply · Ground and the Return Path
177(4)
9.1.1 Ground
177(1)
9.1.2 Supply and Decoupling Capacitance
178(1)
9.1.3 Return Path
179(2)
9.2 Various Components
181(8)
9.2.1 Connectors and Cables
181(2)
9.2.2 Accessories
183(3)
9.2.3 Probes
186(1)
9.2.4 Assembling Components
187(1)
9.2.5 Shield Room
188(1)
9.3 Assembly Examples
189(2)
9.4 GPIB, Measurement Automation, and C Programming
191(4)
10 The Overall Design Procedure
195(16)
10.1 Before Starting Your Design
195(3)
10.1.1 What Are You Making and Why
195(1)
10.1.2 Determining the Final Image
196(1)
10.1.3 Determining CAD Tools
197(1)
10.2 Checking Transistor Characteristics
198(3)
10.2.1 SPICE Parameters
198(1)
10.2.2 DC Characteristics and Inverter Delay
199(2)
10.3 Checking the General Flow
201(3)
10.3.1 Schematic Editor
201(1)
10.3.2 Inverter Layout and LVS/DRC
202(1)
10.3.3 RC Extraction
203(1)
10.4 Finally, Some Real Design
204(3)
10.4.1 Circuit Design and Considering the Measurement Methodology
204(1)
10.4.2 Layout Design
205(2)
10.5 After Submission of Design Data
207(1)
10.5.1 Preparation for Measurement
207(1)
10.5.2 Preparing Patent Documents
208(1)
10.6 Measurements and Onward
208(3)
10.6.1 Measurements
208(1)
10.6.2 Writing a Report
208(1)
10.6.3 Toward Your Next Design
209(2)
Epilogue 211
Toru NakuraAssociate Professor, The University of Tokyo