One hundred and five papers from the July 2005 workshop present the findings of recent research on digital system design for system-on-chip (SoC), analog and mixed signal IC design, manufacturing and reliability, sensors, design automation tools, low power SoC, IP cores, and wireless systems. The contributors propose a new topology for power control of class-E power amplifiers, an automatic layout generator for I/O cells, digital RF processing techniques for SoC radios, and a low power CMOS potentiostat for bioimplantable applications. Other topics include leakage current variability in nanometer technologies, traffic configuration for evaluating networks on chip, and current standards activities for high speed physical layers. No subject index is provided. Annotation ©2005 Book News, Inc., Portland, OR (booknews.com)
