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Hardware/Software Co-Design and Co-Verification 1997 ed. [Kõva köide]

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  • Formaat: Hardback, 166 pages, kõrgus x laius: 234x156 mm, kaal: 990 g, XX, 166 p., 1 Hardback
  • Sari: Current Issues in Electronic Modeling 8
  • Ilmumisaeg: 31-Dec-1996
  • Kirjastus: Springer
  • ISBN-10: 0792396898
  • ISBN-13: 9780792396895
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  • Formaat: Hardback, 166 pages, kõrgus x laius: 234x156 mm, kaal: 990 g, XX, 166 p., 1 Hardback
  • Sari: Current Issues in Electronic Modeling 8
  • Ilmumisaeg: 31-Dec-1996
  • Kirjastus: Springer
  • ISBN-10: 0792396898
  • ISBN-13: 9780792396895
Describes tools for designing and verifying systems in which hardware and software are being designed simultaneously in a CAD environment. Emphasizes the importance of the flow of communication, especially to and from the outside world, as a main criterion for determining the trade-off between dedicated software and dedicated hardware, a decision that increasingly must be made early in the design process. Also discusses generic and SDL-based environments for prototyping real-time applications, modelling and synthesizing interfaces using interpreted Petri Nets, flexible component retrieval, programmed monitoring and digital system simulation, and a case study of an ethernet bridge. Annotation c. by Book News, Inc., Portland, Or.

Co-Design is the set of emerging techniques which allows for the simultaneous design of Hardware and Software. In many cases where the application is very demanding in terms of various performances (time, surface, power consumption), trade-offs between dedicated hardware and dedicated software are becoming increasingly difficult to decide upon in the early stages of a design. Verification techniques - such as simulation or proof techniques - that have proven necessary in the hardware design must be dramatically adapted to the simultaneous verification of Software and Hardware.
Describing the latest tools available for both Co-Design and Co-Verification of systems, Hardware/Software Co-Design and Co-Verification offers a complete look at this evolving set of procedures for CAD environments. The book considers all trade-offs that have to be made when co-designing a system. Several models are presented for determining the optimum solution to any co-design problem, including partitioning, architecture synthesis and code generation.
When deciding on trade-offs, one of the main factors to be considered is the flow of communication, especially to and from the outside world. This involves the modeling of communication protocols. An approach to the synthesis of interface circuits in the context of co-design is presented.
Other chapters present a co-design oriented flexible component data-base and retrieval methods; a case study of an ethernet bridge, designed using LOTOS and co-design methodologies and finally a programmable user interface based on monitors.
Hardware/Software Co-Design and Co-Verification will help designers and researchers to understand these latest techniques in system design and as such will be of interest to all involved in embedded system design.
SERIES PRESENTATION V(2) EDITORS VII(2) VOLUME PRESENTATION IX(2) CONTENTS XI(6) CONTRIBUTORS XVII 1. A MODEL FOR EXPLORING HARDWARE/SOFTWARE TRADE-OFFS AND EVALUATING DESIGN ALTERNATIVES 1(22) Sanjaya Kumar James H. Aylor Barry W. Johnson Wm. A. Wulf Ronald D. Williams 1.1. Introduction 2(1) 1.2. Motivation and Codesign Approach 3(1) 1.3. Definitions and Notation 4(2) 1.4. An Abstract Hardware/Software Model and its Implementation 6(6) 1.4.1. Overview 6(2) 1.4.2. The Software Model 8(1) 1.4.3. The Hardware Model 9(1) 1.4.4. Model Execution 9(1) 1.4.5. Analysis Techniques 10(2) 1.5. Examples of Trade-off Analysis and Alternative Evaluation 12(4) 1.5.1. Hardware/Software Trade-off Analysis 12(3) 1.5.2. Evaluating Hardware/Software Alternatives 15(1) 1.6. Related Work 16(2) 1.7. Conclusions 18(5) 2. ECOS: A GENERIC CODESIGN ENVIRONMENT FOR THE PROTOTYPING OF REAL TIME APPLICATIONS FROM FORMAL SPECIFICATIONS TO HARDWARE-SOFTWARE PARTITIONING 23(36) M. Aiguier J. Benzakki G. Bernot S. Beroff D. Dupont L. Freund M. Israel F. Rousseau 2.1. Presentation of the Approach 24(3) 2.1.1. Background 24(1) 2.1.2. General Presentation of the ECOS Project 25(1) 2.1.3. Formal Specification 26(1) 2.1.4. Partitioning 27(1) 2.1.5. Interactions 27(1) 2.2. Presentation of the Formalisms Employed 27(15) 2.2.1. Presentation of the ETOILE-Specifications 28(12) 2.2.2. Hardware-Software Partitioning 40(2) 2.3. Implementation 42(12) 2.3.1. Design Environment 42(6) 2.3.2. The Partitioning 48(6) 2.4. Conclusion 54(5) 3. COSMOS: AN SDL BASED HARDWARE/SOFTWARE CODESIGN ENVIRONMENT 59(30) J.M. Daveau G.F. Marchioro T. Ben-Ismail A.A. Jerraya 3.1. State of the Art 60(3) 3.2. General Objectives of the COSMOS Project 63(1) 3.3. Modelling for the Synthesis of Mixed HW/SW Systems 64(5) 3.3.1. SOLAR: The Basic Concepts 64(1) 3.3.2. The State Table 65(1) 3.3.3. The Design Unit 65(1) 3.3.4. The Channel Unit 66(3) 3.4. Systems Specification in SDL 69(1) 3.4.1. Blocks and Channels 69(1) 3.4.2. Communication 69(1) 3.4.3. Processes 69(1) 3.4.4. Signals 70(1) 3.4.5. Procedures 70(1) 3.5. The Correspondence Model between SDL/Solar 70(3) 3.5.1. Methodology of Correspondence 70(1) 3.5.2. Translation of Structural Aspects 70(1) 3.5.3. Translation of Communication Aspects 71(1) 3.5.4. Translation of Behavioural Aspects 71(1) 3.5.5. Translation of Signals 72(1) 3.5.6. Translation of Procedures 72(1) 3.5.7. The Correspondence Model between SDL and SOLAR 72(1) 3.6. SDL Communication Modelling 73(1) 3.7. System Level Parititioning 74(2) 3.8. The Communication Synthesis 76(3) 3.8.1. Protocol Selection and Interconnection Network Synthesis 77(1) 3.8.2. Interface Synthesis 78(1) 3.9. Generation of Executable Code in C and VHDL 79(2) 3.10. The Hardware / Software Co-simulation (C/VHDL) 81(1) 3.11. The Architecture Generation 82(1) 3.12. Conclusion 83(6) 4. HARDWARE/SOFTWARE CO-SYNTHESIS: MODELLING AND SYNTHESIS OF INTERFACES USING INTERPRETED PETRI NETS 89(20) Christophe Vial Bruno Rouzeyre 4.1. Introduction 89(1) 4.2. Synthesis in a CoDesign Environment 90(4) 4.2.1. CoDesign and Communication 90(1) 4.2.2. Protocols and Communication 91(1) 4.2.3. Architecture of the Communication Module 92(2) 4.3. Interpreted Petri Nets 94(1) 4.3.1. Preliminary Definitions 94(1) 4.3.2. Evolution Algorithm 94(1) 4.4. Communication Protocol Modelling 95(6) 4.4.1. State of the Art 95(1) 4.4.2. Selected Model 96(1) 4.4.3. Modelling Steps 96(5) 4.5. Communication Modelling 101(2) 4.6. Protocol Controller Synthesis from IPN 103(3) 4.7. Conclusion and Direction for Future Research 106(3) 5. FLEXIBLE COMPONENT RETRIEVAL 109(16) Satish Venkatesan Karen C. Davis 5.1. Introduction 110(1) 5.2. Co-Design Methodology 111(2) 5.2.1. REBOUND: Architecture Synthesis 112(1) 5.2.2. Partitioner and Database Interaction 113(1) 5.3. Conceptual Data Model for VHDL/VSPEC 113(4) 5.3.1. VHDL Conceptual Model 114(2) 5.3.2. VSPEC Conceptual Model 116(1) 5.4. Query Language 117(2) 5.5. Example 119(2) 5.6. Conclusions 121(4) 5.6.1. Related Work 121(1) 5.6.2. Future Work 121(4) 6. CO-DESIGN AT WORK: THE ETHERNET BRIDGE CASE STUDY 125(20) L. Sanchez M. L. Lopez N. Martinez C. Carreras J.C. Lopez C. Delgado-Kloos A. Royo P. T. Breuer 6.1. Introdution 126(1) 6.2. Co-Design Methodology 126(6) 6.2.1. Specification 127(2) 6.2.2. Partitioning 129(1) 6.2.3. Validation 130(2) 6.3. The Case Study 132(1) 6.4. Application of the Methodology to the Case Study 133(8) 6.4.1. Specification 133(2) 6.4.2. Estimation 135(3) 6.4.3. Partitioning 138(1) 6.4.4. Interface Construction 139(1) 6.4.5. Results Analysis 140(1) 6.5. Conclusions and Future Work 141(4) 7. PROGRAMMED MONITORING AND DIGITAL SYSTEM SIMULATION 145(18) Philip A. Wilsey Ranga Vemuri Peter J. Ashenden Norman E. Mause 7.1. Introduction 146(1) 7.2. Background 146(1) 7.3. The Need for Monitors 147(3) 7.3.1. Monitor Examples: Simple Analysis 148(1) 7.3.2. Monitor Examples: Design Correctness 149(1) 7.3.3. Monitor Examples: Software and Firmware Development 150(1) 7.4. Implementing Monitors 150(2) 7.5. Examples 152(8) 7.5.1. Monitors for Analysis 152(4) 7.5.2. Monitors for Design Correctness 156(3) 7.5.3. Monitors to Support Software Development 159(1) 7.6. Conclusion 160(3) INDEX 163