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High-Speed Optical Receivers with Integrated Photodiode in Nanoscale CMOS 2011 ed. [Kõva köide]

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  • Formaat: Hardback, 226 pages, kõrgus x laius: 235x155 mm, kaal: 529 g, XIV, 226 p., 1 Hardback
  • Sari: Analog Circuits and Signal Processing
  • Ilmumisaeg: 21-Jun-2011
  • Kirjastus: Springer-Verlag New York Inc.
  • ISBN-10: 1441999248
  • ISBN-13: 9781441999245
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High-Speed Optical Receivers with Integrated Photodiode in Nanoscale CMOS 2011 ed.Suurem pilt
  • Formaat: Hardback, 226 pages, kõrgus x laius: 235x155 mm, kaal: 529 g, XIV, 226 p., 1 Hardback
  • Sari: Analog Circuits and Signal Processing
  • Ilmumisaeg: 21-Jun-2011
  • Kirjastus: Springer-Verlag New York Inc.
  • ISBN-10: 1441999248
  • ISBN-13: 9781441999245
Teised raamatud teemal:
Püsilink: https://www.kriso.ee/db/9781441999245.html
Märksõnad:
This book describes the design of optical receivers that use the most economical integration technology to achieve performance usually found in very expensive devices. Discussion includes photodiodes, transimpedance amplifiers, equalizers and post amplifiers.

This book describes the design of optical receivers that use the most economical integration technology, while enabling performance that is typically only found in very expensive devices. To achieve this, all necessary functionality, from light detection to digital output, is integrated on a single piece of silicon. All building blocks are thoroughly discussed, including photodiodes, transimpedance amplifiers, equalizers and post amplifiers.
1 Introduction
1(14)
1.1 Why Do We Need Optical Communication?
1(5)
1.1.1 Existing and Emerging Applications
1(3)
1.1.2 The Advantages of Optical Communication
4(2)
1.2 What are Integrated Optical Receivers?
6(2)
1.3 Overview of Existing Literature
8(5)
1.3.1 Non-CMOS Implementations
8(2)
1.3.2 CMOS Implementations Without an Integrated Photodiode
10(2)
1.3.3 CMOS Implementations with an Integrated Photodiode
12(1)
1.4 Summary of the Research
13(1)
1.5 Outline of the Thesis
14(1)
2 Optical Communication---A High-Level Perspective
15(26)
2.1 The Communication Model
15(1)
2.2 Properties of Binary Data
16(3)
2.2.1 Random Binary Data
16(2)
2.2.2 Pseudo-random Binary Data
18(1)
2.3 The Laser Diode
19(4)
2.4 Optical Fiber
23(3)
2.4.1 Silica Fiber
23(2)
2.4.2 Plastic Fiber
25(1)
2.5 Optical Receiver Fundamentals
26(12)
2.5.1 Bandwidth Versus Bit Rate
27(2)
2.5.2 Noise Versus Bandwidth
29(4)
2.5.3 Bit Error Ratio Versus Noise
33(5)
2.6 Conclusion
38(3)
3 From Light to Electric Current---The Photodiode
41(36)
3.1 Working Principle
41(14)
3.1.1 Carrier Generation and Recombination
41(6)
3.1.2 Collecting the Generated Carriers
47(8)
3.2 Photodiodes in CMOS
55(21)
3.2.1 Magnitude and Speed of the Photocurrent
56(7)
3.2.2 Speed Improvement Techniques
63(5)
3.2.3 The Photodiode Parasitics
68(2)
3.2.4 The Reflection Coefficient of CMOS
70(6)
3.3 Conclusion
76(1)
4 From Current to Voltage---The Transimpedance Amplifier
77(60)
4.1 Important Specifications
77(5)
4.2 Comparison of TIA Topologies
82(18)
4.2.1 Open-Loop Topologies
82(6)
4.2.2 Closed-Loop Topologies
88(12)
4.3 Design Considerations of a Shunt-Shunt Feedback TIA
100(23)
4.3.1 Design of the Voltage Amplifier
100(13)
4.3.2 Design of the Feedback Network
113(4)
4.3.3 The Capacitance-Relieved TIA
117(6)
4.4 TIA Designs
123(11)
4.4.1 A Differential Shunt-Shunt Feedback TIA
123(6)
4.4.2 A Shunt-Shunt Feedback TIA for POF-Applications
129(3)
4.4.3 A Capacitance-Relieved TIA for POF-Applications
132(2)
4.5 Conclusion
134(3)
5 Increasing the Speed---The Equalizer
137(16)
5.1 Operation Principle
137(4)
5.2 Circuit Techniques
141(5)
5.2.1 A Source-Degenerated Amplifier
141(2)
5.2.2 A Common-Source Amplifier with an Inductive Load
143(3)
5.3 Equalizer Designs
146(6)
5.3.1 A Differential Equalizer with Differential Source Degeneration
146(3)
5.3.2 A Single-Ended Equalizer with Active Inductors
149(3)
5.4 Conclusion
152(1)
6 Towards a Rail-to-Rail Voltage---The Post Amplifier
153(32)
6.1 A Limiting Amplifier or an AGC Amplifier?
153(2)
6.2 Important Specifications
155(7)
6.3 Broadband Circuit Techniques
162(8)
6.3.1 Multistage Amplifier
162(4)
6.3.2 Negative Impedance Converter
166(3)
6.3.3 Other Techniques
169(1)
6.4 Offset Compensation
170(6)
6.5 Post Amplifier Designs
176(6)
6.5.1 A 4-stage Limiting Amplifier
176(3)
6.5.2 A Limiting Amplifier with Negative Miller Capacitors and Active Offset Compensation
179(3)
6.6 Conclusion
182(3)
7 Chip Implementations
185(28)
7.1 A New FOM for Integrated Optical Receivers
186(1)
7.2 A 4.5-Gbit/s Optical Receiver with an Integrated Photodiode in 130-nm CMOS
187(8)
7.2.1 The Chip
187(3)
7.2.2 Measurement Setup
190(1)
7.2.3 Measurement Results
191(4)
7.3 A 5.5-Gbit/s Optical Receiver with a Speed-Enhanced Photodiode in 130-nm CMOS
195(6)
7.3.1 The Chip
195(3)
7.3.2 Measurement Setup
198(1)
7.3.3 Measurement Results
198(3)
7.4 A POF Receiver with a 1-mm Diameter Integrated Photodiode in 180-nm CMOS
201(5)
7.4.1 The Chip
201(2)
7.4.2 Measurement Setup
203(1)
7.4.3 Measurement Results
204(2)
7.5 A Low Power and Area Efficient Limiting Amplifier in 90-nm CMOS
206(6)
7.5.1 The Chip
206(2)
7.5.2 Measurement Setup
208(1)
7.5.3 Measurement Results
209(3)
7.6 Conclusion
212(1)
8 Conclusions
213(2)
8.1 General Conclusions
213(2)
References 215(6)
Index 221