This thin volume contains the proceedings of the July 2003 conference in San Jose, California. It includes 13 papers on the following topics: DRAM for leading edge applications; fault analysis, test generation, and verification; enhanced testing techniques; memory BIST challenges; memory roadmap, yield, and optimization; and memory design techniques. Only authors appear in the index. Annotation (c) Book News, Inc., Portland, OR (booknews.com)
