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Microchip Fabrication: A Practical Guide to Semiconductor Processing, Sixth Edition 6th edition [Kõva köide]

3.87/5 (24 hinnangut Goodreads-ist)

Peter Van Zant

Formaat: Hardback, 576 pages, kõrgus x laius x paksus: 241x196x37 mm, kaal: 1136 g, 225 Illustrations
Ilmumisaeg: 16-Nov-2013
Kirjastus: McGraw-Hill Professional
ISBN-10: 0071821015
ISBN-13: 9780071821018

Teised raamatud teemal:

Microprocessors

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Formaat: Hardback, 576 pages, kõrgus x laius x paksus: 241x196x37 mm, kaal: 1136 g, 225 Illustrations
Ilmumisaeg: 16-Nov-2013
Kirjastus: McGraw-Hill Professional
ISBN-10: 0071821015
ISBN-13: 9780071821018

Teised raamatud teemal:

Microprocessors

Püsilink: https://www.kriso.ee/db/9780071821018.html

Märksõnad:

Van Zant updates and revises his introductory textbook for semiconductor wafer-fabrication workers whether they be production workers, technicians, professionals in the materials and equipment sectors, or engineers. In this edition he retains the fundamental physics, chemistry, and electronics underlying the sophisticated manufacturing materials and process of modern semiconductor fabrication, and integrates the current processes. Among the topics are crystal growth and silicon wafer preparation, productivity and process yields, next generation lithography, evaluating processes and devices, and packaging. Annotation ©2014 Ringgold, Inc., Portland, OR (protoview.com)

The most complete, current guide to semiconductor processing

Fully revised to cover the latest advances in the field, Microchip Fabrication, Sixth Editionexplains every stage of semiconductor processing, from raw material preparation to testing to packaging and shipping the finished device. This practical resource provides easy-to-understand information on the physics, chemistry, and electronic fundamentals underlying the sophisticated manufacturing materials and processes of modern semiconductors.

State-of-the-art processes and cutting-edge technologies used in the patterning, doping, and layering steps are discussed in this new edition. Filled with detailed illustrations and real-world examples, this is a comprehensive, up-to-date introduction to the technologicalbackbone of the high-tech industry.

COVERAGE INCLUDES:

The semiconductor industry
Properties of semiconductor materials and chemicals
Crystal growth and silicon wafer preparation
Wafer fabrication and packaging
Contamination control
Productivity and process yields
Oxidation
The ten-step patterning process--surface preparation to exposure; developing to final inspection
Next generation lithography
Doping
Layer deposition
Metallization
Process and device evaluation
The business of wafer fabrication
Devices and integrated circuit formation
Integrated circuits
Packaging

Preface

xxiii

1 The Semiconductor Industry

(18)

Introduction

(1)

Birth of an Industry

(2)

The Solid-State Era

(1)

Integrated Circuits (ICs)

(1)

Process and Product Trends

(6)

Moore's Law

(1)

Decreasing Feature Size

(2)

Increasing Chip and Wafer Size

(1)

Reduction in Defect Density

(1)

Increase in Interconnection Levels

(1)

The Semiconductor Industry Association Roadmap

(1)

Chip Cost

(1)

Industry Organization

(1)

Stages of Manufacturing

(2)

Six Decades of Advances in Microchip Fabrication Processes

(2)

The Nano Era

(1)

Review Topics

(2)

References

(2)

2 Properties of Semiconductor Materials and Chemicals

(22)

Introduction

(1)

Atomic Structure

(1)

The Bohr Atom

(1)

The Periodic Table of the Elements

(3)

Electrical Conduction

(1)

Conductors

(1)

Dielectrics and Capacitors

(1)

Resistors

(1)

Intrinsic Semiconductors

(1)

Doped Semiconductors

(1)

Electron and Hole Conduction

(3)

Carrier Mobility

(1)

Semiconductor Production Materials

(1)

Germanium and Silicon

(1)

Semiconducting Compounds

(2)

Silicon Germanium

(1)

Engineered Substrates

(1)

Ferroelectric Materials

(1)

Diamond Semiconductors

(1)

Process Chemicals

(2)

Molecules, Compounds, and Mixtures

(1)

Ions

(1)

States of Matter

(1)

Solids, Liquids, and Gases

(1)

Plasma State

(1)

Properties of Matter

(2)

Temperature

(1)

Density, Specific Gravity, and Vapor Density

(1)

Pressure and Vacuum

(1)

Acids, Alkalis, and Solvents

(1)

Acids and Alkalis

(1)

Solvents

(1)

Chemical Purity and Cleanliness

(1)

Safety Issues

(1)

The Material Safety Data Sheet

(1)

Review Topics

(2)

References

(2)

3 Crystal Growth and Silicon Wafer Preparation

(18)

Introduction

(1)

Semiconductor Silicon Preparation

(1)

Silicon Wafer Preparation Stages

(1)

Crystalline Materials

(2)

Unit Cells

(1)

Poly and Single Crystals

(1)

Crystal Orientation

(1)

Crystal Growth

(4)

Czochralski Method

(2)

Liquid-Encapsulated Czochralski

(1)

Float Zone

(2)

Crystal and Wafer Quality

(2)

Point Defects

(1)

Dislocations

(1)

Growth Defects

(1)

Wafer Preparation

(2)

End Cropping

(1)

Diameter Grinding

(1)

Crystal Orientation, Conductivity, and Resistivity Check

(1)

Grinding Orientation Indicators

(1)

Wafer Slicing

(1)

Wafer Marking

(1)

Rough Polish

(1)

Chemical Mechanical Polishing

(1)

Backside Processing

(1)

Double-Sided Polishing

(1)

Edge Grinding and Polishing

(1)

Wafer Evaluation

(1)

Oxidation

(1)

Packaging

(1)

Wafer Types and Uses

(1)

Reclaim Wafers

(1)

Engineered Wafers (Substrates)

(1)

Review Topics

(1)

References

(1)

4 Overview of Wafer Fabrication and Packaging

(18)

Introduction

(1)

Goal of Wafer Fabrication

(1)

Wafer Terminology

(2)

Chip Terminology

(2)

Basic Wafer-Fabrication Operations

(1)

Layering

(9)

Patterning

(2)

Circuit Design

(2)

Reticle and Masks

(1)

Doping

(1)

Heat Treatments

(3)

Example Fabrication Process

(2)

Wafer Sort

(1)

Packaging

(1)

Summary

(1)

Review Topics

(1)

References

(1)

5 Contamination Control

(38)

Introduction

(4)

The Problem

(3)

Contamination-Caused Problems

(1)

Contamination Sources

(7)

General Sources

(1)

Air

(1)

Clean Air Strategies

(1)

Cleanroom Workstation Strategy

(2)

Tunnel or Bay Concept

(1)

Micro- and Mini-Environments

(1)

Temperature, Humidity, and Smog

(1)

Cleanroom Construction

(11)

Construction Materials

(1)

Cleanroom Elements

(4)

Personnel-Generated Contamination

(1)

Process Water

(2)

Process Chemicals

(3)

Equipment

(1)

Cleanroom Materials and Supplies

(1)

Cleanroom Maintenance

100

(1)

Wafer-Surface Cleaning

100

(12)

Particulate Removal

102

(1)

Wafer Scrubbers

102

(1)

High-Pressure Water Cleaning

103

(1)

Organic Residues

103

(1)

Inorganic Residues

103

(1)

Chemical-Cleaning Solutions

104

(1)

General Chemical Cleaning

104

(1)

Oxide Layer Removal

105

(1)

Room Temperature and Ozonated Chemistries

106

(2)

Water Rinsing

108

(2)

Drying Techniques

110

(2)

Contamination Detection

112

(1)

Review Topics

112

(3)

References

113

(2)

6 Productivity and Process Yields

115

(16)

Overview

115

(1)

Yield Measurement Points

115

(1)

Accumulative Wafer-Fabrication Yield

116

(1)

Wafer-Fabrication Yield Limiters

117

(11)

Number of Process Steps

118

(1)

Wafer Breakage and Warping

118

(1)

Process Variation

119

(1)

Mask Defects

120

(1)

Wafer-Sort Yield Factors

120

(1)

Wafer Diameter and Edge Die

121

(1)

Wafer Diameter and Die Size

122

(1)

Wafer Diameter and Crystal Defects

122

(1)

Wafer Diameter and Process Variations

123

(1)

Die Area and Defect Density

124

(1)

Circuit Density and Defect Density

125

(1)

Number of Process Steps

125

(1)

Feature Size and Defect Size

125

(1)

Process Cycle Time

125

(1)

Wafer-Sort Yield Formulas

125

(3)

Assembly and Final Test Yields

128

(1)

Overall Process Yields

128

(1)

Review Topics

129

(2)

References

130

(1)

7 Oxidation

131

(30)

Introduction

131

(1)

Silicon Dioxide Layer Uses

131

(3)

Surface Passivation

131

(1)

Doping Barrier

132

(1)

Surface Dielectric

132

(1)

Device Dielectric (MOS Gates)

133

(1)

Device Oxide Thicknesses

134

(1)

Thermal Oxidation Mechanisms

134

(20)

Influences on the Oxidation Rate

137

(3)

Thermal Oxidation Methods

140

(1)

Horizontal Tube Furnaces

140

(1)

Temperature Control System

141

(2)

Source Cabinet

143

(1)

Vertical Tube Furnaces

143

(3)

Rapid Thermal Processing

146

(3)

High-Pressure Oxidation

149

(2)

Oxidant Sources

151

(3)

Oxidation Processes

154

(1)

Preoxidation Wafer Cleaning

154

(1)

Postoxidation Evaluation

155

(2)

Surface Inspection

156

(1)

Oxide Thickness

156

(1)

Oxide and Furnace Cleanliness

156

(1)

Thermal Nitridation

156

(1)

Review Topics

157

(4)

References

157

(4)

8 The Ten-Step Patterning Process---Surface Preparation to Exposure

161

(40)

Introduction

161

(1)

Overview of the Photomasking Process

162

(3)

Ten-Step Process

165

(2)

Basic Photoresist Chemistry

167

(2)

Photoresist

167

(2)

Photoresist Performance Factors

169

(6)

Resolution Capability

169

(1)

Adhesion Capability

170

(1)

Process Latitude

171

(1)

Pinholes

172

(1)

Particle and Contamination Levels

173

(1)

Step Coverage

173

(1)

Thermal Flow

173

(1)

Comparison of Positive and Negative Resists

173

(2)

Physical Properties of Photoresists

175

(3)

Solids Content

175

(1)

Viscosity

175

(1)

Surface Tension

176

(1)

Index of Refraction

176

(1)

Storage and Control of Photoresists

176

(1)

Light and Heat Sensitivity

176

(1)

Viscosity Sensitivity

177

(1)

Shelf Life

177

(1)

Cleanliness

177

(1)

Photomasking Processes---Surface Preparation to Exposure

178

(1)

Surface Preparation

178

(3)

Particle Removal

178

(1)

Dehydration Baking

178

(1)

Wafer Priming

179

(1)

Spin Priming

180

(1)

Vapor Priming

180

(1)

Photoresist Application (Spinning)

181

(4)

The Static Dispense Spin Process

181

(2)

Dynamic Dispense

183

(1)

Moving-Arm Dispensing

183

(1)

Manual Spinners

183

(1)

Automatic Spinners

184

(1)

Edge Bead Removal

185

(1)

Backside Coating

185

(1)

Soft Bake

185

(4)

Convection Ovens

186

(1)

Manual Hot Plates

187

(1)

In-Line, Single-Wafer Hot Plates

187

(1)

Moving-Belt Hot Plates

187

(1)

Moving-Belt Infrared Ovens

188

(1)

Microwave Baking

188

(1)

Vacuum Baking

188

(1)

Alignment and Exposure

189

(9)

Alignment and Exposure Systems

189

(2)

Exposure Sources

191

(1)

Alignment Criteria

191

(2)

Aligner Types

193

(3)

Postexposure Bake

196

(2)

Advanced Lithography

198

(1)

Review Topics

198

(3)

References

198

(3)

9 The Ten-Step Patterning Process---Developing to Final Inspection

201

(32)

Introduction

201

(6)

Development

201

(1)

Positive Resist Development

201

(2)

Negative Resist Development

203

(1)

Wet Development Processes

203

(3)

Dry (or Plasma) Development

206

(1)

Hard Bake

207

(5)

Hard-Bake Methods

207

(1)

Hard-Bake Process

207

(1)

Develop Inspect

208

(1)

Develop Inspect Reject Categories

209

(1)

Develop Inspect Methods

209

(2)

Causes for Rejecting at the Develop Inspection Stage

211

(1)

Etch

212

(1)

Wet Etching

212

(5)

Etch Goals and Issues

212

(1)

Incomplete Etch

212

(1)

Overetch and Undercutting

213

(1)

Selectivity

214

(1)

Wet-Spray Etching

214

(1)

Silicon Wet Etching

214

(1)

Silicon Dioxide Wet Etching

215

(1)

Aluminum-Film Wet Etching

216

(1)

Deposited-Oxide Wet Etching

216

(1)

Silicon Nitride Wet Etching

216

(1)

Vapor Etching

217

(1)

Dry Etch

217

(6)

Plasma Etching

218

(2)

Etch Rate

220

(1)

Radiation Damage

220

(1)

Selectivity

220

(2)

Ion-Beam Etching

222

(1)

Reactive Ion Etching

222

(1)

Resist Effects in Dry Etching

223

(1)

Resist Stripping

223

(3)

Wet Chemical Stripping of Nonmetallized Surfaces

224

(1)

Wet Chemical Stripping of Metallized Surfaces

225

(1)

Dry Stripping

225

(1)

Post--Ion Implant and Plasma Etch Stripping

226

(1)

New Stripping Challenges

226

(1)

Final Inspection

227

(1)

Mask Making

227

(2)

Summary

229

(1)

Review Topics

229

(4)

References

230

(3)

10 Next Generation Lithography

233

(36)

Introduction

233

(1)

Challenges of Next Generation Lithography

233

(8)

High-Pressure Mercury Lamp Sources

235

(1)

Excimer Lasers

236

(1)

Extreme Ultraviolet

236

(1)

X-Rays

237

(1)

Electron Beam or Direct Writing

238

(2)

Numerical Aperture of a Lens

240

(1)

Other Exposure Issues

241

(3)

Variable Numerical Aperture Lenses

242

(1)

Immersion Exposure System

242

(1)

Amplified Resist

242

(1)

Contrast Effects

243

(1)

Other Resolution Challenges and Solutions

244

(4)

Off-Axis Illumination

245

(1)

Lens Issues and Reflection Systems

245

(1)

Phase-Shift Masks

245

(1)

Optical Proximity Corrected or Optical Process Correction

245

(1)

Annular-Ring Illumination

246

(1)

Pellicles

247

(1)

Surface Problems

248

(1)

Resist Light Scattering

248

(1)

Subsurface Reflectivity

248

(1)

Antireflective Coatings

249

(3)

Standing Waves

249

(2)

Planarization

251

(1)

Photoresist Process Advances

252

(12)

Multilayer Resist or Surface Imaging

252

(2)

Silylation or DESIRE Process

254

(1)

Polyimide Planarization Layers

255

(1)

Etchback Planarization

256

(1)

Dual-Damascene Process

256

(1)

Chemical Mechanical Polishing

256

(3)

Slurry

259

(1)

Polishing Rates

259

(1)

Planarity

260

(1)

Post-CMP Clean

261

(1)

CMP Tools

261

(1)

CMP Summary

262

(1)

Reflow

262

(1)

Image Reversal

262

(1)

Contrast Enhancement Layers

262

(2)

Dyed Resists

264

(1)

Improving Etch Definition

264

(1)

Lift-Off Process

264

(1)

Self-Aligned Structures

264

(2)

Etch Profile Control

266

(1)

Review Topics

266

(3)

References

266

(3)

11 Doping

269

(30)

Introduction

269

(1)

The Diffusion Concept

269

(2)

Formation of a Doped Region and Junction

271

(4)

The N-P Junction

272

(1)

Doping Process Goals

273

(1)

Graphical Representation of Junctions

273

(1)

Concentration versus Depth Graphs

273

(1)

Lateral Diffusion

273

(2)

Same-Type Doping

275

(1)

Diffusion Process Steps

275

(1)

Deposition

275

(3)

Lateral Diffusion

278

(1)

Same-Type Doping

278

(2)

Dopant Sources

278

(2)

Drive-In Oxidation

280

(1)

Oxidation Effects

281

(1)

Introduction to Ion Implantation

281

(2)

Concept of Ion Implantation

283

(1)

Ion-Implantation System

284

(7)

Implant Species Sources

284

(1)

Ionization Chamber

284

(1)

Mass Analyzing or Ion Selection

284

(2)

Acceleration Tube

286

(1)

Wafer Charging

286

(1)

Beam Focus

287

(1)

Neutral Beam Trap

287

(1)

Beam Scanning

287

(2)

End Station and Target Chamber

289

(1)

Ion-Implant Masks

290

(1)

Dopant Concentration in Implanted Regions

291

(3)

Crystal Damage

292

(1)

Annealing and Dopant Activation

292

(1)

Channeling

293

(1)

Evaluation of Implanted Layers

294

(1)

Uses of Ion Implantation

295

(2)

The Future of Doping

297

(1)

Review Topics

297

(2)

References

298

(1)

12 Layer Deposition

299

(34)

Introduction

299

(3)

Film Parameters

301

(1)

Chemical Vapor Deposition Basics

302

(3)

Basic CVD System Components

303

(2)

CVD Process Steps

305

(1)

CVD System Types

305

(1)

Atmospheric-Pressure CVD Systems

306

(3)

Horizontal-Tube Induction-Heated APCVD

306

(1)

Barrel Radiant-Induction-Heated APCVD

307

(1)

Pancake Induction-Heated APCVD

307

(1)

Continuous Conduction Heated APCVD

308

(1)

Horizontal Conduction-Heated APCVD

309

(1)

Low-Pressure Chemical Vapor Deposition

309

(4)

Horizontal Conduction-Convection-Heated LPCVD

309

(1)

Ultra-High Vacuum CVD

310

(1)

Plasma-Enhanced CVD (PECVD)

310

(2)

High-Density Plasma CVD

312

(1)

Atomic Layer Deposition

313

(2)

Vapor-Phase Epitaxy

315

(1)

Molecular Beam Epitaxy

315

(2)

Metalorganic CVD

317

(1)

Deposited Films

318

(1)

Deposited Semiconductors

318

(1)

Epitaxial Silicon

318

(6)

Polysilicon and Amorphous Silicon Deposition

324

(1)

SOS and SOI

325

(1)

Gallium Arsenide on Silicon

326

(1)

Insulators and Dielectrics

326

(3)

Silicon Dioxide

326

(1)

Doped Silicon Dioxide

327

(1)

Silicon Nitride

328

(1)

High-k and Low-k Dielectrics

329

(1)

Conductors

329

(1)

Review Topics

329

(4)

References

330

(3)

13 Metallization

333

(22)

Introduction

333

(1)

Deposition Methods

333

(1)

Single-Layer Metal Systems

334

(1)

Multilevel Metal Schemes

335

(1)

Conductors Materials

336

(3)

Aluminum

336

(1)

Aluminum-Silicon Alloys

336

(1)

Aluminum-Copper Alloy

337

(1)

Barrier Metals

338

(1)

Refractory Metals and Refractory Metal Silicides

338

(1)

Plugs

339

(1)

Sputter Deposition

340

(8)

Copper Dual-Damascene Process

345

(1)

Low-k Dielectric Materials

345

(1)

The Dual-Damascene Copper Process

346

(2)

Barrier or Liner Deposition

348

(1)

Seed Deposition

348

(1)

Electrochemical Plating

348

(1)

Chemical-Mechanical Processing

349

(1)

CVD Metal Deposition

349

(2)

Doped Polysilicon

349

(1)

CVD Refractory Deposition

350

(1)

Metal-Film Uses

351

(1)

MOS Gate and Capacitor Electrodes

351

(1)

Backside Metallization

351

(1)

Vacuum Systems

351

(2)

Dry Mechanical Pumps

352

(1)

Turbomolecular Hi-Vac Pumps

352

(1)

Review Topics

353

(2)

References

353

(2)

14 Process and Device Evaluation

355

(38)

Introduction

355

(1)

Wafer Electrical Measurements

356

(2)

Resistance and Resistivity

356

(1)

Resistivity Measurements

356

(1)

Four-Point Probe

356

(2)

Process and Device Evaluation

358

(2)

Sheet Resistance

358

(1)

Four-Point Probe Thickness Measurement

358

(1)

Concentration or Depth Profile

359

(1)

Secondary Ion Mass Spectrometry

359

(1)

Physical Measurement Methods

360

(1)

Layer Thickness Measurements

360

(5)

Color

360

(1)

Spectrophotometers or Reflectometry

361

(2)

Ellipsometers

363

(1)

Stylus (Surface Profilometers)

363

(2)

Photoacoustic

365

(1)

Gate Oxide Integrity Electrical Measurement

365

(1)

Junction Depth

365

(5)

Groove and Stain

365

(2)

Scanning Electron Microscope Thickness Measurement

367

(1)

Spreading Resistance Probe

367

(1)

Secondary Ion Mass Spectrometry

367

(1)

Scanning Capacitance Microscopy

368

(1)

Critical Dimensions and Line-Width Measurements

369

(1)

Optical Image-Shearing Dimension Measurement

369

(1)

Shape Metrology and Optical Critical Dimension

370

(1)

Contamination and Defect Detection

370

(8)

1× Visual Surface Inspection Techniques

370

(1)

1× Collimated Light

370

(2)

1× Ultraviolet

372

(1)

Microscope Techniques

372

(4)

Automated In-Line Defect Inspection Systems

376

(2)

General Surface Characterization

378

(2)

Atomic Force Microscopy

378

(2)

Scattrometry

380

(1)

Contamination Identification

380

(2)

Auger Electron Spectroscopy

380

(1)

Electron Spectroscope for Chemical Analysis

381

(1)

Time of Flight Secondary Ion Mass Spectrometry

381

(1)

Evaluation of Stack Thickness and Composition

382

(1)

Device Electrical Measurements

382

(8)

Equipment

383

(1)

Resistors

383

(1)

Diodes

384

(2)

Bipolar Transistors

386

(1)

MOS Transistors

387

(1)

Capacitance-Voltage Profiling

387

(3)

Device Failure Analysis---Emission Microscopy

390

(1)

Review Topics

390

(3)

References

391

(2)

15 The Business of Wafer Fabrication

393

(24)

Introduction

393

(1)

Moore's Law and the New Wafer-Fabrication Business

393

(1)

Wafer-Fabrication Costs

394

(8)

Overhead

395

(1)

Materials

395

(1)

Equipment

396

(1)

Labor

397

(1)

Production Cost Factors

397

(1)

Yield

398

(1)

Yield Improvements

398

(1)

Yield and Productivity

399

(2)

Book-to-Bill Ratio

401

(1)

Cost of Ownership

402

(1)

Automation

402

(1)

Process Automation

402

(1)

Wafer-Loading Automation

403

(1)

Clustering

403

(1)

Wafer-Delivery Automation

404

(1)

Closed-Loop Control-System Automation

405

(1)

Factory-Level Automation

405

(2)

Equipment Standards

407

(2)

Fab Floor Layout

407

(1)

Batch versus Single-Wafer Processing

407

(1)

Green Fabs

408

(1)

Statistical Process Control

409

(3)

Inventory Control

412

(2)

Just-in-Time Inventory Control

413

(1)

Quality Control and Certification---ISO 9000

414

(1)

Line Organization

414

(1)

Review Topics

415

(2)

References

416

(1)

16 Introduction to Devices and Integrated Circuit Formation

417

(34)

Introduction

417

(1)

Semiconductor-Device Formation

417

(17)

Resistors

418

(2)

Capacitors

420

(2)

Diodes

422

(2)

Transistors

424

(3)

Field-Effect Transistors

427

(7)

Alternatives to MOSFET Scaling Challenges

434

(2)

Conductors

434

(2)

Integrated-Circuit Formation

436

(9)

Bipolar Circuit Formation

437

(4)

MOS Integrated Circuit Formation

441

(4)

Bi-MOS

445

(1)

Silicon on Insulator Isolation

445

(1)

Superconductors

446

(3)

Microelectromechanical Systems

447

(1)

Strain Gauges

447

(1)

Batteries

447

(1)

Light-Emitting Diodes

447

(1)

Optoelectronics

448

(1)

Solar Cells

448

(1)

Temperature Sensing

448

(1)

Acoustic Wave Devices

448

(1)

Review Topics

449

(2)

References

449

(2)

17 Process and Device Evaluation

451

(14)

Introduction

451

(1)

Circuit Basics

451

(3)

Integrated Circuit Types

454

(8)

Logic Circuits

454

(3)

Memory Circuits

457

(4)

Redundancy

461

(1)

The Next Generation

462

(2)

Review Topics

464

(1)

References

464

(1)

18 Packaging

465

(38)

Introduction

465

(1)

Chip Characteristics

466

(2)

Package Functions and Design

468

(5)

Substantial Lead System

468

(1)

Physical Protection

468

(1)

Environmental Protection

469

(1)

Heat Dissipation

469

(1)

Common Package Parts

469

(2)

Cleanliness and Static Control

471

(1)

Basic Bonding Processes

472

(1)

Wire Bonding Process

473

(9)

Prebonding Wafer Preparation

473

(1)

Die Separation

474

(1)

Die Pick and Place

475

(1)

Die Inspection

476

(1)

Die Attach

476

(1)

Wire Bonding

477

(3)

Tape Automated Bonding Process

480

(1)

Bump or Ball Flip-Chip Bonding

480

(2)

Example Bump or Ball Process

482

(9)

Copper Metallization (Damascene) Bump Bonding

482

(1)

Reflow

483

(1)

Die Separation and Die Pick and Place

483

(1)

Alignment of Die to Package

483

(1)

Attachment to Package (or Substrate)

483

(1)

Deflux

483

(1)

Underfillment

484

(1)

Encapsulation

484

(1)

Postbonding and Preseal Inspection

484

(1)

Sealing Techniques

484

(2)

Lead Plating

486

(1)

Plating Process Flows

487

(1)

Lead Trimming

487

(1)

Deflashing

488

(1)

Package Marking

488

(1)

Final Testing

489

(1)

Environmental Tests

489

(1)

Electrical Testing

490

(1)

Burn-In Tests

491

(1)

Package Design

491

(8)

Metal Cans

492

(1)

Pin Grid Arrays

493

(1)

Ball-Grid Arrays or Flip-Chip Ball-Grid Arrays

493

(1)

Quad Packages

493

(1)

Thin Packages

494

(1)

Chip-Scale Packages

494

(1)

Lead on Chip

494

(1)

Three-Dimensional Packages

494

(1)

Stacking Die Techniques

495

(2)

Three-Dimensional Enabling Technologies

497

(1)

Hybrid Circuits

498

(1)

Multichip Modules

498

(1)

The Known Good Die Problem

498

(1)

Package Type or Technology Summary

499

(1)

Package or PCB Connections

499

(1)

Bare Die Techniques and Blob Top

500

(1)

Review Topics

500

(3)

References

501

(2)

Glossary

503

(20)

Index

523

Peter Van Zant is the Principal of Peter Van Zant Associates, a semiconductor manufacturing consulting and training company, and the author of all three previous editions of this widely read book. He has over 35 years in the semiconductor industry, working at IBM, Texas Instruments, and National Semiconductors. He resides in Grass Valley, California.

Microchip Fabrication: A Practical Guide to Semiconductor Processing, Sixth Edition 6th edition [Kõva köide]

The most complete, current guide to semiconductor processing

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