| Preface |
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xix | |
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PART ONE SOLID STATE ELECTRONIC AND DEVICES |
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Introduction to Electronics |
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3 | (38) |
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A Brief History of Electronics: From Vacuum Tubes to Ultra-Large-Scale Integration |
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5 | (3) |
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Classification of Electronic Signals |
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8 | (4) |
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9 | (1) |
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9 | (1) |
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A/D and D/A Converters---Bridging the Analog and Digital Domains |
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10 | (2) |
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12 | (1) |
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13 | (2) |
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Important Concepts from Circuit Theory |
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15 | (6) |
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Voltage and Current Division |
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15 | (1) |
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Thevenin and Norton Circuit Representations |
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16 | (5) |
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Frequency Spectrum of Electronic Signals |
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21 | (1) |
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22 | (4) |
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Ideal Operational Amplifiers |
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23 | (2) |
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Amplifier Frequency Response |
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25 | (1) |
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Element Variations in Circuit Design |
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26 | (8) |
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Mathematical Modeling of Tolerances |
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26 | (1) |
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27 | (2) |
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29 | (3) |
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32 | (2) |
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34 | (7) |
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34 | (1) |
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35 | (1) |
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36 | (1) |
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36 | (1) |
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37 | (4) |
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41 | (32) |
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Solid-State Electronic Materials |
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43 | (1) |
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44 | (3) |
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Drift Currents and Mobility in Semiconductors |
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47 | (2) |
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47 | (1) |
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48 | (1) |
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48 | (1) |
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Resistivity of Intrinsic Silicon |
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49 | (1) |
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Impurities in Semiconductors |
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50 | (1) |
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Donor Impurities in Silicon |
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51 | (1) |
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Acceptor Impurities in Silicon |
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51 | (1) |
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Electron and Hole Concentrations in Doped Semiconductors |
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51 | (3) |
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n-Type Material (ND > NA) |
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52 | (1) |
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p-Type Material (NA < ND) |
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53 | (1) |
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Mobility and Resistivity in Doped Semiconductors |
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54 | (4) |
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58 | (1) |
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59 | (1) |
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60 | (3) |
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Electron--Hole Pair Generation in an Intrinsic Semiconductor |
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60 | (1) |
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Energy Band Model for a Doped Semiconductor |
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61 | (1) |
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Compensated Semiconductors |
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61 | (2) |
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Overview of Integrated Circuit Fabrication |
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63 | (10) |
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66 | (1) |
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67 | (1) |
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68 | (1) |
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68 | (1) |
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68 | (1) |
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69 | (4) |
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Solid-State Diodes and Diode Circuits |
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73 | (70) |
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74 | (5) |
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pn Junction Electrostatics |
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74 | (4) |
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78 | (1) |
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The i-v Characteristics of the Diode |
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79 | (2) |
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The Diode Equation: A Mathematical Model for the Diode |
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81 | (3) |
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Diode Characteristics Under Reverse, Zero, and Forward Bias |
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84 | (4) |
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84 | (1) |
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84 | (1) |
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85 | (3) |
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Diode Temperature Coefficient |
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88 | (1) |
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Diodes Under Reverse Bias |
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88 | (3) |
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Saturation Current in Real Diodes |
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89 | (1) |
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90 | (1) |
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Diode Model for the Breakdown Region |
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91 | (1) |
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91 | (1) |
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91 | (1) |
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92 | (1) |
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92 | (1) |
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Diode SPICE Model and Layout |
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93 | (2) |
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95 | (10) |
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95 | (2) |
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Analysis Using the Mathematical Model for the Diode |
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97 | (4) |
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101 | (2) |
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Constant Voltage Drop Model |
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103 | (1) |
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Model Comparison and Discussion |
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104 | (1) |
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105 | (3) |
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Analysis of Diodes Operating in the Breakdown Region |
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108 | (4) |
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108 | (1) |
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Analysis with the Piecewise Linear Model |
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109 | (1) |
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109 | (1) |
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Analysis Including Zener Resistance |
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110 | (1) |
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111 | (1) |
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Half-Wave Rectifier Circuits |
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112 | (9) |
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Half-Wave Rectifier with Resistor Load |
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112 | (2) |
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Rectifier Filter Capacitor |
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114 | (1) |
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Half-Wave Rectifier with RC Load |
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114 | (1) |
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Ripple Voltage and Conduction Interval |
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115 | (3) |
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118 | (1) |
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119 | (1) |
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Peak-Inverse-Voltage (PIV) Rating |
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119 | (1) |
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120 | (1) |
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Half-Wave Rectifier with Negative Output Voltage |
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120 | (1) |
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Full-Wave Rectifier Circuits |
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121 | (1) |
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Full-Wave Rectifier with Negative Output Voltage |
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122 | (1) |
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Full-Wave Bridge Rectification |
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122 | (1) |
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Rectifier Comparison and Design Tradeoffs |
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123 | (4) |
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Dynamic Switching Behavior of the Diode |
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127 | (1) |
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Photo Diodes, Solar Cells, and Light-Emitting Diodes |
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128 | (15) |
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Photo Diodes and Photodetectors |
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128 | (1) |
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Power Generation from Solar Cells |
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129 | (1) |
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Light-Emitting Diodes (LEDs) |
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130 | (1) |
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131 | (1) |
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132 | (1) |
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133 | (1) |
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133 | (1) |
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133 | (10) |
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143 | (64) |
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Characteristics of the MOS Capacitor |
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144 | (2) |
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145 | (1) |
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146 | (1) |
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146 | (1) |
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146 | (13) |
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Qualitative i-v Behavior of the NMOS Transistor |
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147 | (1) |
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Triode1 Region Characteristics of the NMOS Transistor |
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148 | (3) |
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151 | (1) |
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Saturation of the i-v Characteristics |
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152 | (1) |
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Mathematical Model in the Saturation (Pinch-Off) Region |
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153 | (2) |
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155 | (1) |
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Channel-Length Modulation |
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155 | (1) |
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Transfer Characteristics and Depletion-Mode MOSFETS |
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156 | (1) |
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Body Effect or Substrate Sensitivity |
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157 | (2) |
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159 | (1) |
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160 | (3) |
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MOS Transistor Fabrication and Layout Design Rules2 |
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163 | (2) |
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Minimum Feature Size and Alignment Tolerance |
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163 | (1) |
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164 | (1) |
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Capacitances in MOS Transistors |
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165 | (2) |
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NMOS Transistor Capacitances in the Triode Region |
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166 | (1) |
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Capacitances in the Saturation Region |
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167 | (1) |
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167 | (1) |
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167 | (2) |
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Biasing the NMOS Field-Effect Transistor |
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169 | (18) |
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169 | (18) |
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Biasing the PMOS Field-Effect Transistor |
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187 | (2) |
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189 | (18) |
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189 | (2) |
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191 | (1) |
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Circuit and Power Densities |
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191 | (1) |
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191 | (1) |
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192 | (1) |
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192 | (1) |
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193 | (1) |
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194 | (1) |
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195 | (1) |
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196 | (1) |
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197 | (10) |
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Bipolar Junction Transistors |
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207 | (68) |
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Physical Structure of the Bipolar Transistor |
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208 | (1) |
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The Transport Model for the npn Transistor |
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209 | (6) |
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210 | (2) |
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212 | (1) |
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The Complete Transport Model Equations for Arbitrary Bias Conditions |
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213 | (2) |
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215 | (2) |
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Equivalent Circuit Representations for the Transport Models |
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217 | (1) |
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The i-v Characteristics of the Bipolar Transistor |
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218 | (2) |
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218 | (1) |
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219 | (1) |
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The Operating Regions of the Bipolar Transistor |
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220 | (1) |
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Transport Model Simplifications |
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221 | (14) |
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Simplified Model for the Cutoff Region |
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221 | (2) |
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Model Simplifications for the Forward-Active Region |
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223 | (6) |
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Diodes in Bipolar Integrated Circuits |
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229 | (1) |
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Simplified Model for the Reverse-Active Region |
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230 | (2) |
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Modeling Operation in the Saturation Region |
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232 | (3) |
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Nonideal Behavior of the Bipolar Transistor |
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235 | (7) |
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Junction Breakdown Voltages |
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236 | (1) |
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Minority-Carrier Transport in the Base Region |
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236 | (1) |
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237 | (2) |
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239 | (1) |
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Frequency Dependence of the Common-Emitter Current Gain |
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240 | (1) |
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The Early Effect and Early Voltage |
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240 | (1) |
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Modeling the Early Effect |
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241 | (1) |
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Origin of the Early Effect |
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241 | (1) |
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242 | (1) |
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Bipolar Technology and SPICE Model |
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243 | (3) |
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243 | (1) |
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244 | (1) |
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High-Performance Bipolar Transistors |
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245 | (1) |
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Practical Bias Circuits for the BJT |
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246 | (3) |
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Four-Resistor Bias Network |
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248 | (1) |
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Design Objectives for the Four-Resistor Bias Network |
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249 | (5) |
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Tolerances in Bias Circuits |
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254 | (21) |
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255 | (2) |
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257 | (3) |
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260 | (2) |
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262 | (1) |
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262 | (1) |
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263 | (12) |
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PART TWO DIGITAL ELECTRONICS |
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Introduction to Digital Electronics |
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275 | (77) |
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277 | (1) |
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Logic Level Definitions and Noise Margins |
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277 | (4) |
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279 | (1) |
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279 | (1) |
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280 | (1) |
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Dynamic Response of Logic Gates |
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281 | (2) |
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281 | (1) |
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282 | (1) |
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282 | (1) |
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Review of Boolean Algebra |
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283 | (2) |
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285 | (9) |
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NMOS Inverter with Resistive Load |
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286 | (1) |
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Design of the W/L Ratio of MS |
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287 | (1) |
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288 | (1) |
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288 | (2) |
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On-Resistance of the Switching Device |
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290 | (1) |
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291 | (1) |
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Calculation of VIL and VOH |
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291 | (1) |
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Calculation of VIH and VOL |
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292 | (1) |
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293 | (1) |
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Transistor Alternatives to the Load Resistor |
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294 | (17) |
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The NMOS Saturated Load Inverter |
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295 | (8) |
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NMOS Inverter with a Linear Load Device |
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303 | (1) |
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NMOS Inverter with a Depletion-Mode Load |
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304 | (3) |
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Static Design of the Pseudo NMOS Inverter |
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307 | (4) |
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NMOS Inverter Summary and Comparison |
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311 | (1) |
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312 | (4) |
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313 | (1) |
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314 | (1) |
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NOR and NAND Gate Layouts in NMOS Depletion-Mode Technology |
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315 | (1) |
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Complex NMOS Logic Design |
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316 | (5) |
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Selecting Between the Two Designs |
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319 | (2) |
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321 | (4) |
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321 | (1) |
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Dynamic Power Dissipation |
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322 | (1) |
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Power Scaling in MOS Logic Gates |
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323 | (2) |
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Dynamic Behavior of MOS Logic Gates |
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325 | (10) |
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Capacitances in Logic Circuits |
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325 | (1) |
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Dynamic Response of the NMOS Inverter with a Resistive Load |
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326 | (5) |
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331 | (1) |
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A Final Comparison of NMOS Inverter Delays |
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332 | (3) |
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335 | (17) |
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335 | (3) |
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338 | (1) |
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338 | (2) |
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340 | (1) |
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341 | (1) |
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341 | (1) |
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341 | (11) |
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Complementary MOS (CMOS) Logic Design |
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352 | (46) |
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353 | (2) |
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355 | (1) |
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Static Characteristics of the CMOS Inverter |
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355 | (5) |
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CMOS Voltage Transfer Characteristics |
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356 | (2) |
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Noise Margins for the CMOS Inverter |
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358 | (2) |
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Dynamic Behavior of the CMOS Inverter |
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360 | (5) |
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Propagation Delay Estimate |
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360 | (2) |
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362 | (2) |
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Delay of Cascaded Inverters |
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364 | (1) |
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Power Dissipation and Power Delay Product in CMOS |
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365 | (2) |
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365 | (1) |
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Dynamic Power Dissipation |
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365 | (1) |
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366 | (1) |
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367 | (5) |
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367 | (3) |
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370 | (2) |
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Design of Complex Gates in CMOS |
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372 | (4) |
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Minimum Size Gate Design and Performance |
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376 | (3) |
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Dynamic Domino CMOS Logic |
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379 | (1) |
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380 | (4) |
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Cascade Buffer Delay Model |
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381 | (1) |
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381 | (3) |
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The CMOS Transmission Gate |
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384 | (1) |
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384 | (14) |
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387 | (1) |
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388 | (1) |
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389 | (1) |
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389 | (9) |
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MOS Memory and Storage Circuits |
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398 | (42) |
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399 | (2) |
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Random Access Memory (RAM) Architecture |
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399 | (1) |
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400 | (1) |
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401 | (7) |
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Memory Cell Isolation and Access---The 6-T Cell |
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402 | (1) |
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403 | (3) |
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Writing Data into the 6-T Cell |
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406 | (2) |
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408 | (6) |
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410 | (1) |
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Data Storage in the 1-T Cell |
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410 | (2) |
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Reading Data from the 1-T Cell |
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412 | (1) |
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413 | (1) |
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414 | (6) |
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A Sense Amplifier for the 6-T Cell |
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414 | (2) |
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A Sense Amplifier for the 1-T Cell |
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416 | (2) |
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The Boosted Wordline Circuit |
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418 | (1) |
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Clocked CMOS Sense Amplifiers |
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418 | (2) |
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420 | (4) |
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420 | (1) |
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420 | (2) |
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Decoders in Domino CMOS Logic |
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422 | (1) |
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Pass-Transistor Column Decoder |
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422 | (2) |
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424 | (3) |
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427 | (13) |
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429 | (1) |
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The D-Latch Using Transmission Gates |
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430 | (1) |
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A Master-Slave D Flip-Flop |
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430 | (1) |
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431 | (1) |
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432 | (1) |
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432 | (1) |
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433 | (7) |
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440 | (65) |
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The Current Switch (Emitter-Coupled Pair) |
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441 | (3) |
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Mathematical Model for Static Behavior of the Current Switch |
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442 | (1) |
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Current Switch Analysis for VI > VREF |
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443 | (1) |
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Current Switch Analysis for VI < VREF |
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444 | (1) |
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The Emitter-Coupled Logic (ECL) Gate |
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444 | (3) |
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445 | (1) |
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446 | (1) |
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Input Current of the ECL Gate |
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446 | (1) |
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446 | (1) |
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Noise Margin Analysis for the ECL Gate |
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447 | (2) |
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447 | (1) |
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448 | (1) |
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Current Source Implementation |
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449 | (2) |
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451 | (2) |
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453 | (3) |
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Emitter Follower with a Load Resistor |
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454 | (2) |
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``Emitter Dotting'' or ``Wired-OR'' Logic |
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456 | (1) |
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Parallel Connection of Emitter-Follower Outputs |
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457 | (1) |
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The Wired-OR Logic Function |
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457 | (1) |
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ECL Power-Delay Characteristics |
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457 | (4) |
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457 | (2) |
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459 | (1) |
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460 | (1) |
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The Saturating Bipolar Inverter |
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461 | (8) |
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Static Inverter Characteristics |
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464 | (1) |
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Saturation Voltage of the Bipolar Transistor |
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464 | (2) |
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466 | (1) |
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Switching Characteristics of the Saturated BJT |
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467 | (2) |
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A Transistor-Transistor Logic (TTL) Prototype |
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469 | (8) |
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470 | (1) |
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471 | (1) |
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Power in the Prototype TTL Gate |
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471 | (1) |
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VIH, VIL, and Noise Margins for the TTL Prototype |
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472 | (2) |
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Prototype Inverter Summary |
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474 | (1) |
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Fanout Limitations of the TTL Prototype |
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474 | (3) |
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The Standard 7400 Series TTL Inverter |
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477 | (5) |
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478 | (1) |
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479 | (1) |
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480 | (1) |
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TTL Propagation Delay and Power-Delay Product |
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480 | (1) |
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TTL Voltage Transfer Characteristic and Noise Margins |
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481 | (1) |
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Fanout Limitations of Standard TTL |
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481 | (1) |
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482 | (2) |
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Multi-Emitter Input Transistors |
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482 | (1) |
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482 | (1) |
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483 | (1) |
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484 | (1) |
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Comparison of the Power-Delay Products of ECL and TTL |
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485 | (1) |
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486 | (19) |
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487 | (1) |
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488 | (2) |
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490 | (1) |
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491 | (1) |
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492 | (1) |
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493 | (1) |
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493 | (1) |
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493 | (12) |
|
PART THREE ANALOG CIRCUIT DESIGN |
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505 | (36) |
|
An Example of an Analog Electronic System |
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506 | (1) |
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507 | (3) |
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508 | (1) |
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508 | (1) |
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509 | (1) |
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509 | (1) |
|
Amplifier Biasing for Linear Operation |
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510 | (2) |
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512 | (1) |
|
Two-Port Models for Amplifiers |
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513 | (6) |
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515 | (4) |
|
Mismatched Source and Load Resistances |
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|
519 | (1) |
|
Amplifier Transfer Functions and Frequency Response |
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520 | (21) |
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521 | (1) |
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521 | (5) |
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526 | (2) |
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528 | (2) |
|
Narrow-Band or High-Q Band-Pass Amplifiers |
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530 | (1) |
|
Band-Rejection Amplifiers |
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|
531 | (1) |
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532 | (1) |
|
More Complex Transfer Functions |
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532 | (2) |
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534 | (1) |
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535 | (1) |
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536 | (1) |
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536 | (5) |
|
Ideal Operational Amplifiers |
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541 | (69) |
|
The Differential Amplifier |
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542 | (3) |
|
Differential Amplifier Model |
|
|
542 | (2) |
|
The Ideal Differential Amplifier |
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544 | (1) |
|
The Ideal Operational Amplifier |
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|
545 | (1) |
|
Assumptions for Ideal Operational Amplifier Analysis |
|
|
545 | (1) |
|
Analysis of Circuits Containing Ideal Operational Amplifiers |
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546 | (24) |
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546 | (4) |
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The Noninverting Amplifier |
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550 | (2) |
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The Unity-Gain Buffer, or Voltage Follower |
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552 | (2) |
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554 | (2) |
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556 | (3) |
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The Instrumentation Amplifier |
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559 | (2) |
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An Active Low-Pass Filter |
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561 | (3) |
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564 | (3) |
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567 | (1) |
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568 | (2) |
|
Amplifier Terminology Review |
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570 | (1) |
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570 | (14) |
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571 | (4) |
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575 | (1) |
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A High-Pass Filter with Gain |
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575 | (2) |
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577 | (2) |
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579 | (3) |
|
Magnitude and Frequency Scaling |
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|
582 | (2) |
|
Nonlinear Circuit Applications |
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|
584 | (3) |
|
A Precision Half-Wave Rectifier |
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585 | (1) |
|
Nonsaturating Precision-Rectifier Circuit |
|
|
586 | (1) |
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587 | (1) |
|
Circuits Using Positive Feedback |
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587 | (23) |
|
The Comparator and Schmitt Trigger |
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588 | (1) |
|
The Astable Multivibrator |
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589 | (4) |
|
The Monostable Multivibrator or One Shot |
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593 | (1) |
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594 | (1) |
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595 | (1) |
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596 | (1) |
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597 | (1) |
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597 | (13) |
|
Characteristics and Limitations of Operational Amplifiers |
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610 | (58) |
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Gain, Input Resistance, and Output Resistance |
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611 | (11) |
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611 | (1) |
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612 | (2) |
|
Nonzero Output Resistance |
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614 | (4) |
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618 | (4) |
|
Summary of Nonideal Inverting and Noninverting Amplifiers |
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622 | (1) |
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Common-Mode Rejection and Input Resistance |
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622 | (7) |
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Finite Common-Mode Rejection Ratio |
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622 | (1) |
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623 | (3) |
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Voltage-Follower Gain Error Due to CMRR |
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626 | (2) |
|
Common-Mode Input Resistance |
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628 | (1) |
|
DC Error Sources and Output Range Limitations |
|
|
629 | (9) |
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629 | (2) |
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Offset-Voltage Adjustment |
|
|
631 | (1) |
|
An Alternate Interpretation of CMRR |
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|
631 | (1) |
|
Input-Bias and Offset Currents |
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|
631 | (3) |
|
Output Voltage and Current Limits |
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|
634 | (4) |
|
Frequency Response and Bandwidth of Operational Amplifiers |
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638 | (30) |
|
Frequency Response of the Noninverting Amplifier |
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|
641 | (2) |
|
Inverting Amplifier Frequency Response |
|
|
643 | (2) |
|
Frequency Response of Cascaded Amplifiers |
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645 | (7) |
|
Large-Signal Limitations---Slew Rate and Full-Power Bandwidth |
|
|
652 | (1) |
|
Macro Model for Operational Amplifier Frequency Response |
|
|
653 | (1) |
|
Complete Op Amp Macro Models in SPICE |
|
|
654 | (1) |
|
Examples of Commercial General-Purpose Operational Amplifiers |
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654 | (3) |
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657 | (1) |
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658 | (1) |
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658 | (1) |
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658 | (1) |
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658 | (10) |
|
Small-Signal Modeling and Linear Amplification---Inverting Amplifiers |
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668 | (82) |
|
The Transistor as an Amplifier |
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669 | (3) |
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670 | (1) |
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671 | (1) |
|
Coupling and Bypass Capacitors |
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|
672 | (1) |
|
Circuit Analysis Using dc and ac Equivalent Circuits |
|
|
673 | (4) |
|
Menu for dc and ac Analysis |
|
|
674 | (3) |
|
Introduction to Small-Signal Modeling |
|
|
677 | (3) |
|
Graphical Interpretation of the Small-Signal Behavior of the Diode |
|
|
678 | (1) |
|
Small-Signal Modeling of the Diode |
|
|
679 | (1) |
|
Small-Signal Models for Bipolar Junction Transistors |
|
|
680 | (8) |
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682 | (1) |
|
Graphical Interpretation of the Transconductance |
|
|
683 | (1) |
|
Small-Signal Current Gain |
|
|
683 | (1) |
|
The Intrinsic Voltage Gain of the BJT |
|
|
684 | (1) |
|
Equivalent Forms of the Small-Signal Model |
|
|
685 | (1) |
|
Simplified Hybrid Pi Model |
|
|
686 | (1) |
|
Definition of a Small Signal for the Bipolar Transistor |
|
|
686 | (1) |
|
Small-Signal Model for the pnp Transistor |
|
|
687 | (1) |
|
ac Analysis Versus Transient Analysis in SPICE |
|
|
688 | (1) |
|
The BJT Common-Emitter (C-E) Amplifier |
|
|
688 | (3) |
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|
690 | (1) |
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|
690 | (1) |
|
Signal Source Voltage Gain |
|
|
691 | (1) |
|
Important Limits and Model Simplifications |
|
|
691 | (10) |
|
Zero Resistance in the Emitter |
|
|
691 | (1) |
|
A Design Guide for the Common-Emitter Amplifier with RE = o |
|
|
692 | (1) |
|
Common-Emitter Voltage Gain for Large Emitter Resistance |
|
|
693 | (1) |
|
Small-Signal Limit for the Common-Emitter Amplifier |
|
|
693 | (4) |
|
Resistance at the Collector of the Bipolar Transistor |
|
|
697 | (2) |
|
Output Resistance of the Overall Common-Emitter Amplifier |
|
|
699 | (2) |
|
Terminal Current Gain for the Common-Emitter Amplifier |
|
|
701 | (1) |
|
Small-Signal Models for Field-Effect Transistors |
|
|
701 | (5) |
|
Small-Signal Model for the MOSFET |
|
|
701 | (2) |
|
Intrinsic Voltage Gain of the MOSFET |
|
|
703 | (1) |
|
Definition of Small-Signal Operation for the MOSFET |
|
|
704 | (1) |
|
Body Effect in the Four-Terminal MOSFET |
|
|
704 | (1) |
|
Small-Signal Model for the PMOS Transistor |
|
|
705 | (1) |
|
Summary and Comparison of the Small-Signal Models of the BJT and FET |
|
|
706 | (3) |
|
The Common-Source Amplifier |
|
|
709 | (12) |
|
Common-Source Terminal Voltage Gain |
|
|
710 | (1) |
|
Signal Source Voltage Gain for the Common-Source Amplifier |
|
|
711 | (1) |
|
Common-Source Voltage Gain for Large Values of RS |
|
|
711 | (1) |
|
Zero Resistance in the Source |
|
|
711 | (3) |
|
A Design Guide for the Common-Source Amplifier with RS = o |
|
|
714 | (1) |
|
Small-Signal Limit for the Common-Source Amplifier |
|
|
714 | (3) |
|
Input Resistances of the Common-Emitter and Common-Source Amplifiers |
|
|
717 | (3) |
|
Common-Emitter and Common-Source Output Resistances |
|
|
720 | (1) |
|
Examples of Common-Emitter and Common-Source Amplifiers |
|
|
721 | (12) |
|
A Common-Emitter Amplifier |
|
|
722 | (4) |
|
ac Versus Transient Analysis in SPICE---Another Visit |
|
|
726 | (1) |
|
A MOSFET Common-Source Amplifier |
|
|
726 | (5) |
|
Comparison of the two Amplifier Examples |
|
|
731 | (1) |
|
Common-Emitter and Common-Source Amplifier Summary |
|
|
731 | (1) |
|
Feedback in the Inverting Amplifiers |
|
|
732 | (1) |
|
Guidelines for Neglecting the Transistor Output Resistance |
|
|
732 | (1) |
|
Amplifier Power and Signal Range |
|
|
733 | (17) |
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|
|
733 | (1) |
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|
|
734 | (3) |
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|
|
737 | (1) |
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|
|
738 | (1) |
|
|
|
738 | (12) |
|
Single-Transistor and Multistage ac-Coupled Amplifiers |
|
|
750 | (88) |
|
|
|
751 | (6) |
|
Signal Injection and Extraction---The BJT |
|
|
751 | (1) |
|
Signal Injection and Extraction---The FET |
|
|
752 | (1) |
|
Common-Emitter (C-E) and Common-Source (C-S) Amplifiers |
|
|
753 | (1) |
|
Common-Collector (C-C) and Common-Drain (C-D) Topologies |
|
|
754 | (2) |
|
Common-Base (C-B) and Common-Gate (C-G) Amplifiers |
|
|
756 | (1) |
|
Small-Signal Model Review |
|
|
757 | (1) |
|
Inverting Amplifiers---Common-Emitter and Common-Source Circuits |
|
|
757 | (6) |
|
Common-Emitter and Common-Source Amplifier Characteristics |
|
|
758 | (4) |
|
C-E/C-S Amplifier Summary |
|
|
762 | (1) |
|
Equivalent Transistor Representation of the Generalized C-E/C-S Transistor |
|
|
762 | (1) |
|
Follower Circuits---Common-Collector and Common-Drain Amplifiers |
|
|
763 | (8) |
|
|
|
763 | (1) |
|
|
|
764 | (1) |
|
Signal Source Voltage Gain |
|
|
764 | (3) |
|
|
|
767 | (1) |
|
Resistance at the Emitter Terminal |
|
|
767 | (3) |
|
|
|
770 | (1) |
|
C-C/C-D Amplifier Summary |
|
|
770 | (1) |
|
Noninverting Amplifiers---Common-Base and Common-Gate Circuits |
|
|
771 | (7) |
|
Terminal Voltage Gain and Input Resistance |
|
|
771 | (1) |
|
Signal Source Voltage Gain |
|
|
772 | (1) |
|
|
|
773 | (1) |
|
Resistance at the Collector and Drain Terminals |
|
|
774 | (1) |
|
|
|
775 | (1) |
|
Overall Input and Output Resistances for the Noninverting Amplifiers |
|
|
775 | (3) |
|
C-B/C-G Amplifier Summary |
|
|
778 | (1) |
|
Amplifier Prototype Review and Comparison |
|
|
778 | (8) |
|
|
|
779 | (2) |
|
|
|
781 | (5) |
|
Coupling and Bypass Capacitor Design |
|
|
786 | (11) |
|
Common-Emitter and Common-Source Amplifiers |
|
|
786 | (4) |
|
Common-Collector and Common-Drain Amplifiers |
|
|
790 | (3) |
|
Common-Base and Common-Gate Amplifiers |
|
|
793 | (3) |
|
Setting Lower Cutoff Frequency fL |
|
|
796 | (1) |
|
Amplifier Design Examples |
|
|
797 | (14) |
|
Monte Carlo Evaluation of the Common-Base Amplifier Design |
|
|
806 | (5) |
|
Multistage ac-Coupled Amplifiers |
|
|
811 | (27) |
|
A Three-Stage ac-Coupled Amplifier |
|
|
811 | (2) |
|
|
|
813 | (2) |
|
|
|
815 | (1) |
|
Signal Source Voltage Gain |
|
|
815 | (1) |
|
|
|
815 | (1) |
|
|
|
816 | (1) |
|
|
|
817 | (3) |
|
Improving Amplifier Voltage Gain |
|
|
820 | (1) |
|
Estimating the Lower Cutoff Frequency of the Multistage Amplifier |
|
|
820 | (2) |
|
|
|
822 | (1) |
|
|
|
823 | (1) |
|
|
|
824 | (1) |
|
|
|
824 | (14) |
|
Differential Amplifiers and Operational Amplifier Design |
|
|
838 | (147) |
|
|
|
839 | (22) |
|
Bipolar and MOS Differential Amplifiers |
|
|
840 | (1) |
|
dc Analysis of the Bipolar Differential Amplifier |
|
|
840 | (2) |
|
Transfer Characteristic for the Bipolar Differential Amplifier |
|
|
842 | (1) |
|
ac Analysis of the Bipolar Differential Amplifier |
|
|
843 | (1) |
|
Differential-Mode Gain and Input Resistance |
|
|
844 | (2) |
|
Common-Mode Gain and Input Resistance |
|
|
846 | (2) |
|
Common-Mode Rejection Ratio (CMRR) |
|
|
848 | (1) |
|
Analysis Using Differential- and Common-Mode Half-Circuits |
|
|
849 | (3) |
|
Biasing with Electronic Current Sources |
|
|
852 | (1) |
|
Modeling the Electronic Current Source in SPICE |
|
|
853 | (1) |
|
dc Analysis of the MOSFET Differential Amplifier |
|
|
853 | (2) |
|
Differential-Mode Input Signals |
|
|
855 | (1) |
|
Small-Signal Transfer Characteristic for the MOS Differential Amplifier |
|
|
856 | (1) |
|
Common-Mode Input Signals |
|
|
856 | (1) |
|
Two-Port Model for Differential Pairs |
|
|
857 | (4) |
|
Evolution to Basic Operational Amplifiers |
|
|
861 | (13) |
|
A Two-Stage Prototype for an Operational Amplifier |
|
|
861 | (6) |
|
Improving the Op Amp Voltage Gain |
|
|
867 | (1) |
|
Output Resistance Reduction |
|
|
868 | (4) |
|
A CMOS Operational Amplifier Prototype |
|
|
872 | (1) |
|
|
|
873 | (1) |
|
|
|
874 | (10) |
|
The Source Follower---A Class-A Output Stage |
|
|
874 | (2) |
|
Efficiency of Class-A Amplifiers |
|
|
876 | (1) |
|
Class-B Push-Pull Output Stage |
|
|
876 | (2) |
|
|
|
878 | (2) |
|
Class-AB Output Stages for Operational Amplifiers |
|
|
880 | (1) |
|
|
|
880 | (1) |
|
|
|
881 | (3) |
|
Electronic Current Sources |
|
|
884 | (9) |
|
Single-Transistor Current Sources |
|
|
885 | (1) |
|
Figure of Merit for Current Sources |
|
|
885 | (1) |
|
Higher Output Resistance Sources |
|
|
886 | (1) |
|
Current Source Design Examples |
|
|
886 | (7) |
|
|
|
893 | (1) |
|
|
|
894 | (15) |
|
dc Analysis of the MOS Transistor Current Mirror |
|
|
894 | (3) |
|
Changing the MOS Mirror Ratio |
|
|
897 | (1) |
|
dc Analysis of the Bipolar Transistor Current Mirror |
|
|
897 | (2) |
|
Altering the BJT Current Mirror Ratio |
|
|
899 | (1) |
|
|
|
900 | (2) |
|
|
|
902 | (1) |
|
Output Resistance of the Current Mirrors |
|
|
902 | (1) |
|
Two-Port Model for the Current Mirror |
|
|
903 | (3) |
|
The Widlar Current Source |
|
|
906 | (1) |
|
The MOS Version of the Widlar Source |
|
|
907 | (2) |
|
High-Output-Resistance Current Mirrors |
|
|
909 | (8) |
|
The Wilson Current Sources |
|
|
909 | (2) |
|
Output Resistance of the Wilson Source |
|
|
911 | (1) |
|
|
|
912 | (1) |
|
Output Resistance of the Cascode Sources |
|
|
913 | (1) |
|
|
|
914 | (3) |
|
Reference Current Generation |
|
|
917 | (7) |
|
Supply-Independent Biasing |
|
|
917 | (3) |
|
A Supply-Independent MOS Reference Cell |
|
|
920 | (4) |
|
The Current Mirror As an Active Load |
|
|
924 | (11) |
|
CMOS Differential Amplifier with Active Load |
|
|
924 | (7) |
|
Bipolar Differential Amplifier with Active Load |
|
|
931 | (4) |
|
Active Loads in Operational Amplifiers |
|
|
935 | (5) |
|
|
|
935 | (1) |
|
|
|
936 | (2) |
|
Bipolar Operational Amplifiers |
|
|
938 | (1) |
|
|
|
939 | (1) |
|
The μA741 Operational Amplifier |
|
|
940 | (45) |
|
|
|
941 | (1) |
|
dc Analysis of the 741 Input Stage |
|
|
942 | (3) |
|
ac Analysis of the 741 Input Stage |
|
|
945 | (1) |
|
Voltage Gain of the Complete Amplifier |
|
|
946 | (4) |
|
|
|
950 | (2) |
|
|
|
952 | (1) |
|
|
|
952 | (1) |
|
Summary of theμA741 Operational Amplifier Characteristics |
|
|
952 | (3) |
|
|
|
955 | (2) |
|
|
|
957 | (1) |
|
|
|
957 | (1) |
|
|
|
958 | (1) |
|
|
|
958 | (27) |
|
|
|
985 | (83) |
|
Amplifier Frequency Response |
|
|
986 | (5) |
|
|
|
987 | (1) |
|
Estimating ωL in the Absence of a Dominant Pole |
|
|
987 | (3) |
|
|
|
990 | (1) |
|
Estimating ωH in the Absence of a Dominant Pole |
|
|
990 | (1) |
|
Direct Determination of the Low-Frequency Poles and Zeros-The Common-Source Amplifier |
|
|
991 | (5) |
|
Estimation of ωL Using the Short-Circuit Time-Constant Method |
|
|
996 | (9) |
|
Estimate of ωL for the Common-Emitter Amplifier |
|
|
997 | (4) |
|
Estimate of ωL for the Common-Source Amplifier |
|
|
1001 | (1) |
|
Estimate of ωL for the Common-Base Amplifier |
|
|
1002 | (1) |
|
Estimate of ωL for the Common-Gate Amplifier |
|
|
1003 | (1) |
|
Estimate of ωL for the Common-Collector Amplifier |
|
|
1004 | (1) |
|
Estimate of ωL for the Common-Drain Amplifier |
|
|
1004 | (1) |
|
Transistor Models at High Frequencies |
|
|
1005 | (7) |
|
Frequency-Dependent Hybrid-Pi Model for the Bipolar Transistor |
|
|
1005 | (1) |
|
Modeling Cπ and Cμ in SPICE |
|
|
1006 | (1) |
|
|
|
1006 | (3) |
|
High-Frequency Model for the FET |
|
|
1009 | (1) |
|
Modeling CGS and CGD in SPICE |
|
|
1010 | (1) |
|
Channel Length Dependence of ƒT |
|
|
1010 | (2) |
|
Limitations of the High-Frequency Models |
|
|
1012 | (1) |
|
Base Resistance in the Hybrid-Pi Model |
|
|
1012 | (3) |
|
Effect of Base Resistance on Midband Amplifiers |
|
|
1013 | (2) |
|
High-Frequency Common-Emitter and Common-Source Amplifier Analysis |
|
|
1015 | (16) |
|
|
|
1016 | (1) |
|
Common-Emitter and Common-Source Amplifier High-Frequency Response |
|
|
1017 | (2) |
|
Direct Analysis of the Common-Emitter Transfer Characteristic |
|
|
1019 | (1) |
|
Poles of the Common-Emitter Amplifier |
|
|
1020 | (3) |
|
Dominant Pole for the Common-Source Amplifier |
|
|
1023 | (1) |
|
Estimation of ωH Using the Open-Circuit Time-Constant Method |
|
|
1024 | (3) |
|
Common-Source Amplifier with Source Degeneration Resistance |
|
|
1027 | (2) |
|
Poles of the Common-Emitter with Emitter degeneration Resistance |
|
|
1029 | (2) |
|
Common-Base and Common-Gate Amplifier High-Frequency Response |
|
|
1031 | (3) |
|
Common-Collector and Common-Drain Amplifier High-Frequency Response |
|
|
1034 | (2) |
|
Single-Stage Amplifier High-Frequency Response Summary |
|
|
1036 | (1) |
|
Amplifier Gain-Bandwidth Limitations |
|
|
1036 | (1) |
|
Frequency Response of Multistage Amplifiers |
|
|
1037 | (13) |
|
|
|
1038 | (1) |
|
The Common-Collector/Common-Base Cascade |
|
|
1039 | (2) |
|
High-Frequency Response of the Cascode Amplifier |
|
|
1041 | (1) |
|
Cutoff Frequency for the Current Mirror |
|
|
1042 | (1) |
|
Three-Stage Amplifier Example |
|
|
1043 | (7) |
|
|
|
1050 | (18) |
|
|
|
1050 | (3) |
|
Use of a Tapped Inductor-The Auto Transformer |
|
|
1053 | (1) |
|
Multiple Tuned Circuits---Synchronous and Stagger Tuning |
|
|
1054 | (2) |
|
|
|
1056 | (1) |
|
|
|
1057 | (1) |
|
|
|
1058 | (1) |
|
|
|
1058 | (10) |
|
Feedback, Stability, and Oscillators |
|
|
1068 | (102) |
|
|
|
1069 | (1) |
|
Feedback Amplifier Design Using Two-Port Network Theory |
|
|
1070 | (1) |
|
Voltage Amplifiers---Series-Shunt Feedback |
|
|
1071 | (7) |
|
|
|
1072 | (2) |
|
|
|
1074 | (1) |
|
|
|
1074 | (4) |
|
Transresistance Amplifiers---Shunt-Shunt Feedback |
|
|
1078 | (8) |
|
|
|
1079 | (2) |
|
|
|
1081 | (1) |
|
|
|
1081 | (5) |
|
Current Amplifiers---Shunt-Series Feedback |
|
|
1086 | (4) |
|
|
|
1086 | (2) |
|
|
|
1088 | (1) |
|
|
|
1089 | (1) |
|
Transconductance Amplifiers---Series-Series Feedback |
|
|
1090 | (2) |
|
Transconductance Analysis |
|
|
1090 | (2) |
|
Input and Output Resistances |
|
|
1092 | (1) |
|
Common Errors in Applying Two-Port Feedback Theory |
|
|
1092 | (8) |
|
|
|
1100 | (7) |
|
Direct Calculation of the Loop Gain |
|
|
1100 | (2) |
|
Finding the Loop Gain Using Successive Voltage and Current Injection |
|
|
1102 | (3) |
|
|
|
1105 | (2) |
|
Blackman's Theorem to the Rescue |
|
|
1107 | (7) |
|
Using Feedback to Control Frequency Response |
|
|
1114 | (2) |
|
Stability of Feedback Amplifiers |
|
|
1116 | (6) |
|
|
|
1116 | (1) |
|
|
|
1117 | (1) |
|
Second-Order Systems and Phase Margin |
|
|
1118 | (1) |
|
Third-Order Systems and Gain Margin |
|
|
1119 | (1) |
|
Determining Stability from the Bode Plot |
|
|
1120 | (2) |
|
Single-Pole Operational Amplifier Compensation |
|
|
1122 | (15) |
|
Three-Stage Op Amp Analysis |
|
|
1123 | (1) |
|
Transmission Zeros in FET Op Amps |
|
|
1124 | (2) |
|
Bipolar Amplifier Compensation |
|
|
1126 | (1) |
|
Slew Rate of the Operational Amplifier |
|
|
1127 | (1) |
|
Relationships Between Slew Rate and Gain-Bandwidth Product |
|
|
1128 | (9) |
|
|
|
1137 | (27) |
|
The Barkhausen Criteria for Oscillation |
|
|
1137 | (3) |
|
Oscillators Employing Frequency-Selective RC Networks |
|
|
1140 | (4) |
|
|
|
1144 | (2) |
|
|
|
1146 | (5) |
|
|
|
1151 | (1) |
|
|
|
1152 | (1) |
|
|
|
1152 | (1) |
|
|
|
1153 | (11) |
|
|
|
|
Standard Discrete Component Values |
|
|
1164 | (3) |
|
Solid-State Device Models and SPICE Simulation Parameters |
|
|
1167 | (3) |
| Index |
|
1170 | |
