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Microelectronic Circuit Design 4th edition [Kõva köide]

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  • Formaat: Hardback, 1376 pages, kõrgus x laius x paksus: 262x203x48 mm, kaal: 2542 g, Illustrations
  • Ilmumisaeg: 16-Mar-2010
  • Kirjastus: McGraw-Hill Professional
  • ISBN-10: 0073380458
  • ISBN-13: 9780073380452
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Microelectronic Circuit Design 4th editionSuurem pilt
  • Formaat: Hardback, 1376 pages, kõrgus x laius x paksus: 262x203x48 mm, kaal: 2542 g, Illustrations
  • Ilmumisaeg: 16-Mar-2010
  • Kirjastus: McGraw-Hill Professional
  • ISBN-10: 0073380458
  • ISBN-13: 9780073380452
Teised raamatud teemal:
Püsilink: https://www.kriso.ee/db/9780073380452.html
Märksõnad:

Richard Jaeger and Travis Blalock present a balanced coverage of analog and digital circuits; students will develop a comprehensive understanding of the basic techniques of modern electronic circuit design, analog and digital, discrete and integrated.

A broad spectrum of topics are included in Microelectronic Circuit Design which gives the professor the option to easily select and customize the material to satisfy a two-semester or three-quarter sequence in electronics. Jaeger/Blalock emphasizes design through the use of design examples and design notes. Excellent pedagogical elements include chapter opening vignettes, chapter objectives, “Electronics in Action” boxes, a problem-solving methodology, and "Design Note” boxes.

The use of the well-defined problem-solving methodology presented in this text can significantly enhance an engineer’s ability to understand the issues related to design. The design examples assist in building and understanding the design process.

Preface xx
PART ONE SOLID STATE ELECTRONIC AND DEVICES
1(284)
Introduction to Electronics
3(39)
A Brief History of Electronics: From Vacuum Tubes to Giga-Scale Integration
5(3)
Classification of Electronic Signals
8(4)
Digital Signals
9(1)
Analog Signals
9(1)
A/D and D/A Converters---Bridging the Analog and Digital Domains
10(2)
Notational Conventions
12(1)
Problem-Solving Approach
13(2)
Important Concepts from Circuit Theory
15(6)
Voltage and Current Division
15(1)
Thevenin and Norton Circuit Representations
16(5)
Frequency Spectrum of Electronic Signals
21(1)
Amplifiers
22(4)
Ideal Operational Amplifiers
23(2)
Amplifier Frequency Response
25(1)
Element Variations in Circuit Design
26(8)
Mathematical Modeling of Tolerances
26(1)
Worst-Case Analysis
27(2)
Monte Carlo Analysis
29(3)
Temperature Coefficients
32(2)
Numeric Precision
34(8)
Summary
34(1)
Key Terms
35(1)
References
36(1)
Additional Reading
36(1)
Problems
37(5)
Solid-State Electronics
42(32)
Solid-State Electronic Materials
44(1)
Covalent Bond Model
45(3)
Drift Currents and Mobility in Semiconductors
48(2)
Drift Currents
48(1)
Mobility
49(1)
Velocity Saturation
49(1)
Resistivity of Intrinsic Silicon
50(1)
Impurities in Semiconductors
51(1)
Donor Impurities in Silicon
52(1)
Acceptor Impurities in Silicon
52(1)
Electron and Hole Concentrations in Doped Semiconductors
52(3)
n-Type Material (ND>NA)
53(1)
p-Type Material (NA>ND)
54(1)
Mobility and Resistivity in Doped Semiconductors
55(4)
Diffusion Currents
59(1)
Total Current
60(1)
Energy Band Model
61(3)
Electron-Hole Pair Generation in an Intrinsic Semiconductor
61(1)
Energy Band Model for a Doped Semiconductor
62(1)
Compensated Semiconductors
62(2)
Overview of Integrated Circuit Fabrication
64(10)
Summary
67(1)
Key Terms
68(1)
Reference
69(1)
Additional Reading
69(1)
Important Equations
69(1)
Problems
70(4)
Solid-State Diodes and Diode Circuits
74(71)
The pn Junction Diode
75(5)
pn Junction Electrostatics
75(4)
Internal Diode Currents
79(1)
The i-v Characteristics of the Diode
80(2)
The Diode Equation: A Mathematical Model for the Diode
82(3)
Diode Characteristics Under Reverse, Zero, and Forward Bias
85(4)
Reverse Bias
85(1)
Zero Bias
85(1)
Forward Bias
86(3)
Diode Temperature Coefficient
89(1)
Diodes Under Reverse Bias
89(3)
Saturation Current in Real Diodes
90(1)
Reverse Breakdown
91(1)
Diode Model for the Breakdown Region
92(1)
pn Junction Capacitance
92(1)
Reverse Bias
92(1)
Forward Bias
93(1)
Schottky Barrier Diode
93(1)
Diode SPICE Model and Layout
94(2)
Diode Circuit Analysis
96(10)
Load-Line Analysis
96(2)
Analysis Using the Mathematical Model for the Diode
98(4)
The Ideal Diode Model
102(2)
Constant Voltage Drop Model
104(1)
Model Comparison and Discussion
105(1)
Multiple-Diode Circuits
106(3)
Analysis of Diodes Operating in the Breakdown Region
109(4)
Load-Line Analysis
109(1)
Analysis with the Piecewise Linear Model
109(1)
Voltage Regulation
110(1)
Analysis Including Zener Resistance
111(1)
Line and Load Regulation
112(1)
Half-Wave Rectifier Circuits
113(10)
Half-Wave Rectifier with Resistor Load
113(1)
Rectifier Filter Capacitor
114(1)
Half-Wave Rectifier with RC Load
115(1)
Ripple Voltage and Conduction Interval
116(2)
Diode Current
118(2)
Surge Current
120(1)
Peak-Inverse-Voltage (PIV) Rating
120(1)
Diode Power Dissipation
120(1)
Half-Wave Rectifier with Negative Output Voltage
121(2)
Full-Wave Rectifier Circuits
123(2)
Full-Wave Rectifier with Negative Output Voltage
124(1)
Full-Wave Bridge Rectification
125(1)
Rectifier Comparison and Design Tradeoffs
125(4)
Dynamic Switching Behavior of the Diode
129(1)
Photo Diodes, Solar Cells, and Light-Emitting Diodes
130(15)
Photo Diodes and Photodetectors
130(1)
Power Generation from Solar Cells
131(1)
Light-Emitting Diodes (LEDs)
132(1)
Summary
133(1)
Key Terms
134(1)
Reference
135(1)
Additional Reading
135(1)
Problems
135(10)
Field-Effect Transistors
145(72)
Characteristics of the MOS Capacitor
146(2)
Accumulation Region
147(1)
Depletion Region
148(1)
Inversion Region
148(1)
The NMOS Transistor
148(13)
Qualitative i-v Behavior of the NMOS Transistor
149(1)
Triode Region Characteristics of the NMOS Transistor
150(3)
On Resistance
153(1)
Saturation of the i-v Characteristics
154(1)
Mathematical Model in the Saturation (Pinch-Off) Region
155(2)
Transconductance
157(1)
Channel-Length Modulation
157(1)
Transfer Characteristics and Depletion-Mode MOSFETS
158(1)
Body Effect or Substrate Sensitivity
159(2)
PMOS Transistors
161(2)
MOSFET Circuit Symbols
163(2)
Capacitances in MOS Transistors
165(2)
NMOS Transistor Capacitances in the Triode Region
165(1)
Capacitances in the Saturation Region
166(1)
Capacitances in Cutoff
166(1)
MOSFET Modeling in SPICE
167(2)
MOS Transistor Scaling
169(3)
Drain Current
169(1)
Gate Capacitance
169(1)
Circuit and Power Densities
170(1)
Power-Delay Product
170(1)
Cutoff Frequency
171(1)
High Field Limitations
171(1)
Subthreshold Conduction
172(1)
MOS Transistor Fabrication and Layout Design Rules
172(4)
Minimum Feature Size and Alignment Tolerance
173(1)
MOS Transistor Layout
173(3)
Biasing the NMOS Field-Effect Transistor
176(12)
Why Do We Need Bias?
176(2)
Constant Gate-Source Voltage Bias
178(3)
Load Line Analysis for the Q-Point
181(1)
Four-Resistor Biasing
182(6)
Biasing the PMOS Field-Effect Transistor
188(2)
The Junction Field-Effect Transistor (JFET)
190(7)
The JFET with Bias Applied
191(1)
JFET Channel with Drain-Source Bias
191(2)
n-Channel JFET i-v Characteristics
193(2)
The p-Channel JFET
195(1)
Circuit Symbols and JFET Model Summary
195(1)
JFET Capacitances
196(1)
JFET Modeling in SPICE
197(1)
Biasing the JFET and Depletion-Mode MOSFET
198(19)
Summary
200(2)
Key Terms
202(1)
References
203(1)
Problems
204(13)
Bipolar Junction Transistors
217(68)
Physical Structure of the Bipolar Transistor
218(1)
The Transport Model for the npn Transistor
219(6)
Forward Characteristics
220(2)
Reverse Characteristics
222(1)
The Complete Transport Model Equations for Arbitrary Bias Conditions
223(2)
The pnp Transistor
225(2)
Equivalent Circuit Representations for the Transport Models
227(1)
The i-v Characteristics of the Bipolar Transistor
228(2)
Output Characteristics
228(1)
Transfer Characteristics
229(1)
The Operating Regions of the Bipolar Transistor
230(1)
Transport Model Simplifications
231(14)
Simplified Model for the Cutoff Region
231(2)
Model Simplifications for the Forward-Active Region
233(6)
Diodes in Bipolar Integrated Circuits
239(1)
Simplified Model for the Reverse-Active Region
240(2)
Modeling Operation in the Saturation Region
242(3)
Nonideal Behavior of the Bipolar Transistor
245(7)
Junction Breakdown Voltages
246(1)
Minority-Carrier Transport in the Base Region
246(1)
Base Transit Time
247(2)
Diffusion Capacitance
249(1)
Frequency Dependence of the Common-Emitter Current Gain
250(1)
The Early Effect and Early Voltage
250(1)
Modeling the Early Effect
251(1)
Origin of the Early Effect
251(1)
Transconductance
252(1)
Bipolar Technology and SPICE Model
253(3)
Qualitative Description
253(1)
SPICE Model Equations
254(1)
High-Performance Bipolar Transistors
255(1)
Practical Bias Circuits for the BJT
256(10)
Four-Resistor Bias Network
258(2)
Design Objectives for the Four-Resistor Bias Network
260(6)
Iterative Analysis of the Four-Resistor Bias Circuit
266(1)
Tolerances in Bias Circuits
266(19)
Worst-Case Analysis
267(2)
Monte Carlo Analysis
269(3)
Summary
272(2)
Key Terms
274(1)
References
274(1)
Problems
275(10)
PART TWO DIGITAL ELECTRONICS
285(242)
Introduction to Digital Electronics
287(80)
Ideal Logic Gates
289(1)
Logic Level Definitions and Noise Margins
289(4)
Logic Voltage Levels
291(1)
Noise Margins
291(1)
Logic Gate Design Goals
292(1)
Dynamic Response of Logic Gates
293(2)
Rise Time and Fall Time
293(1)
Propagation Delay
294(1)
Power-Delay Product
294(1)
Review of Boolean Algebra
295(2)
NMOS Logic Design
297(9)
NMOS Inverter with Resistive Load
298(1)
Design of the W/L Ratio of Ms
299(1)
Load Resistor Design
300(1)
Load-Line Visualization
300(2)
On-Resistance of the Switching Device
302(1)
Noise Margin Analysis
303(1)
Calculation of VIL and VOH
303(1)
Calculation of VIH and VOL
304(1)
Load Resistor Problems
305(1)
Transistor Alternatives to the Load Resistor
306(17)
The NMOS Saturated Load Inverter
307(8)
NMOS Inverter with a Linear Load Device
315(1)
NMOS Inverter with a Depletion-Mode Load
316(3)
Static Design of the Pseudo NMOS Inverter
319(4)
NMOS Inverter Summary and Comparison
323(1)
NMOS NAND and NOR Gates
324(4)
NOR Gates
325(1)
NAND Gates
326(1)
NOR and NAND Gate Layouts in NMOS Depletion-Mode Technology
327(1)
Complex NMOS Logic Design
328(5)
Power Dissipation
333(4)
Static Power Dissipation
333(1)
Dynamic Power Dissipation
334(1)
Power Scaling in MOS Logic Gates
335(2)
Dynamic Behavior of MOS Logic Gates
337(12)
Capacitances in Logic Circuits
337(1)
Dynamic Response of the NMOS Inverter with a Resistive Load
338(5)
Pseudo NMOS Inverter
343(1)
A Final Comparison of NMOS Inverter Delays
344(2)
Scaling Based Upon Reference Circuit Simulation
346(1)
Ring Oscillator Measurement of Intrinsic Gate Delay
346(1)
Unloaded Inverter Delay
347(2)
PMOS Logic
349(18)
PMOS Inverters
349(3)
NOR and NAND Gates
352(1)
Summary
352(2)
Key Terms
354(1)
References
355(1)
Additional Reading
355(1)
Problems
355(12)
Complementary MOS (CMOS) Logic Design
367(49)
CMOS Inverter Technology
368(2)
CMOS Inverter Layout
370(1)
Static Characteristics of the CMOS Inverter
370(5)
CMOS Voltage Transfer Characteristics
371(2)
Noise Margins for the CMOS Inverter
373(2)
Dynamic Behavior of the CMOS Inverter
375(5)
Propagation Delay Estimate
375(2)
Rise and Fall Times
377(1)
Performance Scaling
377(2)
Delay of Cascaded Inverters
379(1)
Power Dissipation and Power Delay Product in CMOS
380(4)
Static Power Dissipation
380(1)
Dynamic Power Dissipation
381(1)
Power-Delay Product
382(2)
CMOS NOR and NAND Gates
384(4)
CMOS Nor Gate
384(3)
CMOS NAND Gates
387(1)
Design of Complex Gates in CMOS
388(5)
Minimum Size Gate Design and Performance
393(2)
Dynamic Domino CMOS Logic
395(2)
Cascade Buffers
397(3)
Cascade Buffer Delay Model
397(1)
Optimum Number of Stages
398(2)
The CMOS Transmission Gate
400(1)
CMOS Latchup
401(15)
Summary
404(1)
Key Terms
405(1)
References
406(1)
Problems
406(10)
MOS Memory and Storage Circuits
416(44)
Random Access Memory
417(2)
Random Access Memory (RAM) Architecture
417(1)
A 256-Mb Memory Chip
418(1)
Static Memory Cells
419(9)
Memory Cell Isolation and Access---The 6-T Cell
422(1)
The Read Operation
422(4)
Writing Data into the 6-T Cell
426(2)
Dynamic Memory Cells
428(6)
The One-Transistor Cell
430(1)
Data Storage in the 1-T Cell
430(1)
Reading Data from the 1-T Cell
431(2)
The Four-Transistor Cell
433(1)
Sense Amplifiers
434(6)
A Sense Amplifier for the 6-T Cell
434(2)
A Sense Amplifier for the 1-T Cell
436(2)
The Boosted Wordline Circuit
438(1)
Clocked CMOS Sense Amplifiers
438(2)
Address Decoders
440(4)
NOR Decoder
440(1)
NAND Decoder
440(3)
Decoders in Domino CMOS Logic
443(1)
Pass-Transistor Column Decoder
443(1)
Read-Only Memory (ROM)
444(3)
Flip-Flop
447(13)
RS Flip-Flop
449(1)
The D-Latch Using Transmission Gates
450(1)
A Master-Slave D Flip-Flop
450(1)
Summary
451(1)
Key Terms
452(1)
References
452(1)
Problems
453(7)
Bipolar Logic Circuits
460(67)
The Current Switch (Emitter-Coupled Pair)
461(3)
Mathematical Model for Static Behavior of the Current Switch
462(1)
Current Switch Analysis for vI>VREF
463(1)
Current Switch Analysis for v1<VREF
464(1)
The Emitter-Coupled Logic (ECL) Gate
464(3)
ECL Gate with VI=VH
465(1)
ECL Gate with VI=VL
466(1)
Input Current of the ECL Gate
466(1)
ECL Summary
466(1)
Noise Margin Analysis for the ECL Gate
467(2)
VIL, VOH, VIH, and VOL
467(1)
Noise Margins
468(1)
Current Source Implementation
469(2)
The ECL OR-NOR Gate
471(2)
The Emitter Follower
473(3)
Emitter Follower with a Load Resistor
474(2)
``Emitter Dotting'' or ``Wired-OR'' Logic
476(1)
Parallel Connection of Emitter-Follower Outputs
477(1)
The Wired-OR Logic Function
477(1)
ECL Power-Delay Characteristics
477(4)
Power Dissipation
477(2)
Gate Delay
479(1)
Power-Delay Product
480(1)
Current Mode Logic
481(6)
CML Logic Gates
481(1)
CML Logic Levels
482(1)
VEE Supply Voltage
482(1)
Higher-Level CML
483(1)
CML Power Reduction
484(1)
NMOS CML
485(2)
The Saturating Bipolar Inverter
487(7)
Static Inverter Characteristics
488(1)
Saturation Voltage of the Bipolar Transistor
488(3)
Load-Line Visualization
491(1)
Switching Characteristics of the Saturated BJT
491(3)
A Transistor-Transistor Logic (TTL) Prototype
494(6)
TTL Inverter for VI = VL
494(1)
TTL Inverter for VI = VH
495(1)
Power in the Prototype TTL Gate
496(1)
VIH, VIL, and Noise Margins for the TTL Prototype
496(2)
Prototype Inverter Summary
498(1)
Fanout Limitations of the TTL Prototype
498(2)
The Standard 7400 Series TTL Inverter
500(4)
Analysis for VI = VL
500(1)
Analysis for VI = VH
501(2)
Power Consumption
503(1)
TTL Propagation Delay and Power-Delay Product
503(1)
TTL Voltage Transfer Characteristic and Noise Margins
503(1)
Fanout Limitations of Standard TTL
504(1)
Logic Functions in TTL
504(2)
Multi-Emitter Input Transistors
505(1)
TTL NAND Gates
505(1)
Input Clamping Diodes
506(1)
Schottky-Clamped TTL
506(2)
Comparison of the Power-Delay Products of ECL and TTL
508(1)
BiCMOS Logic
508(19)
BiCMOS Buffers
509(2)
BiNMOS Inverters
511(2)
BiCMOS Logic Gates
513(1)
Summary
513(2)
Key Terms
515(1)
References
515(1)
Additional Reading
515(1)
Problems
516(11)
PART THREE ANALOG ELECTRONICS
527(786)
Analog Systems and Ideal Operational Amplifiers
529(71)
An Example of an Analog Electronic System
530(1)
Amplification
531(6)
Voltage Gain
532(1)
Current Gain
533(1)
Power Gain
533(1)
The Decibel Scale
534(3)
Two-Port Models for Amplifiers
537(4)
The g-parameters
537(4)
Mismatched Source and Load Resistances
541(3)
Introduction to Operational Amplifiers
544(4)
The Differential Amplifier
544(1)
Differential Amplifier Voltage Transfer Characteristic
545(1)
Voltage Gain
545(3)
Distortion in Amplifiers
548(1)
Differential Amplifier Model
549(2)
Ideal Differential and Operational Amplifiers
551(1)
Assumptions for Ideal Operational Amplifier Analysis
551(1)
Analysis of Circuits Containing Ideal Operational Amplifiers
552(16)
The Inverting Amplifier
553(3)
The Transresistance Amplifier---A Current-to-Voltage Converter
556(2)
The Noninverting Amplifier
558(3)
The Unity-Gain Buffer, or Voltage Follower
561(2)
The Summing Amplifier
563(2)
The Difference Amplifier
565(3)
Frequency-Dependent Feedback
568(32)
Bode Plots
568(1)
The Low-Pass Amplifier
568(4)
The High-Pass Amplifier
572(3)
Band-Pass Amplifier
575(3)
An Active Low-Pass Filter
578(3)
An Active High-Pass Filter
581(1)
The Integrator
582(4)
The Differentiator
586(1)
Summary
586(2)
Key Terms
588(1)
References
588(1)
Additional Reading
589(1)
Problems
589(11)
Nonideal Operational Amplifiers and Feedback Amplifier Stability
600(97)
Classic Feedback Systems
601(2)
Closed-Loop Gain Analysis
602(1)
Gain Error
602(1)
Analysis of Circuits Containing Nonideal Operational Amplifiers
603(12)
Finite Open-Loop Gain
603(3)
Nonzero Output Resistance
606(4)
Finite Input Resistance
610(4)
Summary of Nonideal Inverting and Noninverting Amplifiers
614(1)
Series and Shunt Feedback Circuits
615(1)
Feedback Amplifier Categories
615(1)
Voltage Amplifiers---Series-Shunt Feedback
616(1)
Transimpedance Amplifiers---Shunt-Shunt Feedback
616(1)
Current Amplifiers---Shunt-Series Feedback
616(1)
Transconductance Amplifiers---Series-Series Feedback
616(1)
Unified Approach to Feedback Amplifier Gain Calculation
616(1)
Closed-Loop Gain Analysis
617(1)
Resistance Calculation Using Blackman'S Theorem
617(1)
Series-Shunt Feedback-Voltage Amplifiers
617(7)
Closed-Loop Gain Calculation
618(1)
Input Resistance Calculation
618(1)
Output Resistance Calculation
619(1)
Series-Shunt Feedback Amplifier Summary
620(4)
Shunt-Shunt Feedback-Transresistance Amplifiers
624(5)
Closed-Loop Gain Calculation
625(1)
Input Resistance Calculation
625(1)
Output Resistance Calculation
625(1)
Shunt-Shunt Feedback Amplifier Summary
626(3)
Series-Series Feedback---Transconductance Amplifiers
629(4)
Closed-Loop Gain Calculation
630(1)
Input Resistance Calculation
630(1)
Output Resistance Calculation
631(1)
Series-Series Feedback Amplifier Summary
631(2)
Shunt-Series Feedback---Current Amplifiers
633(5)
Closed-Loop Gain Calculation
634(1)
Input Resistance Calculation
635(1)
Output Resistance Calculation
635(1)
Series-Series Feedback Amplifier Summary
635(3)
Finding the Loop Gain Using Successive Voltage and Current Injection
638(3)
Simplifications
641(1)
Distortion Reduction Through the Use of Feedback
641(1)
DC Error Sources and Output Range Limitations
642(8)
Input-Offset Voltage
643(1)
Offset-Voltage Adjustment
644(1)
Input-Bias and Offset Currents
645(2)
Output Voltage and Current Limits
647(3)
Common-Mode Rejection and Input Resistance
650(9)
Finite Common-Mode Rejection Ratio
650(1)
Why is CMRR Important?
651(3)
Voltage-Follower Gain Error Due to CMRR
654(2)
Common-Mode Input Resistance
656(1)
An Alternate Interpretation of CMRR
657(1)
Power Supply Rejection Ratio
657(2)
Frequency Response and Bandwidth of Operational Amplifiers
659(12)
Frequency Response of the Noninverting Amplifier
661(3)
Inverting Amplifier Frequency Response
664(2)
Using Feedback to Control Frequency Response
666(2)
Large-Signal Limitations---Slew Rate and Full-Power Bandwidth
668(1)
Macro Model for Operational Amplifier Frequency Response
669(1)
Complete Op Amp Macro Models in SPICE
670(1)
Examples of Commercial General-Purpose Operational Amplifiers
670(1)
Stability of Feedback Amplifiers
671(26)
The Nyquist Plot
671(1)
First-Order Systems
672(1)
Second-Order Systems and Phase Margin
673(1)
Step Response and Phase Margin
674(3)
Third-Order Systems and Gain Margin
677(1)
Determining Stability from the Bode Plot
678(4)
Summary
682(2)
Key Terms
684(1)
References
684(1)
Problems
685(12)
Operational Amplifier Applications
697(89)
Cascaded Amplifiers
698(13)
Two-Port Representations
698(2)
Amplifier Terminology Review
700(3)
Frequency Response of Cascaded Amplifiers
703(8)
The Instrumentation Amplifier
711(3)
Active Filters
714(14)
Low-Pass Filter
714(4)
A High-Pass Filter with Gain
718(2)
Band-Pass Filter
720(2)
The Tow-Thomas Biquad
722(4)
Sensitivity
726(1)
Magnitude and Frequency Scaling
727(1)
Switched-Capacitor Circuits
728(5)
A Switched-Capacitor Integrator
728(2)
Noninverting SC Integrator
730(2)
Switched-Capacitor Filters
732(1)
Digital-to-Analog Conversion
733(7)
D/A Converter Fundamentals
733(1)
D/A Converter Errors
734(3)
Digital-to-Analog Converter Circuits
737(3)
Analog-to-Digital Conversion
740(14)
A/D Converter Fundamentals
741(1)
Analog-to-Digital Converter Errors
742(1)
Basic A/D Conversion Techniques
743(11)
Oscillators
754(6)
The Barkhausen Criteria for Oscillation
754(1)
Oscillators Employing Frequency-Selective RC Networks
755(5)
Nonlinear Circuit Applications
760(3)
A Precision Half-Wave Rectifier
760(1)
Nonsaturating Precision-Rectifier Circuit
761(2)
Circuits Using Positive Feedback
763(23)
The Comparator and Schmitt Trigger
763(2)
The Astable Multivibrator
765(1)
The Monostable Multivibrator or One Shot
766(4)
Summary
770(2)
Key Terms
772(1)
Additional Reading
773(1)
Problems
773(13)
Small-Signal Modeling and Linear Amplification
786(71)
The Transistor as an Amplifier
787(3)
The BJT Amplifier
788(1)
The MOSFET Amplifier
789(1)
Coupling and Bypass Capacitors
790(2)
Circuit Analysis Using dc and ac Equivalent Circuits
792(4)
Menu for dc and ac Analysis
792(4)
Introduction to Small-Signal Modeling
796(3)
Graphical Interpretation of the Small-Signal Behavior of the Diode
796(1)
Small-Signal Modeling of the Diode
797(2)
Small-Signal Models for Bipolar Junction Transistors
799(9)
The Hybrid-Pi Model
801(1)
Graphical Interpretation of the Transconductance
802(1)
Small-Signal Current Gain
802(1)
The Intrinsic Voltage Gain of the BJT
803(1)
Equivalent Forms of the Small-Signal Model
804(1)
Simplified Hybrid Pi Model
805(1)
Definition of a Small Signal for the Bipolar Transistor
805(2)
Small-Signal Model for the pnp Transistor
807(1)
ac Analysis Versus Transient Analysis in SPICE
807(1)
The Common-Emitter (C-E) Amplifier
808(2)
Terminal Voltage Gain
809(1)
Input Resistance
809(1)
Signal Source Voltage Gain
810(1)
Important Limits and Model Simplifications
810(5)
A Design Guide for the Common-Emitter Amplifier
810(2)
Upper Bound on the Common-Emitter Gain
812(1)
Small-Signal Limit for the Common-emitter Amplifier
812(3)
Small-Signal Models for Field-Effect Transistors
815(6)
Small-Signal Model for the MOSFET
815(2)
Intrinsic Voltage Gain of the MOSFET
817(1)
Definition of Small-Signal Operation for the MOSFET
817(1)
Body Effect in the Four-Terminal MOSFET
818(1)
Small-Signal Model for the PMOS Transistor
819(1)
Small-Signal Model for the Junction Field-Effect Transistor
820(1)
Summary and Comparison of the Small-Signal Models of the BJT and FET
821(3)
The Common-Source Amplifier
824(14)
Common-Source Terminal Voltage Gain
825(1)
Signal-Source Voltage Gain for the Common-Source Amplifier
825(1)
A Design Guide for the Common-Source Amplifier
826(1)
Small-Signal Limit for the Common-Source Amplifier
827(2)
Input Resistances of the Common-Emitter and Common-Source Amplifiers
829(3)
Common-Emitter and Common-Source Output Resistances
832(6)
Comparison of the Three Amplifier Resistances
838(1)
Common-Emitter and Common-Source Amplifier Summary
838(1)
Guidelines for Neglecting the Transistor Output Resistance
839(1)
Amplifier Power and Signal Range
839(18)
Power Dissipation
839(1)
Signal Range
840(3)
Summary
843(1)
Key Terms
844(1)
Problems
845(12)
Single-Transistor Amplifiers
857(111)
Amplifier Classification
858(6)
Signal Injection and Extraction---The BJT
858(1)
Signal Injection and Extraction---The FET
859(1)
Common-Emitter (C-E) and Common-Source (C-S) Amplifiers
860(1)
Common-Collector (C-C) and Common-Drain (C-D) Topologies
861(2)
Common-Base (C-B) and Common-Gate (C-G) Amplifiers
863(1)
Small-Signal Model Review
864(1)
Inverting Amplifiers---Common-Emitter and Common-Source Circuits
864(22)
The Common-Emitter (C-E) Amplifier
864(13)
Common-Emitter Example Comparison
877(1)
The Common-Source Amplifier
877(3)
Small-Signal Limit for the Common-Source Amplifier
880(4)
Common-Emitter and Common-Source Amplifier Characteristics
884(1)
C-E/C-S Amplifier Summary
885(1)
Equivalent Transistor Representation of the Generalized C-E/C-S Transistor
885(1)
Follower Circuits---Common-Collector and Common-Drain Amplifiers
886(8)
Terminal Voltage Gain
886(1)
Input Resistance
887(1)
Signal Source Voltage Gain
888(1)
Follower Signal Range
888(1)
Follower Output Resistance
889(1)
Current Gain
890(1)
C-C/C-D Amplifier Summary
890(4)
Noninverting Amplifiers---Common-Base and Common-Gate Circuites
894(9)
Terminal Voltage Gain and Input Resistance
895(1)
Signal Source Voltage Gain
896(1)
Input Signal Range
897(1)
Resistance at the Collector and Drain Terminals
897(1)
Current Gain
898(1)
Overall Input and Output Resistances for the Noninverting Amplifiers
899(3)
C-B/C-G Amplifier Summary
902(1)
Amplifier Prototype Review and Comparison
903(4)
The BJT Amplifiers
903(2)
The FET Amplifiers
905(2)
Common-Source Amplifiers Using MOS Inverters
907(7)
Voltage Gain Estimate
908(1)
Detailed Analysis
909(1)
Alternative Loads
910(1)
Input and Output Resistances
911(3)
Coupling and Bypass Capacitor Design
914(11)
Common-Emitter and Common-Source Amplifiers
914(5)
Common-Collector and Common-Drain Amplifiers
919(2)
Common-Base and Common-Gate Amplifiers
921(3)
Setting Lower Cutoff Frequency fL
924(1)
Amplifier Design Examples
925(14)
Monte Carlo Evaluation of the Common-Base Amplifier Design
934(5)
Multistage ac-Coupled Amplifiers
939(6)
A Three-Stage ac-Coupled Amplifier
939(2)
Voltage Gain
941(2)
Input Resistance
943(1)
Signal Source Voltage Gain
943(1)
Output Resistance
943(1)
Current and Power Gain
944(1)
Input Signal Range
945(3)
Estimating the Lower Cutoff Frequency of the Multistage Amplifier
948(20)
Summary
950(1)
Key Terms
951(1)
Additional Reading
952(1)
Problems
952(16)
Differential Amplifiers And Operational Amplifier Design
968(78)
Differential Amplifiers
969(22)
Bipolar and MOS Differential Amplifiers
969(1)
dc Analysis of the Bipolar Differential Amplifier
970(2)
Transfer Characteristic for the Bipolar Differential Amplifier
972(1)
ac Analysis of the Bipolar Differential Amplifier
973(1)
Differential-Mode Gain and Input and Output Resistance
974(2)
Common-Mode Gain and Input Resistance
976(2)
Common-Mode Rejection Ratio (CMRR)
978(1)
Analysis Using Differential-and Common-Mode Half-Circuits
979(3)
Biasing with Electronic Current Souces
982(1)
Modeling the Electronic Current Source in SPICE
983(1)
dc Analysis of the MOSFET Differential Amplifier
983(2)
Differential-Mode Input Signals
985(1)
Small-Signal Transfer Characteristic for the MOS Differential Amplifier
986(1)
Common-Mode Input Signals
986(1)
Two-Port Model for Differential Pairs
987(4)
Evolution to Basic Operational Amplifiers
991(15)
A Two-Stage Prototype for an Operational Amplifier
992(5)
Improving the Op Amp Voltage Gain
997(1)
Output Resistance Reduction
998(4)
A CMOS Operational Amplifier Prototype
1002(2)
BiCMOS Amplifiers
1004(1)
All Transistor Implementations
1004(2)
Output Stages
1006(10)
The Source Follower---A Class-A Output Stage
1006(1)
Efficiency of Class-A Amplifiers
1007(1)
Class-B Push-Pull Output Stage
1008(2)
Class-AB Amplifiers
1010(1)
Class-AB Output Stages for Operational Amplifiers
1011(1)
Short-Circuit Protection
1011(2)
Transformer Coupling
1013(3)
Electronic Current Sources
1016(30)
Single-Transistor Current Sources
1017(1)
Figure of Merit for Current Sources
1017(1)
Higher Output Resistance Sources
1018(1)
Current Source Design Examples
1018(9)
Summary
1027(1)
Key Terms
1028(1)
References
1029(1)
Additional Reading
1029(1)
Problems
1029(17)
Analog Integrated Circuit Design Techniques
1046(82)
Circuit Element Matching
1047(2)
Current Mirrors
1049(14)
dc Analysis of the MOS Transistor Current Mirror
1049(2)
Changing the MOS Mirror Ratio
1051(1)
dc Analysis of the Bipolar Transistor Current Mirror
1052(2)
Altering the BJT Current Mirror Ratio
1054(1)
Multiple Current Sources
1055(1)
Buffered Current Mirror
1056(1)
Output Resistance of the Current Mirrors
1057(1)
Two-Port Model for the Current Mirror
1058(2)
The Widlar Current Source
1060(3)
The MOS Version of the Widlar Source
1063(1)
High-Output-Resistance Current Mirrors
1063(9)
The Wilson Current Sources
1064(1)
Output Resistance of the Wilson Source
1065(1)
Cascode Current Sources
1066(1)
Output Resistance of the Cascode Sources
1067(1)
Regulated Cascode Current Source
1068(1)
Current Mirror Summary
1069(3)
Reference Current Generation
1072(1)
Supply-Independent Biasing
1073(4)
A VBE-Based Reference
1073(1)
The Wildlar Source
1073(1)
Power-Supply-Independent Bias Cell
1074(1)
A Supply-Independent MOS Reference Cell
1075(2)
The Bandgap Reference
1077(4)
The Current Mirror As an Active Load
1081(11)
CMOS Differential Amplifier with Active Load
1081(7)
Bipolar Differential Amplifier with Active Load
1088(4)
Active Loads in Operational Amplifiers
1092(5)
CMOS Op Amp Voltage Gain
1092(1)
dc Design Considerations
1093(2)
Bipolar Operational Amplifiers
1095(1)
Input Stage Breakdown
1096(1)
The μA741 Operational Amplifier
1097(13)
Overall Circuit Operation
1097(1)
Bias Circuitry
1098(1)
dc Analysis of the 741 Input Stage
1099(3)
ac Analysis of the 741 Input Stage
1102(1)
Voltage Gain of the Complete Amplifier
1103(4)
The 741 Output Stage
1107(2)
Output Resistance
1109(1)
Short Circuit Protection
1109(1)
Summary of the μA741 Operational Amplifier Characteristics
1109(1)
The Gilbert Analog Multiplier
1110(18)
Summary
1112(1)
Key Terms
1113(1)
References
1114(1)
Problems
1114(14)
Amplifier Frequency Response
1128(100)
Amplifier Frequency Response
1129(5)
Low-Frequency Response
1130(1)
Estimating wL in the Absence of a Dominant Pole
1130(3)
High-Frequency Response
1133(1)
Estimating wH in the Absence of a Dominant Pole
1133(1)
Direct Determination of the Low-Frequency Poles and Zeros---The Common-Source Amplifier
1134(5)
Estimation of wL Using the Short-Circuit Time-Constant Method
1139(9)
Estimate of wL for the Common-Emitter Amplifier
1140(4)
Estimate of wL for the Common-Source Amplifier
1144(1)
Estimate of wL for the Common-Base Amplifier
1145(1)
Estimate of wL for the Common-Gate Amplifier
1146(1)
Estimate of wL for the Common-Collector Amplifier
1147(1)
Estimate of wL for the Common-Drain Amplifier
1147(1)
Transistor Models at High Frequencies
1148(7)
Frequency-Dependent Hybrid-Pi Model for the Bipolar Transistor
1148(1)
Modeling Cπ and Cμ in SPICE
1149(1)
Unity-Gain Frequency fT
1149(3)
High-Frequency Model for the FET
1152(1)
Modeling CGS and CGD in SPICE
1153(1)
Channel Length Dependence of fT
1153(2)
Limitations of the High-Frequency Models
1155(1)
Base Resistance in the Hybrid-Pi Model
1155(3)
Effect of Base Resistance on Midband Amplifiers
1156(2)
High-Frequency Common-Emitter and Common-Source Amplifier Analysis
1158(16)
The Miller Effect
1159(1)
Common-Emitter and Common-Source Amplifier High-Frequency Response
1160(2)
Direct Analysis of the Common-Emitter Transfer Characteristic
1162(1)
Poles of the Common-Emitter Amplifier
1163(3)
Dominant Pole for the Common-Source Amplifier
1166(1)
Estimation of wH Using the Open-Circuit Time-Constant Method
1167(3)
Common-Source Amplifier with Source Degeneration Resistance
1170(2)
Poles of the Common-Emitter with Emitter Degeneration Resistance
1172(2)
Common-Base and Common-Gate Amplifier High-Frequency Response
1174(3)
Common-Collector and Common-Drain Amplifier High-Frequency Response
1177(2)
Single-Stage Amplifier High-Frequency Response Summary
1179(2)
Amplifier Gain-Bandwidth Limitations
1180(1)
Frequency Response of Multistage Amplifiers
1181(12)
Differential Amplifier
1181(1)
The Common-Collector/Common-Base Cascade
1182(2)
High-Frequency Response of the Cascode Amplifier
1184(1)
Cutoff Frequency for the Current Mirror
1185(2)
Three-Stage Amplifier Example
1187(6)
Introduction to Radio Frequency Circuits
1193(12)
Radio Frequency Amplifiers
1194(1)
The Shunt-Peaked Amplifier
1194(3)
Single-Tuned Amplifier
1197(2)
Use of a Tapped Inductor---The Auto Transformer
1199(2)
Multiple Tuned Circuits---Synchronous and Stagger Tuning
1201(1)
Common-Source Amplifier with Inductive Degeneration
1202(3)
Mixers and Balanced Modulators
1205(23)
Introduction to Mixer Operation
1205(1)
A Single-Balanced Mixer
1206(1)
The Differential Pair as a Single-Balanced Mixer
1207(1)
A Double-Balanced Mixer
1208(2)
The Gilbert Multiplier as a Double-Balanced Mixer/Modulator
1210(3)
Summary
1213(2)
Key Terms
1215(1)
Reference
1215(1)
Problems
1215(13)
Transistor Feedback Amplifier And Oscillators
1228(85)
Basic Feedback System Review
1229(3)
Closed-Loop Gain
1229(1)
Closed-Loop Impedances
1230(1)
Feedback Effects
1230(2)
Feedback Amplifier Analysis at Midband
1232(2)
Feedback Amplifier Circuit Examples
1234(20)
Series-Shunt Feedback---Voltage Amplifiers
1234(5)
Differential Input Series-Shunt Voltage Amplifier
1239(3)
Shunt-Shunt Feedback---Transresistance Amplifiers
1242(6)
Series-Series Feedback---Transconductance Amplifiers
1248(3)
Shunt-Series Feedback---Current Amplifiers
1251(3)
Review of Feedback Amplifier Stability
1254(8)
Closed-Loop Response of the Uncompensated Amplifier
1254(2)
Phase Margin
1256(3)
Higher-Order Effects
1259(1)
Response of the Compensated Amplifier
1260(2)
Small-Signal Limitations
1262(1)
Single-Pole Operational Amplifier Compensation
1262(15)
Three-Stage Op Amp Analysis
1263(2)
Transmission Zeros in FET Op Amps
1265(1)
Bipolar Amplifier Compensation
1266(1)
Slew Rate of the Operational Amplifier
1266(2)
Relationships Between Slew Rate and Gain-Bandwidth Product
1268(9)
High-Frequency Oscillators
1277(4)
The Colpitts Oscillator
1278(1)
The Hartley Oscillator
1279(1)
Amplitude Stabilization in LC Oscillators
1280(1)
Negative Resistance in Oscillators
1280(1)
Negative GM Oscillator
1281(2)
Crystal Oscillators
1283(17)
Summary
1287(2)
Key Terms
1289(1)
References
1289(1)
Problems
1289(11)
Appendixes
Standard Discrete Component Values
1300(3)
Solid-State Device Models and SPICE Simulation Parameters
1303(7)
Two-Port Review
1310(3)
Index 1313
Richard Jaeger earned his bachelor's, master's, and doctoral degrees in electrical engineering from the University of Florida. Professor Jaeger was one of the first three faculty members appointed Distinguished University Professor by Auburn University. His teaching awards include the Birdsong Merit Teaching Award and selection by ECE undergraduate students as Outstanding Electrical Engineering Faculty Member. In 1995 he was named Distinguished Graduate Faculty Lecturer. His current research interests include solid-state circuits and devices, electronic packaging, piezoresistive stress sensors, high heat flux cooling, low temperature electronics, VLSI design, and noise in electronic devices and circuits.





Travis Blalock is an Associate Professor in the Department of Electrical and Computer Engineering at University of Virginia.