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Microelectronic Circuits 8th ed. [köitmata]

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Microelectronic Circuits 8th ed.Suurem pilt
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Püsilink: https://www.kriso.ee/db/9780190853549.html
Microelectronic Circuits by Sedra and Smith has served generations of electrical and computer engineering students as the best and most widely-used text for this required course. Respected equally as a textbook and reference, "Sedra/Smith" combines a thorough presentation of fundamentals with an introduction to present-day IC technology. It remains the best text for helping students progress from circuit analysis to circuit design, developing design skills and insights that are essential to successful practice in the field. Significantly revised with the input of two new coauthors, slimmed down, and updated with the latest innovations, Microelectronic Circuits, Eighth Edition, remains the gold standard in providing the most comprehensive, flexible, accurate, and design-oriented treatment of electronic circuits available today.
Tables
xiv
Historical Notes xv
Preface xvii
PART I DEVICES AND BASIC CIRCUITS
2(498)
1 Signals and Amplifiers
4(54)
Introduction
5(1)
1.1 Signals
6(4)
1.2 Frequency Spectrum of Signals
10(3)
1.3 Analog and Digital Signals
13(3)
1.4 Amplifiers
16(7)
1.4.1 Signal Amplification
16(1)
1.4.2 Amplifier Circuit Symbol
17(1)
1.4.3 Voltage Gain
17(1)
1.4.4 Power Gain and Current Gain
18(1)
1.4.5 Expressing Gain in Decibels
18(1)
1.4.6 The Amplifier Power Supplies
19(2)
1.4.7 Amplifier Saturation
21(1)
1.4.8 Symbol Convention
21(2)
1.5 Circuit Models for Amplifiers
23(10)
1.5.1 Voltage Amplifiers
24(2)
1.5.2 Cascaded Amplifiers
26(2)
1.5.3 Other Amplifier Types
28(1)
1.5.4 Relationships between the Four Amplifier Models
28(2)
1.5.5 Determining R. and Rg
30(1)
1.5.6 Unilateral Models
30(3)
1.6 Frequency Response of Amplifiers
33(25)
1.6.1 Measuring the Amplifier Frequency Response
33(1)
1.6.2 Amplifier Bandwidth
34(1)
1.6.3 Evaluating the Frequency Response of Amplifiers
35(1)
1.6.4 Single-Time-Constant Networks
36(6)
1.6.5 Classification of Amplifiers Based on Frequency Response
42(3)
Summary
45(1)
Problems
46(12)
2 Operational Amplifiers
58(78)
Introduction
59(1)
2.1 The Ideal Op Amp
59(5)
2.1.1 The Op-Amp Terminals
59(1)
2.1.2 Function and Characteristics of the Ideal Op Amp
60(2)
2.1.3 Differential and Common-Mode Signals
62(2)
2.2 The Inverting Configuration
64(10)
2.2.1 The Closed-Loop Gain
64(2)
2.2.2 Effect of Finite Open-Loop Gain
66(2)
2.2.3 Input and Output Resistances
68(4)
2.2.4 An Important Application: The Weighted Summer
72(2)
2.3 The Noninverting Configuration
74(4)
2.3.1 The Closed-Loop Gain
74(2)
2.3.2 Effect of Finite Open-Loop Gain
76(1)
2.3.3 Input and Output Resistance
76(1)
2.3.4 The Voltage Follower
76(2)
2.4 Difference Amplifiers
78(9)
2.4.1 A Single-Op-Amp Difference Amplifier
79(4)
2.4.2 A Superior Circuit: The Instrumentation Amplifier
83(4)
2.5 Integrators and Differentiators
87(10)
2.5.1 The Inverting Configuration with General Impedances
88(2)
2.5.2 The Inverting Integrator
90(5)
2.5.3 The Op-Amp Differentiator
95(2)
2.6 DC Imperfections
97(9)
2.6.1 Offset Voltage
97(4)
2.6.2 Input Bias and Offset Currents
101(3)
2.6.3 Effect of Vos and Ios on the Operation of the Inverting Integrator
104(2)
2.7 Effect of Finite Open-Loop Gain and Bandwidth on Circuit Performance
106(5)
2.7.1 Frequency Dependence of the Open-Loop Gain
106(2)
2.7.2 Frequency Response of Closed-Loop Amplifiers
108(3)
2.8 Large-Signal Operation of Op Amps
111(25)
2.8.1 Output Voltage Saturation
111(1)
2.8.2 Output Current Limits
112(1)
2.8.3 Slew Rate
113(4)
Summary
117(1)
Problems
118(18)
3 Semiconductors
136(38)
Introduction
137(1)
3.1 Intrinsic Semiconductors
137(4)
3.2 Doped Semiconductors
141(3)
3.3 Current Flow in Semiconductors
144(6)
3.3.1 Drift Current
144(3)
3.3.2 Diffusion Current
147(3)
3.3.3 Relationship between D and μ
150(1)
3.4 The pn Junction
150(7)
3.4.1 Physical Structure
150(1)
3.4.2 Operation with Open-Circuit Terminals
151(6)
3.5 The pn Junction with an Applied Voltage
157(8)
3.5.1 Qualitative Description of Junction Operation
157(2)
3.5.2 The Current-Voltage Relationship of the Junction
159(5)
3.5.3 Reverse Breakdown
164(1)
3.6 Capacitive Effects in the pn Junction
165(9)
3.6.1 Depletion or Junction Capacitance
166(1)
3.6.2 Diffusion Capacitance
167(2)
Summary
169(1)
Problems
170(4)
4 Diodes
174(70)
Introduction
175(1)
4.1 The Ideal Diode
175(9)
4.1.1 Current-Voltage Characteristic
175(2)
4.1.2 The Rectifier
177(3)
4.1.3 Limiting and Protection Circuits
180(4)
4.2 Terminal Characteristics of Junction Diodes
184(7)
4.2.1 The Forward-Bias Region
184(5)
4.2.2 The Reverse-Bias Region
189(1)
4.2.3 The Breakdown Region
190(1)
4.3 Modeling the Diode
191(7)
4.3.1 The Exponential Model
191(1)
4.3.2 Graphical Analysis Using the Exponential Model
191(1)
4.3.3 Iterative Analysis Using the Exponential Model
192(1)
4.3.4 The Need for Rapid Analysis
193(1)
4.3.5 The Constant-Voltage-Drop Model
193(2)
4.3.6 The Ideal-Diode Model
195(1)
4.3.7 Operation in the Reverse Breakdown Region
196(2)
4.4 The Small-Signal Model
198(5)
4.5 Voltage Regulation
203(5)
4.6 Rectifier Circuits
208(14)
4.6.1 The Half-Wave Rectifier
209(1)
4.6.2 The Full-Wave Rectifier
210(2)
4.6.3 The Bridge Rectifier
212(2)
4.6.4 The Rectifier with a Filter Capacitor---The Peak Rectifier
214(7)
4.6.5 Precision Half-Wave Rectifier---The Superdiode
221(1)
4.7 Other Diode Applications
222(22)
4.7.1 The Clamped Capacitor and Bootstrapping
223(1)
4.7.2 The Voltage Doubler
224(1)
4.7.3 Varactors
225(1)
4.7.4 Photodiodes
225(2)
4.7.5 Light-Emitting Diodes (LEDs)
227(2)
Summary
229(1)
Problems
230(14)
5 MOS Field-Effect Transistors (MOSFETs)
244(60)
Introduction
245(1)
5.1 Device Structure and Physical Operation
246(15)
5.1.1 Device Structure
246(2)
5.1.2 Operation with Zero Gate Voltage
248(1)
5.1.3 Creating a Channel for Current Flow
248(2)
5.1.4 Applying a Small vDS
250(3)
5.1.5 Operation as vDS Is Increased
253(1)
5.1.6 Operation for vDS ≤ v0v: Channel Pinch-Off and Current Saturation
254(4)
5.1.7 The p-Channel MOSFET
258(2)
5.1.8 Complementary MOS or CMOS
260(1)
5.2 Current-Voltage Characteristics
261(12)
5.2.1 Circuit Symbol
261(1)
5.2.2 The iD---vDS Characteristics
262(1)
5.2.3 The iD---vGS Characteristic
263(4)
5.2.4 Finite Output Resistance in Saturation
267(3)
5.2.5 Characteristics of the p-Channel MOSFET
270(3)
5.3 MOSFET Circuits at DC
273(12)
5.4 Technology Scaling (Moore's Law) and Other Topics
285(19)
5.4.1 Technology Scaling
285(3)
5.4.2 Subthreshold Conduction and Leakage Currents
288(1)
5.4.3 The Role of the Substrate---The Body Effect
289(1)
5.4.4 Temperature Effects
290(1)
5.4.5 Breakdown and Input Protection
290(1)
5.4.6 The Depletion-Type MOSFET
291(1)
Summary
292(1)
Problems
293(11)
6 Bipolar Junction Transistors (BJTs)
304(61)
Introduction
305(1)
6.1 Device Structure and Physical Operation
305(14)
6.1.1 Simplified Structure and Modes of Operation
305(2)
6.1.2 Operation of the npn Transistor in the Active Mode
307(8)
6.1.3 Structure of Actual Transistors
315(1)
6.1.4 Operation in the Saturation Mode
315(2)
6.1.5 The pnp Transistor
317(2)
6.2 Current-Voltage Characteristics
319(13)
6.2.1 Circuit Symbols and Conventions
319(6)
6.2.2 Graphical Representation of Transistor Characteristics
325(1)
6.2.3 Dependence of ic on the Collector Voltage---The Early Effect
326(2)
6.2.4 An Alternative Form of the Common-Emitter Characteristics
328(4)
6.3 BJT Circuits at DC
332(19)
6.4 Transistor Breakdown and Temperature Effects
351(14)
6.4.1 Transistor Breakdown
352(1)
6.4.2 Dependence of on Ic and Temperature
353(1)
Summary
354(1)
Problems
355(10)
7 Transistor Amplifiers
365(135)
Introduction
366(1)
7.1 Basic Principles
366(14)
7.1.1 The Basis for Amplifier Operation
366(1)
7.1.2 Obtaining a Voltage Amplifier
367(2)
7.1.3 The Voltage-Transfer Characteristic (VTC)
369(1)
7.1.4 Obtaining Linear Amplification by Biasing the Transistor
370(2)
7.1.5 The Small-Signal Voltage Gain
372(6)
7.1.6 Determining the VTC by Graphical Analysis
378(2)
7.1.7 Deciding on a Location for the Bias Point Q
380(1)
7.2 Small-Signal Operation and Models
380(38)
7.2.1 The MOSFET Case
381(16)
7.2.2 The BJT Case
397(21)
7.2.3 Summary Tables
418(1)
7.3 Basic Configurations
418(30)
7.3.1 The Three Basic Configurations
418(1)
7.3.2 Characterizing Amplifiers
419(3)
7.3.3 The Common-Source (CS) and Common-Emitter (CE) Amplifiers
422(5)
7.3.4 The Common-Source (Common-Emitter) Amplifier with a Source (Emitter) Resistance
427(7)
7.3.5 The Common-Gate (CG) and the Common-Base (CB) Amplifiers
434(3)
7.3.6 The Source and Emitter Followers
437(10)
7.3.7 Summary Tables and Comparisons
447(1)
7.3.8 When and How to Include the Output Resistance ra
447(1)
7.4 Biasing
448(13)
7.4.1 The MOSFET Case
449(6)
7.4.2 The BJT Case
455(6)
7.5 Discrete-Circuit Amplifiers
461(39)
7.5.1 A Common-Source (CS) Amplifier
461(3)
7.5.2 A Common-Emitter Amplifier
464(2)
7.5.3 A Common-Emitter Amplifier with an Emitter Resistance Re
466(3)
7.5.4 A Common-Base (CB) Amplifier
469(1)
7.5.5 An Emitter Follower
469(3)
7.5.6 The Amplifier Frequency Response
472(1)
Summary
473(1)
Problems
474(26)
PART II ANALOG INTEGRATED CIRCUITS
500(608)
8 Building Blocks of Integrated-Circuit Amplifiers
500(75)
Introduction
501(1)
8.1 IC Design Philosophy
501(2)
8.2 IC Biasing: Current Sources and Current Mirrors
503(15)
8.2.1 The Basic MOSFET Current Source
503(1)
8.2.2 The MOS Current Mirror
504(3)
8.2.3 MOS Current-Steering Circuits
507(3)
8.2.4 BJT Circuits
510(6)
8.2.5 Small-Signal Operation of Current Mirrors
516(2)
8.3 The Basic Gain Cell
518(11)
8.3.1 The CS and CE Amplifiers with Current-Source Loads
518(2)
8.3.2 The Intrinsic Gain
520(3)
8.3.3 Effect of the Output Resistance of the Current-Source Load
523(4)
8.3.4 Increasing the Gain of the Basic Cell
527(2)
8.4 The Common-Gate and Common-Base Amplifiers as Current Buffers
529(10)
8.4.1 The CG Circuit
529(4)
8.4.2 Output Resistance of a CS Amplifier with a Source Resistance
533(2)
8.4.3 The Body Effect in the CG Amplifier
535(1)
8.4.4 The CB Circuit
535(4)
8.4.5 Output Resistance of the Emitter-Degenerated CE Amplifier
539(1)
8.5 The Cascode Amplifier
539(10)
8.5.1 The MOS Cascode Amplifier
540(5)
8.5.2 Distribution of Voltage Gain in a Cascode Amplifier
545(2)
8.5.3 The BJT Cascode
547(2)
8.6 The IC Source Follower
549(2)
8.7 Current-Mirror Circuits with Improved Performance
551(24)
8.7.1 The Cascode MOS Mirror
552(1)
8.7.2 The Wilson BJT Current Mirror
553(3)
8.7.3 The Wilson MOS Mirror
556(2)
8.7.4 The Widlar Current Source
558(3)
Summary
561(1)
Problems
562(13)
9 Differential and Multistage Amplifiers
575(98)
Introduction
576(1)
9.1 The MOS Differential Pair
576(19)
9.1.1 Operation with a Common-Mode Input Voltage
577(5)
9.1.2 Operation with a Differential Input Voltage
582(1)
9.1.3 Large-Signal Operation
583(4)
9.1.4 Small-Signal Operation
587(5)
9.1.5 The Differential Amplifier with Current-Source Loads
592(2)
9.1.6 Cascode Differential Amplifier
594(1)
9.2 The BJT Differential Pair
595(14)
9.2.1 Basic Operation
597(1)
9.2.2 Input Common-Mode Range
598(1)
9.2.3 Large-Signal Operation
599(2)
9.2.4 Small-Signal Operation
601(8)
9.3 Common-Mode Rejection
609(10)
9.3.1 The MOS Case
609(7)
9.3.2 The BJT Case
616(3)
9.4 DC Offset
619(7)
9.4.1 Input Offset Voltage of the MOS Differential Amplifier
619(4)
9.4.2 Input Offset Voltage of the Bipolar Differential Amplifier
623(2)
9.4.3 Input Bias and Offset Currents of the Bipolar Differential Amplifier
625(1)
9.4.4 A Concluding Remark
626(1)
9.5 The Differential Amplifier with a Current-Mirror Load
626(14)
9.5.1 Differential-to-Single-Ended Conversion
627(1)
9.5.2 The Current-Mirror-Loaded MOS Differential Pair
627(3)
9.5.3 Differential Gain of the Current-Mirror-Loaded MOS Pair
630(4)
9.5.4 The Bipolar Differential Pair with a Current-Mirror Load
634(2)
9.5.5 Common-Mode Gain and CMRR
636(4)
9.6 Multistage Amplifiers
640(33)
9.6.1 A Two-Stage CMOS Op Amp
641(4)
9.6.2 A Bipolar Op Amp
645(8)
Summary
653(1)
Problems
654(19)
10 Frequency Response
673(108)
Introduction
674(1)
10.1 High-Frequency Transistor Models
675(10)
10.1.1 The MOSFET
676(4)
10.1.2 The BJT
680(5)
10.2 High-Frequency Response of CS and CE Amplifiers
685(18)
10.2.1 Frequency Response of the Low-Pass Single-Time-Constant Circuit
685(1)
10.2.2 The Common-Source Amplifier
686(6)
10.2.3 Frequency Response of the CS Amplifier When Rsig Is Low
692(3)
10.2.4 The Common-Emitter Amplifier
695(4)
10.2.5 Miller's Theorem
699(4)
10.3 The Method of Open-Circuit Time Constants
703(7)
10.3.1 The High-Frequency Gain Function
703(1)
10.3.2 Determining the 3-dB Frequency fn
704(1)
10.3.3 Applying the Method of Open-Circuit Time Constants to the CS Amplifier
705(4)
10.3.4 Application of the Method of Open-Circuit Time Constants to the CE Amplifier
709(1)
10.4 High-Frequency Response of Common-Gate and Cascode Amplifiers
710(13)
10.4.1 High-Frequency Response of the CG Amplifier
710(6)
10.4.2 High-Frequency Response of the MOS Cascode Amplifier
716(6)
10.4.3 High-Frequency Response of the Bipolar Cascode Amplifier
722(1)
10.5 High-Frequency Response of Source and Emitter Followers
723(8)
10.5.1 The Source-Follower Case
724(6)
10.5.2 The Emitter-Follower Case
730(1)
10.6 High-Frequency Response of Differential Amplifiers
731(10)
10.6.1 Analysis of the Resistively Loaded MOS Amplifier
731(5)
10.6.2 Frequency Response of the Current-Mirror-Loaded MOS Dfferential Amplifier
736(5)
10.7 Other Wideband Amplifier Configurations
741(10)
10.7.1 Obtaining Wideband Amplification by Source or Emitter Degeneration
741(3)
10.7.2 Increasing fu by Buffering the Input Signal Source
744(4)
10.7.3 Increasing fu by Eliminating the Miller Effect Using a CG or a CB Configuration with an Input Buffer
748(3)
10.8 Low-Frequency Response of Discrete-Circuit CS and CE Amplifiers
751(30)
10.8.1 Frequency Response of the High-Pass Single-Time-Constant Circuit
751(1)
10.8.2 The CS Amplifier
752(7)
10.8.3 The Method of Short-Circuit Time Constants
759(1)
10.8.4 The CE Amplifier
760(4)
Summary
764(1)
Problems
765(16)
11 Feedback
781(106)
Introduction
782(1)
11.1 The General Feedback Structure
783(7)
11.1.1 Signal-Flow Diagram
783(1)
11.1.2 The Closed-Loop Gain
784(1)
11.1.3 The Loop Gain
785(1)
11.1.4 The Ideal Case of Infinite Open-Loop Gain A
786(4)
11.1.5 Summary
790(1)
11.2 Some Properties of Negative Feedback
790(4)
11.2.1 Gain Desensitivity
790(1)
11.2.2 Bandwidth Extension
791(1)
11.2.3 Reduction in Nonlinear Distortion
792(2)
11.3 The Feedback Voltage Amplifier
794(10)
11.3.1 The Series-Shunt Feedback Topology
794(1)
11.3.2 Examples of Series-Shunt Feedback Amplifiers
795(2)
11.3.3 Analysis of the Feedback Voltage Amplifier
797(7)
11.3.4 A Final Remark
804(1)
11.4 Systematic Analysis of Feedback Voltage Amplifiers
804(13)
11.4.1 The Ideal Case
805(2)
11.4.2 The Practical Case
807(10)
11.5 Other Feedback-Amplifier Types
817(26)
11.5.1 Basic Principles
817(3)
11.5.2 The Feedback Transconductance Amplifier (Series-Series)
820(11)
11.5.3 The Feedback Transresistance Amplifier (Shunt-Shunt)
831(6)
11.5.4 The Feedback Current Amplifier (Shunt-Series)
837(6)
11.6 Summary of the Feedback-Analysis Method
843(1)
11.7 The Stability Problem
843(3)
11.8 Effect of Feedback on the Amplifier Poles
846(7)
11.8.1 Stability and Pole Location
846(1)
11.8.2 Poles of the Feedback Amplifier
846(1)
11.8.3 Amplifiers with a Single-Pole Response
847(2)
11.8.4 Amplifiers with a Two-Pole Response
849(2)
11.8.5 Amplifiers with Three or More Poles
851(2)
11.9 Stability Study Using Bode Plots
853(5)
11.9.1 Gain and Phase Margins
853(1)
11.9.2 Effect of Phase Margin on Closed-Loop Response
854(1)
11.9.3 An Alternative Approach for Investigating Stability
855(3)
11.10 Frequency Compensation
858(29)
11.10.1 Theory
858(1)
11.10.2 Implementation
859(1)
11.10.3 Miller Compensation and Pole Splitting
860(4)
Summary
864(1)
Problems
865(22)
12 Output Stages and Power Amplifiers
887(49)
Introduction
888(1)
12.1 Classification of Output Stages
888(2)
12.2 Class A Output Stage
890(7)
12.2.1 Transfer Characteristic
890(3)
12.2.2 Signal Waveforms
893(1)
12.2.3 Power Dissipation
894(2)
12.2.4 Power-Conversion Efficiency
896(1)
12.3 Class B Output Stage
897(5)
12.3.1 Circuit Operation
897(1)
12.3.2 Transfer Characteristic
897(1)
12.3.3 Power-Conversion Efficiency
898(1)
12.3.4 Power Dissipation
899(3)
12.4 Class AB Output Stage
902(5)
12.4.1 Circuit Operation
902(2)
12.4.2 Output Resistance
904(3)
12.5 Biasing the Class AB Circuit
907(8)
12.5.1 Biasing Using Diodes
907(2)
12.5.2 Biasing Using the VBE Multiplier
909(3)
12.5.3 Use of Input Emitter Followers
912(1)
12.5.4 Use of Compound Devices
913(2)
12.6 CMOS Output Stages
915(9)
12.6.1 The Source Follower
916(1)
12.6.2 An Alternative Using a Common-Source Transistor
917(4)
12.6.3 Class D Power Amplifiers
921(3)
12.7 Power Transistors
924(12)
12.7.1 Packages and Heat Sinks
924(1)
12.7.2 Power BJTs
924(1)
12.7.3 Power MOSFETs
925(2)
Summary
927(1)
Problems
928(8)
13 Operational-Amplifier Circuits
936(68)
Introduction
937(1)
13.1 The Two-Stage CMOS Op Amp
938(17)
13.1.1 The Circuit
938(1)
13.1.2 Input Common-Mode Range and Output Swing
939(1)
13.1.3 DC Voltage Gain
940(2)
13.1.4 Common-Mode Rejection Ratio (CMRR)
942(1)
13.1.5 Frequency Response
943(5)
13.1.6 Slew Rate
948(1)
13.1.7 Power-Supply Rejection Ratio (PSRR)
949(1)
13.1.8 Design Trade-Offs
950(5)
13.2 The Folded-Cascode CMOS OpAmp
955(12)
13.2.1 The Circuit
956(1)
13.2.2 Input Common-Mode Range and Output Swing
957(2)
13.2.3 Voltage Gain
959(2)
13.2.4 Frequency Response
961(1)
13.2.5 Slew Rate
962(2)
13.2.6 Increasing the Input Common-Mode Range: Rail-to-Rail Input Operation
964(1)
13.2.7 Increasing the Output Voltage Range: The Wide-Swing Current Mirror
965(2)
13.3 BJT Op-Amp Techniques
967(37)
13.3.1 Bias Design
968(1)
13.3.2 Design of the Input Stage
969(7)
13.3.3 Common-Mode Feedback to Control the DC Voltage at the Output of the Input Stage
976(4)
13.3.4 The 741 Op Amp Input Stage
980(9)
13.3.5 Output-Stage Design for Near Rail-to-Rail Output Swing
989(5)
Summary
994(1)
Problems
994(10)
14 Filters
1004(62)
Introduction
1005(1)
14.1 Basic Filter Concepts
1005(5)
14.1.1 Filter Transmission
1005(1)
14.1.2 Filter Types
1006(1)
14.1.3 Filter Specification
1007(1)
14.1.4 Obtaining the Filter Transfer Function: Filter Approximation
1008(2)
14.1.5 Obtaining the Filter Circuit: Filter Realization
1010(1)
14.2 The Filter Transfer Function
1010(10)
14.2.1 The Filter Order
1011(1)
14.2.2 The Filter Poles
1011(1)
14.2.3 The Filter Transmission Zeros
1011(3)
14.2.4 All-Pole Filters
1014(1)
14.2.5 Factoring T(s) into the Product of First-Order and Second-Order Functions
1015(1)
14.2.6 First-Order Filters
1015(2)
14.2.7 Second-Order Filter Functions
1017(3)
14.3 Butterworth and Chebyshev Filters
1020(9)
14.3.1 The Butterworth Filter
1021(5)
14.3.2 The Chebyshev Filter
1026(3)
14.4 Second-Order Passive Filters Based on the LCR Resonator
1029(5)
14.4.1 The Resonator Poles
1029(2)
14.4.2 Realization of Transmission Zeros
1031(1)
14.4.3 Realization of the Low-Pass Function
1031(1)
14.4.4 Realization of the Bandpass Function
1031(2)
14.4.5 Realization of the Notch Functions
1033(1)
14.5 Second-Order Active Filters Based on Inductance Simulation
1034(6)
14.5.1 The Antoniou Inductance-Simulation Circuit
1034(1)
14.5.2 The Op Amp-RC Resonator
1035(2)
14.5.3 Realization of the Various Filter Types
1037(3)
14.6 Second-Order Active Filters Based on the Two-Integrator Loop
1040(7)
14.6.1 Derivation of the Two-Integrator-Loop Biquad
1041(1)
14.6.2 Circuit Implementation
1042(2)
14.6.3 An Alternative Two-Integrator-Loop Biquad Circuit
1044(2)
14.6.4 Final Remarks
1046(1)
14.7 Second Order Active Filters Using a Single Op Amp
1047(5)
14.7.1 Bandpass Circuit
1047(2)
14.7.2 High-Pass Circuit
1049(2)
14.7.3 Low-Pass Circuit
1051(1)
14.8 Switched-Capacitor Filters
1052(14)
14.8.1 The Basic Principle
1052(2)
14.8.2 Switched-Capacitor Integrator
1054(1)
14.8.3 Switched-Capacitor Biquad Filter
1054(3)
14.8.4 Final Remarks
1057(1)
Summary
1057(1)
Problems
1058(8)
15 Oscillators
1066(42)
Introduction
1067(1)
15.1 Basic Principles of Sinusoidal Oscillators
1067(8)
15.1.1 The Oscillator Feedback Loop
1068(1)
15.1.2 The Oscillation Criterion
1068(1)
15.1.3 Analysis of Oscillator Circuits
1069(4)
15.1.4 Nonlinear Amplitude Control
1073(2)
15.2 Op Amp-RC Oscillator Circuits
1075(9)
15.2.1 The Wien-Bridge Oscillator
1075(4)
15.2.2 The Phase-Shift Oscillator
1079(2)
15.2.3 The Quadrature Oscillator
1081(1)
15.2.4 The Active-Filter-Tuned Oscillator
1082(2)
15.2.5 A Final Remark
1084(1)
15.3 LC and Crystal Oscillators
1084(8)
15.3.1 The Colpitts and Hartely Oscillators
1084(4)
15.3.2 The Cross-Coupled LC Oscillator
1088(2)
15.3.3 Crystal Oscillators
1090(2)
15.4 Nonlinear Oscillators or Function Generators
1092(16)
15.4.1 The Bistable Feedback Loop
1092(1)
15.4.2 Transfer Characteristic of the Bistable Circuit
1093(2)
15.4.3 Triggering the Bistable Circuit
1095(1)
15.4.4 The Bistable Circuit as a Memory Element
1095(1)
15.4.5 A Bistable Circuit with Noninverting Transfer Characteristic
1095(2)
15.4.6 Generating Square Waveforms Using a Bistable Circuit
1097(3)
15.4.7 Generating Triangular Waveforms
1100(2)
15.4.8 Generation of Sine Waves
1102(1)
Summary
1102(1)
Problems
1102(6)
PART III DIGITAL INTEGRATED CIRCUITS
1108(2)
16 CMOS Digital Logic Circuits
1110(1)
Introduction
1111(1)
16.1 CMOS Logic-Gate Circuits
1111(10)
16.1.1 Switch-Level Transistor Model
1111(1)
16.1.2 The CMOS Inverter
1111(1)
16.1.3 General Structure of CMOS Logic
1112(4)
16.1.4 The Two-Input NOR Gate
1116(1)
16.1.5 The Two-Input NAND Gate
1116(1)
16.1.6 A Complex Gate
1117(1)
16.1.7 Obtaining the PUN from the PDN and Vice Versa
1117(1)
16.1.8 The Exclusive-OR Function
1118(1)
16.1.9 Summary of the Synthesis Method
1119(2)
16.2 Digital Logic Inverters
1121(12)
16.2.1 The Voltage-Transfer Characteristic (VTC)
1121(1)
16.2.2 Noise Margins
1122(2)
16.2.3 The Ideal VTC
1124(1)
16.2.4 Inverter Implementation
1125(8)
16.3 The CMOS Inverter
1133(16)
16.3.1 Circuit Operation
1134(2)
16.3.2 The Voltage-Transfer Characteristic (VTC)
1136(3)
16.3.3 The Situation When QN and QP Are Not Matched
1139(5)
Summary
1144(1)
Problems
1145(4)
17 Digital Design: Power, Speed, and Area
1149(42)
Introduction
1150(1)
17.1 Dynamic Operation of the CMOS Inverter
1150(14)
17.1.1 Propagation Delay
1150(4)
17.1.2 Determining the Propagation Delay of the CMOS Inverter
1154(7)
17.1.3 Determining the Equivalent Load Capacitance C
1161(3)
17.2 Transistor Sizing
1164(10)
17.2.1 Inverter Sizing
1165(2)
17.2.2 Transistor Sizing in CMOS Logic Gates
1167(3)
17.2.3 Effects of Fan-In and Fan-Out on Propagation Delay
1170(1)
17.2.4 Driving a Large Capacitance
1171(3)
17.3 Power Dissipation
1174(5)
17.3.1 Sources of Power Dissipation
1174(4)
17.3.2 Power-Delay and Energy-Delay Products
1178(1)
17.4 Implications of Technology Scaling: Issues in Deep-Submicron Design
1179(12)
17.4.1 Silicon Area
1179(1)
17.4.2 Scaling Implications
1179(2)
17.4.3 Temperature, Voltage, and Process Variations
1181(1)
17.4.4 Wiring: The Interconnect
1181(1)
17.4.5 Digital Design in Modern Technologies
1182(1)
Summary
1183(2)
Problems
1185(6)
18 Memory and Clocking Circuits
1191(1)
Introduction
1192(1)
18.1 The Transmission Gate
1192(1)
18.1.1 Operation with NMOS Transistors as Switches
1193(4)
18.1.2 Restoring the Value of VOH to VDD
1197(1)
18.1.3 The Use of CMOS Transmission Gates as Switches
1198(6)
18.2 Latches and Flip-Flops
1204(11)
18.2.1 The Latch
1204(2)
18.2.2 The SR Flip-Flop
1206(1)
18.2.3 CMOS Implementation of SR Flip-Flops
1207(5)
18.2.4 A Simpler CMOS Implementation of the Clocked SR Flip-Flop
1212(1)
18.2.5 D Flip-Flop Circuits
1212(3)
18.3 Random-Access Memory (RAM) Cells
1215(13)
18.3.1 Static Memory (SRAM) Cell
1217(7)
18.3.2 Dynamic Memory (DRAM) Cell
1224(2)
18.3.3 Flash Memory
1226(2)
18.4 Ring Oscillators and Special-Purpose Circuits
1228(1)
18.4.1 Ring Oscillators and Other Pulse-Generation Circuits
1228(2)
18.4.2 The Sense Amplifier
1230(5)
18.4.3 The Row-Address Decoder
1235(2)
18.4.4 The Column-Address Decoder
1237(1)
Summary
1238(1)
Problems
1239
Appendices
A VLSI Fabrication Technology*
1(1)
B SPICE Device Models and Design with Simulation Examples*
1(1)
C Two-Port Network Parameters*
1(1)
D Some Useful Network Theorems*
1(1)
E Single-Time-Constant Circuits*
1(1)
F s-Domain Analysis: Poles, Zeros, and Bode Plots*
1(1)
G Comparison of the MOSFET and the BJT*
1(1)
H Filter Design Material*
1(1)
I Bibliography*
1(1)
J Standard Resistance Values and Unit Prefixes
1(1)
K Typical Parameter Values for IC Devices Fabricated in CMOS and Bipolar Processes
1(1)
L Answers to Selected Problems*
1(1)
Summary Tables* 1(1)
Index 1