Preface |
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ix | |
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1 | (14) |
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Semiconductor Technology and RF Power Amplifier Design |
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2 | (1) |
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3 | (1) |
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Power Amplifier IC Design |
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4 | (1) |
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Power Amplifier Linearity |
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5 | (1) |
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5 | (4) |
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9 | (1) |
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10 | (5) |
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13 | (2) |
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15 | (34) |
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15 | (1) |
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Bipolar Junction and Heterojunction Bipolar Transistors |
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16 | (2) |
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18 | (17) |
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18 | (2) |
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20 | (5) |
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25 | (4) |
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29 | (3) |
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32 | (3) |
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35 | (3) |
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38 | (11) |
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38 | (2) |
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The Level 2 and Level 3 Models |
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40 | (1) |
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40 | (3) |
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The BSIM2 and HSPICE Level 28 Models |
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43 | (1) |
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44 | (1) |
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MOS Model 9 and MOS Model 11 |
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45 | (1) |
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45 | (1) |
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46 | (3) |
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Empirical Modeling of Bipolar Devices |
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49 | (38) |
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49 | (5) |
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Modeling the HBT versus the BJT |
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49 | (1) |
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50 | (1) |
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Motivation for an Empirical Bipolar Device Model |
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51 | (2) |
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Physics-Based and Empirical Models |
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53 | (1) |
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Compatibility between Large-and Small-Signal Models |
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53 | (1) |
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Model Construction and Parameter Extraction |
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54 | (9) |
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54 | (2) |
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Current Source Model Parameter Extraction |
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56 | (2) |
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Extraction of Intrinsic Capacitances |
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58 | (2) |
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Extraction of Base Resistance |
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60 | (1) |
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Parameter Extraction Procedure |
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61 | (2) |
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Temperature-Dependent InGaP/GaAs HBT Large-Signal Model |
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63 | (8) |
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Empirical Si BJT Large-Signal Model |
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71 | (6) |
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Extension of the Empirical Modeling Method to the SiGe HBT |
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77 | (6) |
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83 | (4) |
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83 | (4) |
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Scalable Modeling of RF MOSFETS |
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87 | (36) |
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87 | (4) |
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88 | (1) |
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Distributed Gate Resistance |
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89 | (1) |
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Distributed Substrate Resistance |
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89 | (2) |
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Scalable Modified BSIM3v3 Model |
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91 | (29) |
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Scalability of MOSFET Model |
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91 | (3) |
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Extraction of Small-Signal Model Parameters |
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94 | (7) |
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Scalable Substrate Network Modeling |
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101 | (15) |
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116 | (4) |
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120 | (3) |
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120 | (3) |
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Power Amplifier IC Design |
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123 | (18) |
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123 | (1) |
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Power Amplifier Design Methodology |
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124 | (1) |
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125 | (7) |
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132 | (4) |
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Thermal Instability and Ballasting |
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136 | (5) |
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138 | (3) |
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Power Amplifier Design In Silicon |
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141 | (32) |
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141 | (1) |
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A 2.4-GHz High-Efficiency SiGe HBT Power Amplifier |
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142 | (11) |
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Circuit Design Considerations |
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143 | (3) |
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Analysis of Ballasting for SiGe HBT Power Amplifiers |
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146 | (2) |
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Harmonic Suppression Filter and Output Match Network |
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148 | (2) |
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Performance of the Power Amplifier Module |
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150 | (3) |
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RF Power Amplifier Design Using Device Periphery Adjustment |
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153 | (20) |
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Analysis of the Device Periphery Adjustment Technique |
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155 | (2) |
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1.9-GHz CMOS Power Amplifier |
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157 | (5) |
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1.9-GHz CDMA/PCS SiGe HBT Power Amplifier |
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162 | (4) |
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Nonlinear Term Cancellation for Linearity Improvement |
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166 | (3) |
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169 | (4) |
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Efficiency Enhancement of RF Power Amplifiers |
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173 | (26) |
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173 | (1) |
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Efficiency Enhancement Techniques |
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174 | (5) |
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Envelope Elimination and Restoration |
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174 | (1) |
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175 | (1) |
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The Doherty Amplifier Technique |
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175 | (1) |
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Chireix's Outphasing Amplifier Technique |
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176 | (3) |
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The Classical Doherty Amplifier |
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179 | (2) |
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The Multistage Doherty Amplifier |
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181 | (18) |
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181 | (5) |
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186 | (2) |
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188 | (2) |
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190 | (8) |
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198 | (1) |
Index |
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199 | |