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Models, Methods, and Tools for Complex Chip Design: Selected Contributions from FDL 2012 2014 ed. [Kõva köide]

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  • Formaat: Hardback, 221 pages, kõrgus x laius: 235x155 mm, kaal: 5287 g, 57 Illustrations, color; 37 Illustrations, black and white; XV, 221 p. 94 illus., 57 illus. in color., 1 Hardback
  • Sari: Lecture Notes in Electrical Engineering 265
  • Ilmumisaeg: 01-Oct-2013
  • Kirjastus: Springer International Publishing AG
  • ISBN-10: 331901417X
  • ISBN-13: 9783319014173
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  • Formaat: Hardback, 221 pages, kõrgus x laius: 235x155 mm, kaal: 5287 g, 57 Illustrations, color; 37 Illustrations, black and white; XV, 221 p. 94 illus., 57 illus. in color., 1 Hardback
  • Sari: Lecture Notes in Electrical Engineering 265
  • Ilmumisaeg: 01-Oct-2013
  • Kirjastus: Springer International Publishing AG
  • ISBN-10: 331901417X
  • ISBN-13: 9783319014173
This book brings together a selection of the best papers from the fifteenth edition of the Forum on specification and Design Languages Conference (FDL), which was held in September 2012 at Vienna University of Technology, Vienna, Austria. FDL is a well-established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modeling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems.
Formal Plausibility Checks for Environment.- Efficient Refinement
Strategy Exploiting Component Properties in A CEGAR Process.- Formal
Specification Level.- Power Estimation Methodology for SystemC.- SystemC
Analysis for Nondeterminism Anomalies.- A Design and Verification Methodology
for Mixed-Signal Systems Using SystemC-AMS.- Configurable Load Emulation
Using FPGA and Power Amplifiers for Automotive Power ICs.- Model Based Design
of Distributed Embedded Cyber Physical Systems.- Model-driven Methodology for
the Development of Multi-level Executable Environments.- The Concept and
Study of Grid Responsiveness.- Polynomial Metamodel-Based Fast Optimization
of Nanoscale PLL Components.- Methodology and Example-Driven Interconnect
Synthesis for Designing Heterogenous Coarse-Grain Reconfigurable
Architectures.