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Modern Semiconductor Devices for Integrated Circuits [Kõva köide]

  • Formaat: Hardback, 384 pages, kõrgus x laius x paksus: 234x178x20 mm, kaal: 680 g
  • Ilmumisaeg: 24-Aug-2009
  • Kirjastus: Pearson
  • ISBN-10: 0136085253
  • ISBN-13: 9780136085256
Teised raamatud teemal:
  • Formaat: Hardback, 384 pages, kõrgus x laius x paksus: 234x178x20 mm, kaal: 680 g
  • Ilmumisaeg: 24-Aug-2009
  • Kirjastus: Pearson
  • ISBN-10: 0136085253
  • ISBN-13: 9780136085256
Teised raamatud teemal:

For courses in semiconductor devices.

 

Prepare your students for the semiconductor device technologies of today and tomorrow.

 

Modern Semiconductor Devices for Integrated Circuits, First Edition introduces students to the world of modern semiconductor devices with an emphasis on integrated circuit applications. Written by an experienced teacher, researcher, and expert in industry practices, this succinct and forward-looking text is appropriate for both undergraduate and graduate students, and serves as a suitable reference text for practicing engineers. 

Preface xiii
About the Author xv
Electrons and Holes in Semiconductors
1(34)
Silicon Crystal Structure
1(3)
Bond Model of Electrons and Holes
4(4)
Energy Band Model
8(3)
Semiconductors, Insulators, and Conductors
11(1)
Electrons and Holes
12(3)
Density of States
15(1)
Thermal Equilibrium and the Fermi Function
16(3)
Electron and Hole Concentrations
19(6)
General Theory of n and p
25(3)
Carrier Concentrations at Extremely High and Low Temperatures
28(1)
Chapter Summary
29(6)
Problems
30(3)
References
33(1)
General References
34(1)
Motion and Recombination of Electrons and Holes
35(24)
Thermal Motion
35(3)
Drift
38(8)
Diffusion Current
46(1)
Relation Between the Energy Diagram and V, &
47(1)
Einstein Relationship Between D and μ
48(2)
Electron-Hole Recombination
50(2)
Thermal Generation
52(1)
Quasi-Equilibrium and Quasi-Fermi Levels
52(2)
Chapter Summary
54(5)
Problems
56(2)
References
58(1)
General References
58(1)
Device Fabrication Technology
59(30)
Introduction to Device Fabrication
60(1)
Oxidation of Silicon
61(3)
Lithography
64(4)
Pattern Transfer---Etching
68(2)
Doping
70(3)
Dopant Diffusion
73(2)
Thin-Film Deposition
75(5)
Interconnect---The Back-End Process
80(2)
Testing, Assembly, and Qualification
82(1)
Chapter Summary---A Device Fabrication Example
83(6)
Problems
85(2)
References
87(1)
General References
88(1)
PN and Metal-Semiconductor Junctions
89(68)
PN Junction
89(1)
Building Blocks of the PN Junction Theory
90(4)
Depletion-Layer Model
94(3)
Reverse-Biased PN Junction
97(1)
Capacitance-Voltage Characteristics
98(2)
Junction Breakdown
100(5)
Carrier Injection Under Forward Bias---Quasi-Equilibrium Boundary Condition
105(2)
Current Continuity Equation
107(2)
Excess Carriers in Forward-Biased PN Junction
109(3)
PN Diode IV Characteristics
112(3)
Charge Storage
115(1)
Small-Signal Model of the Diode
116(1)
Application to Optoelectronic Devices
117(1)
Solar Cells
117(7)
Light-Emitting Diodes and Solid-State Lighting
124(4)
Diode Lasers
128(5)
Photodiodes
133(1)
Metal-Semiconductor Junction
133(1)
Schottky Barriers
133(4)
Thermionic Emission Theory
137(1)
Schottky Diodes
138(2)
Applications of Schottky Diodes
140(1)
Quantum Mechanical Tunneling
141(1)
Ohmic Contacts
142(3)
Chapter Summary
145(12)
Problems
148(8)
References
156(1)
General References
156(1)
MOS Capacitor
157(38)
Flat-Band Condition and Flat-Band Voltage
158(2)
Surface Accumulation
160(1)
Surface Depletion
161(1)
Threshold Condition and Threshold Voltage
162(2)
Strong Inversion Beyond Threshold
164(4)
MOS C-V Characteristics
168(4)
Oxide Charge---A Modification to Vfb and Vt
172(2)
Poly-Si Gate Depletion-Effective Increase in Tox
174(2)
Inversion and Accumulation Charge-Layer Thicknesses---Quantum Mechanical Effect
176(3)
CCD Imager and CMOS Imager
179(5)
Chapter Summary
184(11)
Problems
186(7)
References
193(1)
General References
193(2)
MOS Transistor
195(64)
Introduction to the MOSFET
195(3)
Complementary MOS (CMOS) Technology
198(2)
Surface Mobilities and High-Mobility FETs
200(7)
MOSFET Vt, Body Effect, and Steep Retrograde Doping
207(2)
QINV in MOSFET
209(1)
Basic MOSFET IV Model
210(4)
CMOS Inverter---A Circuit Example
214(5)
Velocity Saturation
219(1)
MOSFET IV Model with Velocity Saturation
220(5)
Parasitic Source-Drain Resistance
225(1)
Extraction of the Series Resistance and the Effective Channel Length
226(2)
Velocity Overshoot and Source Velocity Limit
228(1)
Output Conductance
229(1)
High-Frequency Performance
230(2)
MOSFET Noises
232(6)
SRAM, DRAM, Nonvolatile (Flash) Memory Devices
238(7)
Chapter Summary
245(14)
Problems
247(9)
References
256(1)
General References
257(2)
MOSFETs in ICs-Scaling, Leakage, and Other Topics
259(32)
Technology Scaling-For Cost, Speed, and Power Consumption
259(4)
Subthreshold Current---``Off'' Is Not Totally ``Off''
263(3)
Vt Roll-Off---Short-Channel MOSFETs Leak More
266(4)
Reducing Gate-Insulator Electrical Thickness and Tunneling Leakage
270(2)
How to Reduce Wdep
272(2)
Shallow Junction and Metal Source/Drain MOSFET
274(2)
Trade-Off Between /on and /off and Design for Manufacturing
276(1)
Ultra-Thin-Body SOI and Multigate MOSFETs
277(5)
Output Conductance
282(1)
Device and Process Simulation
283(1)
MOSFET Compact Model for Circuit Simulation
284(1)
Chapter Summary
285(6)
Problems
286(2)
References
288(1)
General References
289(2)
Bipolar Transistor
291(34)
Introduction to the BJT
291(2)
Collector Current
293(4)
Base Current
297(1)
Current Gain
298(4)
Base-Width Modulation by Collector Voltage
302(2)
Ebers-Moll Model
304(2)
Transit Time and Charge Storage
306(4)
Small-Signal Model
310(2)
Cutoff Frequency
312(2)
Charge Control Model
314(2)
Model for Large-Signal Circuit Simulation
316(2)
Chapter Summary
318(7)
Problems
319(4)
References
323(1)
General References
323(2)
Appendix I Derivation of the Density of States 325(4)
Appendix II Derivation of the Fermi-Dirac Distribution Function 329(4)
Appendix III Self-Consistencies of Minority Carrier Assumptions 333(4)
Answers to Selected Problems 337(4)
Index 341
Chenming Calvin Hu holds the TSMC Distinguished Professor Chair of Microelectronics at University of California, Berkeley.  He is a member of the US Academy of Engineering and a foreign member of the Chinese Academy of Sciences. From 2001 to 2004, he was the Chief Technology Officer of TSMC. A Fellow of the Institute of Electrical and Electronic Engineers (IEEE), he has been honored with the Jack Morton Award in1997 for his research on transistor reliability, the Solid State Circuits Award in 2002 for co-developing the first international standard transistor model for circuit simulation, and the Jun-ichi Nishizawa Medal in 2009 for exceptional contributions to device physics and scaling. He has supervised over 60 Ph.D. student theses, published 800 technical articles, and received more than 100 US patents. His other honors include Sigma Xi Moni Ferst Award, R&D 100 Award, and UC Berkeleys highest award for teaching the Berkeley Distinguished Teaching Award.

For additional information, visit the author's Web site.