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Multiprocessor System-on-Chip: Hardware Design and Tool Integration [Kõva köide]

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  • Formaat: Hardback, 270 pages, kõrgus x laius: 235x155 mm, kaal: 1260 g, VIII, 270 p., 1 Hardback
  • Ilmumisaeg: 03-Dec-2010
  • Kirjastus: Springer-Verlag New York Inc.
  • ISBN-10: 1441964592
  • ISBN-13: 9781441964595
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  • Formaat: Hardback, 270 pages, kõrgus x laius: 235x155 mm, kaal: 1260 g, VIII, 270 p., 1 Hardback
  • Ilmumisaeg: 03-Dec-2010
  • Kirjastus: Springer-Verlag New York Inc.
  • ISBN-10: 1441964592
  • ISBN-13: 9781441964595
Teised raamatud teemal:
The purpose of this book is to evaluate strategies for future system design in multiprocessor system-on-chip (MPSoC) architectures. Both hardware design and integration of new development tools will be discussed. Novel trends in MPSoC design, combined with reconfigurable architectures are a main topic of concern. The main emphasis is on architectures, design-flow, tool-development, applications and system design.

This book evaluates strategies for future system design in multiprocessor system-on-chip (MPSoC) architectures. It examines both hardware design and integration of new development tools as well as novel trends in MPSoC design.
1 An Introduction to Multi-Core System on Chip-Trends and Challenges
1(24)
Lionel Torres
Pascal Benoit
Gilles Sassatelli
Michel Robert
Fabien Clermidy
Diego Puschini
Part I "Application Mapping and Communication Infrastructure"
2 Composability and Predictability for Independent Application Development, Verification, and Execution
25(32)
Benny Akesson
Anca Molnos
Andreas Hansson
Jude Ambrose Angelo
Kees Goossens
3 Hardware Support for Efficient Resource Utilization in Manycore Processor Systems
57(32)
A. Herkersdorf
A. Lankes
M. Meitinger
R. Ohlendorf
S. Wallentowitz
T. Wild
J. Zeppenfeld
4 PALLAS: Mapping Applications onto Manycore
89(26)
Michael Anderson
Bryan Catanzaro
Jike Chong
Ekaterina Gonina
Kurt Keutzer
Chao-Yue Lai
Mark Murphy
Bor-Yiing Su
Narayanan Sundaram
5 The Case for Message Passing on Many-Core Chips
115(12)
Rakesh Kumar
Timothy G. Mattson
Gilles Pokam
Rob Van Der Wijngaart
Part II "Reconfigurable Hardware in Multiprocessor Systems"
6 Adaptive Multiprocessor System-on-Chip Architecture: New Degrees of Freedom in System Design and Runtime Support
127(28)
Diana Gohringer
Michael Hubner
Jurgen Becker
Part III "Physical Design of Multiprocessor Systems"
7 Design Tools and Methods for Chip Physical Design
155(12)
Ricardo Reis
8 Power-Aware Multicore SoC and NoC Design
167(30)
Miltos D. Grammatikakis
George Kornaros
Marcello Coppola
Part IV Trends and Challenges for Multiprocessor Systems
9 Embedded Multicore Systems: Design Challenges and Opportunities
197(26)
Dac Pham
Jim Holt
Sanjay Deshpande
10 High-Performance Multiprocessor System on Chip: Trends in Chip Architecture for the Mass Market
223(18)
Rob Aitken
Krisztian Flautner
John Goodacre
11 Invasive Computing: An Overview
241(28)
Jurgen Teich
Jorg Henkel
Andreas Herkersdorf
Doris Schmitt-Landsiedel
Wolfgang Schroder-Preikschat
Gregor Snelting
Index 269