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Nanocrystals in Nonvolatile Memory: Nanocrystals in Nonvolatile Memory [Kõva köide]

(Key Laboratory of Microelectronic Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, No. 3 Bei-Tu-Cheng West Road, Beijing 100029, China)
  • Formaat: Hardback, 534 pages, kõrgus x laius: 229x152 mm, kaal: 453 g, 18 Tables, black and white; 47 Line drawings, black and white; 22 Halftones, color; 161 Halftones, black and white; 22 Illustrations, color; 208 Illustrations, black and white
  • Ilmumisaeg: 13-Sep-2018
  • Kirjastus: Pan Stanford Publishing Pte Ltd
  • ISBN-10: 9814774731
  • ISBN-13: 9789814774734
Teised raamatud teemal:
  • Formaat: Hardback, 534 pages, kõrgus x laius: 229x152 mm, kaal: 453 g, 18 Tables, black and white; 47 Line drawings, black and white; 22 Halftones, color; 161 Halftones, black and white; 22 Illustrations, color; 208 Illustrations, black and white
  • Ilmumisaeg: 13-Sep-2018
  • Kirjastus: Pan Stanford Publishing Pte Ltd
  • ISBN-10: 9814774731
  • ISBN-13: 9789814774734
Teised raamatud teemal:

In recent years, utilization of the abundant advantages of quantum physics, quantum dots, quantum wires, quantum wells, and nanocrystals has attracted considerable scientific attention in the field of nonvolatile memory. Nanocrystals are the driving element that have brought the nonvolatile flash memory technology to a distinguished height. However, new approaches are still required to strengthen this technology for future applications.

This book details the methods of fabrication of nanocrystals and their application in baseline nonvolatile memory and emerging nonvolatile memory technologies. The chapters have been written by renowned experts of the field and will provide an in-depth understanding of these technologies. The book is a valuable tool for research and development sectors associated with electronics, semiconductors, nanotechnology, material sciences, solid state memories, and electronic devices.

Preface xv
Acknowledgments xix
1 Nanocrystal Materials, Fabrications, and Characterizations 1(74)
Sujan Chowdhury
Puspendu Barik
1.1 Introduction
2(7)
1.1.1 Nanomaterials for a Nonvolatile Memory Device
4(1)
1.1.2 Overview of Nonvolatile Memory
5(2)
1.1.3 Classification of Nanomaterials
7(2)
1.2 Synthesis and Fabrication of Nanocrystals for NVM
9(17)
1.2.1 OD Nanocrystals
11(3)
1.2.2 1D Nanocrystals
14(6)
1.2.3 2D Nanocrystals
20(5)
1.2.4 3D Nanocrystals
25(1)
1.3 Characterization of Nanoparticles
26(25)
1.3.1 Microscopy Technique
27(10)
1.3.1.1 Electron microscopy
27(5)
1.3.1.2 Reflection high-energy electron diffraction
32(1)
1.3.1.3 Scanning probe microscopy
33(4)
1.3.2 X-Ray-Based Methods
37(7)
1.3.2.1 X-ray diffraction
37(1)
1.3.2.2 Small-angle X-ray scattering
38(2)
1.3.2.3 X-ray photoelectron spectroscopy
40(3)
1.3.2.4 X-ray absorption spectroscopy
43(1)
1.3.3 Light-Based Spectroscopic Techniques
44(65)
1.3.3.1 Light scattering techniques
45(1)
1.3.3.2 Ultraviolet/visible spectroscopy
46(1)
1.3.3.3 Photoluminescence spectroscopy
47(2)
1.3.3.4 Raman spectroscopy
49(1)
1.3.3.5 Fourier transform infrared spectroscopy
50(1)
1.4 Summary
51(24)
2 Modeling and Simulation of Nanocrystal Flash Memory 75(52)
Bikash Sharma
Chandan Kumar Sarkar
2.1 Introduction
76(3)
2.2 Developments in Nanocrystal Memory
79(3)
2.3 Model for Nanocrystal and Nitride-Trap Memory
82(5)
2.4 Memory Device Scaling with the Use of a Silicon Nanocrystal
87(3)
2.5 Modeling of Tunneling Currents
90(6)
2.6 Model for the Charging and Discharging Process
96(5)
2.7 Programming Time Model
101(3)
2.8 Growth of Metal (Au) Nanocrystals in High-K Dielectrics
104(2)
2.9 Retention Characteristics Model
106(3)
2.10 Tunneling Characteristics of Metal- Nanocrystal- and Semiconductor-Nanocrystal-Based Gate Dielectrics
109(11)
2.10.1 Fowler-Nordheim Tunneling
114(1)
2.10.2 Direct Tunneling
115(5)
2.11 Conclusion
120(7)
3 Charge Trapping and High-K Nanocrystal Flash Memory 127(46)
Meng Chuan Lee
Hin Yong Wong
3.1 Introduction to Charge Storage Nonvolatile Memory
128(11)
3.2 Evolution of Nanocrystal-Based CS-NVM
139(6)
3.3 Reliability Challenges of Nanocrystal-Based CS-NVM
145(7)
3.4 Technical Mitigations
152(13)
3.5 Summary
165(8)
4 Silicon Nanocrystal Flash Memory 173(26)
Lili Zhao
Tiezheng Lv
Guofeng Fan
4.1 Introduction
174(1)
4.2 Si NCs in Flash Memory
175(9)
4.2.1 Structure Development of a Si NC Floating Gate
175(8)
4.2.1.1 Si NC floating-gate story
176(4)
4.2.1.2 Preparation of Si NCs for flash memory
180(3)
4.2.2 Electrical Characteristics of Si Nanocrystal in Flash Memory
183(1)
4.3 Si Nanocrystal Trap Center Studied by Deep-Level Transient Spectroscopy
184(8)
4.4 Engineering for Improved Si Nanocrystal Flash Memory
192(7)
5 Synthesis, Characterization, and Memory Application of Germanium Nanocrystals in Dielectric Matrices 199(64)
Wee Kiong Choi
Writam Banerjee
5.1 Introduction
200(3)
5.2 Synthesis of Ge Nanocrystals
203(13)
5.2.1 Ge Atoms for Nanocrystal Growth
203(2)
5.2.2 Effect of Ge Concentration and Annealing Temperature
205(5)
5.2.3 Effect of Annealing Ambient
210(1)
5.2.4 Effect of an Oxide Barrier Layer
211(2)
5.2.5 Influence of Dielectric Matrices
213(3)
5.3 Characterizations of Ge Nanocrystals
216(12)
5.3.1 Photoluminescence Properties
216(3)
5.3.2 Electroluminescence Properties
219(3)
5.3.3 Stress in Ge Nanocrystals Embedded in Dielectrics
222(6)
5.4 Ge Nanocrystal-Based Floating-Gate Memory Devices
228(25)
5.4.1 Fabrication of Ge Nanocrystal Memory Structures
228(3)
5.4.2 Control of Nanocrystal Size
231(6)
5.4.3 Retention Properties
237(5)
5.4.4 High-K Dielectrics
242(3)
5.4.5 Characterization Ge-Nanocrystal- Based Transistors
245(8)
5.5 Summary
253(10)
6 Nanographene Flash Memory 263(64)
Jianling Meng
Rong Yang
Guangyu Zhang
6.1 Introduction
264(4)
6.1.1 Graphene Fundamentals
264(4)
6.1.1.1 Structure and electronic properties of graphene
264(3)
6.1.1.2 Graphene nanostructures and graphene nanosheets
267(1)
6.2 Preparation/Synthesis of Graphene and Nanographene
268(23)
6.2.1 Graphene Thin-Film Preparation
268(12)
6.2.1.1 Reduced graphene oxide
268(5)
6.2.1.2 Chemical vapor depositions
273(7)
6.2.2 Synthetic Strategies for Nanographene
280(17)
6.2.2.1 Top-down methods
281(6)
6.2.2.2 Bottom-up methods
287(4)
6.3 Graphene-Based Flash Memory
291(6)
6.4 Graphene Nanostructures Flash Memory
297(16)
6.4.1 Memory Window
298(11)
6.4.2 P/E Transient Time
309(1)
6.4.3 Retention Characteristics
310(3)
6.4.4 Endurance Cycles
313(1)
6.5 Graphene Memory Hybrids
313(6)
6.5.1 Flexible Transparent Flash Memory
314(3)
6.5.2 3D Stacking
317(2)
6.6 Conclusion and Prospects
319(8)
7 Data Recovery of Flash Memory 327(42)
Bernard Kasamani Shibwabo
Ismail Ateya Lukandu
7.1 Introduction
328(4)
7.2 How Computers Store Information
332(3)
7.2.1 Kinds of Computer Memory
332(1)
7.2.2 Bits and Memory
333(2)
7.3 Flash Memory
335(10)
7.3.1 Introduction to Flash Memory
335(2)
7.3.2 The Features of Flash Memory
337(1)
7.3.3 Transistors
337(6)
7.3.4 NAND and NOR Flash Memory
343(2)
7.4 Data Recovery
345(3)
7.4.1 Introduction to Data Recovery
345(1)
7.4.2 The Need for Data Recovery
346(1)
7.4.3 Data Extraction/Acquisition
347(1)
7.4.3.1 Data extraction tools
347(1)
7.4.3.2 Physical extraction
348(1)
7.5 Data Recovery in Flash Media
348(18)
7.5.1 Data Loss on Flash Media
348(4)
7.5.1.1 Bit flipping
350(1)
7.5.1.2 Bad block handling
351(1)
7.5.1.3 Life span/endurance
351(1)
7.5.1.4 Retention
351(1)
7.5.2 Bad Blocks
352(1)
7.5.3 File Systems
353(1)
7.5.4 File Attributes
354(2)
7.5.5 Flash Data Recovery Techniques
356(14)
7.5.5.1 Fundamental concepts
356(2)
7.5.5.2 The flash translation layer and flash data recovery
358(2)
7.5.5.3 Data recovery for data loss due to a virus attack
360(2)
7.5.5.4 Data recovery software
362(4)
7.5.5.5 Best practice for flash
366(1)
7.6 Windows User Laboratory Activities
366(1)
7.7 Summary
367(2)
8 Nanocrystals in Resistive Random Access Memory 369(80)
Writam Banerjee
Qi Liu
8.1 Introduction
370(19)
8.1.1 Background
370(3)
8.1.2 Prototype NVM Technologies
373(6)
8.1.2.1 Ferroelectric random access memory
373(2)
8.1.2.2 Phase change memory
375(1)
8.1.2.3 Spin-transfer torque random access memory
376(3)
8.1.3 Emerging NVM Technologies
379(10)
8.1.3.1 Emerging FeRAM
379(1)
8.1.3.2 Carbon memory
380(1)
8.1.3.3 Mott memory
381(1)
8.1.3.4 Macromolecular memory
382(1)
8.1.3.5 Molecular memory
382(1)
8.1.3.6 Resistive random access memory
383(3)
8.1.3.7 History of RRAM
386(3)
8.2 Mechanisms and Materials in RRAM
389(19)
8.2.1 Resistive Switching Mechanisms
389(12)
8.2.1.1 Electrochemical metallization type
390(6)
8.2.1.2 Valence change memory type
396(4)
8.2.1.3 Thermochemical reaction type
400(1)
8.2.2 Materials in RRAM
401(7)
8.2.2.1 Metal electrode layer
401(4)
8.2.2.2 Insulating layer
405(1)
8.2.2.3 Defect-related improvement of RRAM performance
406(2)
8.3 Applications of Nanocrystals in RRAM
408(16)
8.3.1 Improvement of Electrical Performance
409(3)
8.3.1.1 Forming process
409(1)
8.3.1.2 SET/RESET operation
410(2)
8.3.1.3 Reliability of RRAM devices
412(1)
8.3.2 Conductive Filament Formation Based on Nanocrystal Migration
412(3)
8.3.3 Charge Trapping Using NC
415(3)
8.3.4 Threshold Switching to Memory Switching
418(6)
8.4 Nanocrystals as the Seed Layer in RRAM
424(14)
8.4.1 Effect of Nanocrystals in the Resistive Switching Layer
424(8)
8.4.1.1 Colloidal nanocrystals as the switching layer
425(2)
8.4.1.2 Local electric field enhancement with nanocrystals
427(1)
8.4.1.3 Formation of homogeneous NCs for RRAM applications
428(4)
8.4.2 Bottom Electrode Modification
432(19)
8.4.2.1 Nanocrystal-based bottom electrode
432(3)
8.4.2.2 Nanopyramid-shaped bottom electrode
435(2)
8.4.2.3 Arc-shaped bottom electrode
437(1)
8.5 Summary and Future Scope
438(11)
9 Measurement Aspects of Nonvolatile Memory 449(64)
Alberto Campisi
9.1 Introduction
450(1)
9.2 Testing Memory
451(29)
9.2.1 Memory Tester
452(18)
9.2.1.1 Digital channel
454(4)
9.2.1.2 PMU
458(2)
9.2.1.3 Device power supply
460(1)
9.2.1.4 Control unit
461(2)
9.2.1.5 Capture memory: data buffer memory
463(2)
9.2.1.6 Redundancy analysis processor
465(1)
9.2.1.7 Other remarks on flash testers
465(5)
9.2.2 DUT Built-In Test-Oriented Resources
470(10)
9.2.2.1 DMA
474(1)
9.2.2.2 Threshold distribution
475(5)
9.3 Test Flow
480(12)
9.3.1 Wafer Sort
481(9)
9.3.2 Final Test
490(2)
9.4 Brief History of Flash
492(1)
9.5 Redundancy
493(1)
9.6 Cycling
493(1)
9.7 Retention
494(2)
9.8 Silicon Debug/Design Validation
496(1)
9.9 Testing Readiness
496(1)
9.10 Characterization
497(3)
9.10.1 Shmoo Plot
497(3)
9.11 Qualification
500(1)
9.12 Datasheet
500(5)
9.12.1 Product General Description
501(1)
9.12.2 Pin Name and Function
501(1)
9.12.3 Product Conceptual Schematic
502(1)
9.12.4 Command Set
502(1)
9.12.5 DC Characteristics
503(1)
9.12.6 AC Characteristics
503(1)
9.12.7 Endurance Characteristics
504(1)
9.12.8 Package Dimensions
504(1)
9.12.9 Order Code
504(1)
9.13 Datasheet Gray Areas
505(1)
9.14 Error Correction Code
506(7)
Index 513
Writam Banerjee is assistant professor in the Institute of Microelectronics of Chinese Academy of Sciences (IMECAS), Beijing, since 2014. He completed his BSc and MSc in physics from Vidyasagar University, West Bengal, India. He received his PhD in electronic engineering from Chang Gung University, Taiwan. Dr. Banerjee has been a visiting scientist at PGI-7, Forschungszentrum Jülich GmbH, Germany, during 20122013 and has led its joint project with Intel Corporation, California, USA, on the development of resistive memory. He was also engaged in the development of nano-crossbar resistive random-access memory (RRAM) devices and their integration with transistors, a project in collaboration with IMEC, Belgium. He has authored and co-authored over 30 publications in reputed international journals and over 50 publications in conference proceedings. His current research interests include the novel high-k nanocrystals; design, fabrication, characterization, and analysis of RRAM, VRRAM, crossbar memory, and storage class memory; and high-density nanoscale 3D memory devices.