This book offers a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), covering time-to-digital converters, noise shaping and more. Includes advice on analysis and simulation techniques, and reusable Matlab code.
This book offers a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), covering time-to-digital converters, noise shaping and more. Includes advice on analysis and simulation techniques, and reusable Matlab code.
This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.
