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Non-Linear Design: FETs and HEMTs Unabridged edition [Kõva köide]

  • Formaat: Hardback, 480 pages, kõrgus x laius: 254x178 mm
  • Ilmumisaeg: 30-Nov-2021
  • Kirjastus: Artech House Publishers
  • ISBN-10: 1630818682
  • ISBN-13: 9781630818685
Teised raamatud teemal:
Non-Linear Design: FETs and HEMTs Unabridged editionSuurem pilt
  • Formaat: Hardback, 480 pages, kõrgus x laius: 254x178 mm
  • Ilmumisaeg: 30-Nov-2021
  • Kirjastus: Artech House Publishers
  • ISBN-10: 1630818682
  • ISBN-13: 9781630818685
Teised raamatud teemal:
Püsilink: https://www.kriso.ee/db/9781630818685.html
Märksõnad:
Despite its continuing popularity, the so-called standard circuit model of compound semiconductor field-effect transistors (FETs) and high electron mobility transistors (HEMTs) is shown to have a limitation for nonlinear analysis and design: it is valid only in the static limit. When the voltages and currents are time-varying, as they must be for these devices to have any practical use, the model progressively fails for higher specification circuits.





This book shows how to reform the standard model to render it fully compliant with the way FETs and HEMTs actually function, thus rendering it valid dynamically. Proof-of-principle is demonstrated for several practical circuits, including a frequency doubler and amplifiers with demanding performance criteria. Methods for extracting both the reformulated model and the standard model are described, including a scheme for re-constructing from S-parameters the bias-dependent dynamic (or RF) I(V) characteristics along which devices work in real-world applications, and as needed for the design of nonlinear circuits using harmonic-balance and time-domain simulators.





The book includes a historical review of how variations on the standard model theme evolved, leading up to one of the most widely used-the Angelov (or Chalmers) model.
Preface xv
Acknowledgments xvii
Introduction xix
Part I
Chapter 1 Introduction
3(16)
1.1 Statement of the Problem
3(2)
1.2 Verifying the Approach in MMIC Design: GaAs FE Ts and HEM Ts [ 2]
5(5)
1.3 Aims of the Present Work
10(3)
1.3.1 Motivation and Practical Application
11(1)
1.3.2 The Physics-to-Circuit Model Construct
11(1)
1.3.3 Applicability
12(1)
1.4 Preview of Results
13(2)
1.5 Organization of the Book
15(1)
1.6 A Note on Figures
16(1)
References
16(3)
Chapter 2 Summary of Approaches and Needs
19(54)
2.1 Why Models Are Important
19(1)
2.2 Types of Nonlinear Models
19(2)
2.3 Desirable Attributes
21(2)
2.4 Behavioral or Black Box Characterization
23(2)
2.5 Properties of Large-Signal Models in More Detail
25(9)
2.5.1 List of Properties
26(3)
2.5.2 The Subthreshold Region
29(1)
2.5.3 Consequences of Fitting Well to Some Features of iD(vGS,vDS) but Not Others
29(2)
2.5.4 Thermal Considerations
31(1)
2.5.5 Construction of the Model from Measurements
32(1)
2.5.6 The Position of Commercial Extractors
32s(1)
2.5.7 FE T Size Considerations
33(1)
2.5.8 Model Openness in Construction and Usability
33(1)
2.5.9 Constraints Placed upon Models by Circuit Simulators
34(1)
2.6 Rauscher and Willing
34(1)
2.7 The Curtice Quadratic Model
35(2)
2.7.1 Expression Used for the Modeling Current
35(1)
2.7.2 Expression Used for the Modeling Capacitance
35(1)
2.7.3 Basis
35(1)
2.7.4 Underlying Soundness
35(1)
2.7.5 Measurements Required
36(1)
2.7.6 Openness of Procedure for Extracting the Model from Measurements
36(1)
2.7.7 Scalability
36(1)
2.7.8 General Comments
36(1)
2.8 The Curtice-Ettenberg Model
37(1)
2.8.1 Expressions Used for Modeling Current
37(1)
2.8.2 Expressions Used for Modeling Capacitance
37(1)
2.8.3 Basis
37(1)
2.8.4 Underlying Soundness
37(1)
2.8.5 Measurements Required
37(1)
2.8.6 Openness of Procedure for Extracting the Model from Measurements
38(1)
2.8.7 Scalability
38(1)
2.9 The Materka-Kacprzak Model
38(2)
2.9.1 Expressions Used for Modeling Current
38(1)
2.9.2 Expressions Used for Modeling Capacitance
38(1)
2.9.3 Basis
38(1)
2.9.4 Underlying Soundness
38(1)
2.9.5 Measurements Required
39(1)
2.9.6 Openness of Procedure for Extracting the Model from Measurements
39(1)
2.9.7 Scalability
39(1)
2.10 An Illustrated Application
40(11)
2.10.1 Current Equation: Modified Materka
40(1)
2.10.2 Capacitance Equations: Use of the Statz Expressions
40(1)
2.10.3 Results
40(11)
2.11 The Statz Model
51(2)
2.11.1 Expressions Used for Modeling Current
51(1)
2.11.2 Expressions Used for Modeling Capacitance
51(1)
2.11.3 Basis
52(1)
2.11.4 Underlying Soundness
52(1)
2.11.5 Measurements Required
52(1)
2.11.6 Openness of Procedure for Extracting the Model from Measurements
53(1)
2.11.7 Scalability
53(1)
2.12 TriQuint Own Model ( TOM)
53(2)
2.12.1 Expressions Used for Modeling Current
53(1)
2.12.2 Expressions Used for Modeling Capacitance
53(1)
2.12.3 Basis
54(1)
2.12.4 Underlying Soundness
54(1)
2.12.5 Measurements Required
54(1)
2.12.6 Openness of Procedure for Extracting the Model from Measurements
55(1)
2.12.7 Scalability
55(1)
2.13 The EEFE T3 Model
55(2)
2.13.1 Basis
55(1)
2.13.2 Underlying Soundness
56(1)
2.13.3 Openness of Procedure for Extracting the Model from Measurements
56(1)
2.14 Other Models Using the Commonplace Equivalent Circuit
57(2)
2.14.1 Dortu-Muller Method
57(1)
2.14.2 Rodrigues- Tellez
58(1)
2.14.3 Tajima
58(1)
2.14.4 University of Cantabria Model
58(1)
2.14.5 University College Dublin Model
58(1)
2.15 The Parker-Skellern Model
59(3)
2.15.1 Shortcomings in Previous Practice
59(1)
2.15.2 Parker's Scheme: Nested Transformations
60(1)
2.15.3 Expressions Used for Modeling Capacitance
61(1)
2.15.4 Basis and Underlying Soundness
61(1)
2.15.5 Measurements Required
62(1)
2.15.6 Openness of Procedure for Extracting the Model from Measurements
62(1)
2.15.7 Scalability
62(1)
2.15.8 General Comments
62(1)
2.16 The Root Model
62(4)
2.16.1 Basis
62(1)
2.16.2 Underlying Soundness
63(1)
2.16.3 Measurements Required
64(1)
2.16.4 Thermal Effects
64(1)
2.16.5 Openness of Procedure for Extracting the Model from Measurements
65(1)
2.16.6 General Comments
65(1)
2.17 The Angelov Model
66(3)
2.17.1 Expression Used for Modeling Current
66(1)
2.17.2 Expression Used for Modeling Capacitance
67(1)
2.17.3 Basis
67(1)
2.17.4 Underlying Soundness
67(1)
2.17.5 Measurements Required
67(1)
2.17.6 Openness of Procedure for Extracting the Model from Measurements
67(1)
2.17.7 Scalability
68(1)
2.17.8 General Comments
68(1)
2.18 Conclusion
69(1)
References
70(3)
Chapter 3 Practical Behavior of FE Ts
73(28)
3.1 dc 1(V), Dynamic I( V), and RF Properties
73(13)
3.1.1 Example Differences Between dc I(V) and Dynamic i(v)
74(6)
3.1.2 Breakdown Different at RF from dc
80(3)
3.1.3 Memory Effects: Surface States, Deep Levels, and Self-Heating
83(1)
3.1.4 S-Parameters: dc Bias and Pulsed Bias
84(1)
3.1.5 Device-to-Device Variations
85(1)
3.2 Bias Dependence of the Elements
86(13)
3.2.1 Common Practice: The Beginning with Rauscher and Willing
86(1)
3.2.2 Fitting to S-Parameters: Examples
87(7)
3.2.3 The Commonplace Model
94(1)
3.2.4 Bias Dependence of the Elements: Examples
95(4)
3.3 τ: A Vital But Overlooked Physical Variable
99(1)
References
100(1)
Chapter 4 The Standard Model: Deriving the Elements
101(32)
4.1 Element Functions Obtained by Fitting: True or Askew?
101(3)
4.2 Neglect of Nonlinear Terms
104(19)
4.2.1 The Problem of Nonlinear Extraction
104(2)
4.2.2 Extracted Versus True Nonlinear Element Functions
106(14)
4.2.3 Consequences for Nonlinear Circuit Simulation
120(3)
4.3 Difficult Cases: Early SiC FE T Example
123(7)
4.4 Improvements Towards a True Nonlinear Model
130(1)
References
131(2)
Chapter 5 The Capacitance Puzzle in the Standard Model
133(8)
5.1 The Form of Cgd and Cds: Fact or Artefact?
133(2)
5.2 The Composition of Cgc
135(3)
5.3 C from g: Deriving Capacitance from Conductance
138(1)
5.4 Standard Model Capacitance in Review
139(1)
References
140(1)
Chapter 6 Dynamic I(V) Measurements
141(16)
6.1 Development of a Desktop Pulsed I(V) Instrument
141(4)
6.2 Operation and Utilization
145(2)
6.3 Memory and Other Effects
147(3)
6.4 Contrariness as a Positive
150(1)
6.5 Contemporary Instrumentation
151(1)
References
152(5)
Part II
Chapter 7 Reformulating the Circuit Model
157(12)
7.1 Introduction
157(1)
7.2 The Core
158(2)
7.3 Charge Flows When VGs Changes
160(1)
7.4 Charge Flows When VD T Changes
161(2)
7.5 Resistive and Ancillary Elements
163(2)
7.6 Voltage Dependence of the Elements
165(1)
7.7 Reduction in the Static State to the Standard Model
165(1)
7.8 Previously Published Versions
166(2)
References
168(1)
Chapter 8 The Importance and Utility of T
169(2)
8.1 Nature and Origin
169(1)
8.2 Pivotal Role in the Reformed Model
169(1)
8.3 Inclusion in Circuit Simulators
170(1)
8.4 X(τ) as a Staple of Device Operation
170(1)
8.5 A Repository of Information on Device Technology
170(1)
References
170(1)
Chapter 9 Extraction
171(10)
9.1 Introduction
171(1)
9.2 Obtaining the Element Functions
171(6)
9.2.1 Obtaining the Standard Model Element Functions: The Fitter
171(2)
9.2.2 Fitting the New Topology Model
173(4)
9.3 Curve Fitting
177(2)
Reference
179(2)
Chapter 10 Obtaining the Current and Capacitance Functions
181(28)
10.1 Current Functions from Pulsed 1(V) Measurements
181(1)
10.2 Dynamic I(V) Reconstructor
182(8)
10.3 Implications for Slow-Rate Transients
190(1)
10.4 Obtaining the Capacitance Functions
191(2)
10.5 Charge Conservation
193(2)
10.6 The Defining Case of VDs = OV
195(1)
10.7 Practical Example of Reformed Model Elements
196(11)
References
207(2)
Chapter 11 Practical Results
209(18)
11.1 Introduction
209(1)
11.2 First Test: Power Compression and Harmonic Generation
210(1)
11.3 A 38 GHz Frequency Doubler
211(1)
11.4 Two-Stage and Three-Stage 500 mW MMIC
212(6)
11.5 Harmonic Load Pull
218(4)
11.6 Memory Effect: Basic Illustration
222(4)
References
226(1)
Chapter 12 Circuit Simulators
227(14)
12.1 Introduction
227(1)
12.2 Implementation in a Harmonic Balance Simulator
227(9)
12.2.1 Particularizing the Model
227(3)
12.2.2 Accommodating τ
230(3)
12.2.3 Run Time and Convergence
233(3)
12.3 Experience with a Time-Domain Simulator
236(1)
12.4 Simulation Prospects
237(1)
References
238(3)
Part III
Chapter 13 Fundamentals of FE T Operation
241(36)
13.1 Introduction
241(2)
13.2 Electron Depletion and Transport
243(5)
13.3 The Space-Charge Layer Extension X
248(3)
13.4 The Flat d Approximation
251(7)
13.5 The Uniform EyX Termination Approximation
258(2)
13.6 Expressions for VGC and VD'G
260(2)
13.7 The d-Lift Principle
262(4)
13.8 The Delay τgm
266(8)
References
274(3)
Chapter 14 Current and Charge Conservation
277(18)
14.1 Channel Current
277(3)
14.2 Transreactance Current
280(1)
14.3 Charge Conservation
281(5)
14.4 Charge Storage by Pure Delay τ
286(4)
14.5 Resistances RS and RI
290(3)
References
293(2)
Chapter 15 Charge Storage
295(20)
15.1 Revisiting Capacitance
295(3)
15.2 When VGS Changes
298(5)
15.2.1 The Overall Picture
298(1)
15.2.2 Branch Capacitance
298(2)
15.2.3 Transcapacitance
300(2)
15.2.4 Branch Charge Storage by Pure Delay
302(1)
15.3 When Vas Changes
303(6)
15.3.1 The Overall Picture
304(1)
15.3.2 Branch Capacitance
304(2)
15.3.3 Transcapacitance
306(2)
15.3.4 Orthogonal Branch Charge Storage by Pure Delay
308(1)
15.4 One Last Visit
309(4)
15.4.1 Reconciliation of the Main Capacitances
309(1)
15.4.2 Wherefore Cds?
310(2)
15.4.3 The True Nature of the Standard Model
312(1)
15.5 Enter the Transit Time
313(1)
References
313(2)
Chapter 16 Macro-Cell Simulators
315(10)
16.1 Introduction
315(2)
16.2 Simulator Requirements
317(1)
16.3 Macro-Cell Solvers
318(3)
16.3.1 The Macro-Cell Idea
318(1)
16.3.2 Construction
319(1)
16.3.3 Choosing the Cells
320(1)
16.3.4 Below-the-Knee Realism
321(1)
16.3.5 Deconfinement of Hot Electrons
321(1)
16.4 The PHEM T Macro-Cell Solver
321(1)
16.5 Applications and Limitations
322(1)
References
323(2)
Chapter 17 Conclusions
325(4)
Acronyms and Abbreviations 329(2)
List of Symbols 331(4)
About the Author 335(2)
Index 337