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Parameter Extraction and Complex Nonlinear Transistor Models Unabridged edition [Kõva köide]

  • Formaat: Hardback, 610 pages, kõrgus x laius: 254x178 mm
  • Ilmumisaeg: 31-Dec-2019
  • Kirjastus: Artech House Publishers
  • ISBN-10: 1630817449
  • ISBN-13: 9781630817442
Teised raamatud teemal:
Parameter Extraction and Complex Nonlinear Transistor Models Unabridged editionSuurem pilt
  • Formaat: Hardback, 610 pages, kõrgus x laius: 254x178 mm
  • Ilmumisaeg: 31-Dec-2019
  • Kirjastus: Artech House Publishers
  • ISBN-10: 1630817449
  • ISBN-13: 9781630817442
Teised raamatud teemal:
Püsilink: https://www.kriso.ee/db/9781630817442.html
Märksõnad:
All model parameters are fundamentally coupled together, so that directly measured individual parameters, although widely used and accepted, may initially only serve as good estimates. This comprehensive resource presents all aspects concerning the modeling of semiconductor field-effect device parameters based on gallium-arsenide (GaAs) and gallium nitride (GaN) technology. Metal-semiconductor field-effect transistors (MESFETs), high electron mobility transistors (HEMTs) and heterojunction bipolar transistors (HBTs), their structures and functions, and existing transistor models are also classified. The Shockley model is presented in order to give insight into semiconductor field-effect transistor (FET) device physics and explain the relationship between geometric and material parameters and device performance.

Extraction of trapping and thermal time constants is discussed. A special section is devoted to standard nonlinear FET models applied to large-signal measurements, including static-/pulsed-DC and single-/two-tone stimulation. High power measurement setups for signal waveform measurement, wideband source-/load-pull measurement (including envelope source-/load pull) are also included, along with high-power intermodulation distortion (IMD) measurement setup (including envelope load-pull). Written by a world-renowned expert in the field, this book is the first to cover of all aspects of semiconductor FET device modeling in a single volume.
Preface xix
Chapter 1 Introduction 1(8)
References
6(3)
Chapter 2 Transistor Concepts: MESFET, HEMT, and HBT 9(18)
2.1 Introduction
9(1)
2.2 Evolution of FET Devices
9(5)
2.2.1 Field-Effect Transistors
9(4)
2.2.2 Heterojunction Bipolar Transistors
13(1)
2.3 Basic Device Structures and Functioning
14(10)
2.3.1 MESFET
14(4)
2.3.2 HEMT
18(3)
2.3.3 HBT
21(3)
2.4 Summary
24(1)
References
24(3)
Chapter 3 Classification of Transistor Models 27(10)
3.1 Introduction
27(1)
3.2 Physical Models
27(3)
3.2.1 Numerical Physical Models
28(1)
3.2.2 Analytical Physical Models
29(1)
3.3 Empirical Models
30(1)
3.4 Experimental Models
31(1)
3.5 Behavioral Models
32(1)
3.5.1 ANN-Based Models
33(1)
3.5.2 X-Parameter-Based Models
33(1)
3.6 Summary
33(1)
References
34(3)
Chapter 4 Classical Shockley Model and Enhanced Modifications 37(24)
4.1 Introduction
37(1)
4.2 Long-Channel (Shockley) Model
37(7)
4.3 Experimental and Analytical v(E)-Characteristics
44(3)
4.4 Improved Shockley Model Including Carrier Velocity Saturation
47(1)
4.5 Two-Region Model
48(3)
4.6 Short-Channel Saturation Model
51(1)
4.7 Relationships between MESFET and HEMT DC Characteristics
52(4)
4.7.1 Transconductance
52(2)
4.7.2 Gate-Source Capacitance
54(2)
4.7.3 MESFET and HEMT Transconductance Comparison
56(1)
4.8 Problems and Solutions
56(3)
4.9 Summary
59(1)
References
59(2)
Chapter 5 Extrinsic Transistor Network at DC 61(6)
5.1 Introduction
61(1)
5.2 Intrinsic Control Voltages from Resistive Network De-Embedding
61(2)
5.3 Regridding of Nonorthogonal Intrinsic Voltages
63(1)
5.4 Regridding Issues with MATLAB®
64(2)
5.5 Summary
66(1)
References
66(1)
Chapter 6 Estimation of Model Element Values Based on Device Physical Data 67(32)
6.1 Introduction
67(1)
6.2 Resistances
67(14)
6.2.1 Ohmic Contact Resistance
68(3)
6.2.2 Series Resistances
71(2)
6.2.3 Gate Resistance, Gate Inductance
73(5)
6.2.4 Gate Charging Resistance
78(3)
6.3 Conductances
81(5)
6.3.1 Transconductance
82(3)
6.3.2 Channel Conductance
85(1)
6.4 Capacitances
86(4)
6.4.1 Gate-Source Capacitance
86(1)
6.4.2 Gate-Drain Capacitance
87(2)
6.4.3 Drain-Source Capacitance
89(1)
6.5 Delay Time
90(1)
6.6 Contact and Interconnect Structures
90(5)
6.6.1 Device Contacting Pads
90(1)
6.6.2 Bondwire Inductance
91(2)
6.6.3 Via Hole Inductance
93(1)
6.6.4 Air Bridge
93(1)
6.6.5 Field Plate
94(1)
6.7 Summary
95(1)
References
95(4)
Chapter 7 Small-Signal Transistor Model Complexity 99(14)
7.1 Introduction
99(1)
7.2 Small-Signal Transistor Operation
100(3)
7.2.1 Two-Port Y-Matrix Transistor Model
102(1)
7.2.2 Generic Extrinsic Transistor Pi-Model
102(1)
7.3 Transistor Model Complexity
103(7)
7.3.1 Small-Periphery Devices
105(2)
7.3.2 Large-Periphery Devices
107(1)
7.3.3 High-Resistivity Silicon Substrates
108(2)
7.4 Summary
110(1)
References
110(3)
Chapter 8 Reliable Parameter Estimates from Low-Frequency Measurements 113(10)
8.1 Introduction
113(1)
8.2 Determination of Generic Pi-Model Parameters
113(3)
8.2.1 Generic Transconductance and Output Conductance
113(2)
8.2.2 Generic Capacitances
115(1)
8.3 Relations between Generic and Physics-Based Parameters
116(1)
8.4 Approximate Determination of Physics-Based Intrinsic Elements from Generic Parameters
117(2)
8.4.1 Output Conductance Gds
117(1)
8.4.2 Transconductance Gm
118(1)
8.4.3 Gate-Source Capacitance Cgs
118(1)
8.4.4 Gate-Drain Capacitance Cgd
118(1)
8.4.5 Drain-Source Capacitance Cds
118(1)
8.5 Estimation of Physics-Based Parameters from Low-Frequency S-Parameters
119(2)
8.6 Summary
121(1)
References
121(2)
Chapter 9 Static-/Pulsed-DC Measurements for the Analysis of Thermal and Trapping Effects 123(22)
9.1 Static-DC Measurements
123(3)
9.1.1 Principal DC IV Characteristics and Definitions
123(1)
9.1.2 Measured DC IV Characteristics
124(2)
9.1.3 Thermal Resistance from DC Measurements
126(1)
9.2 Pulsed-DC Measurements
126(8)
9.2.1 Implementation of Measurements
127(1)
9.2.2 Instability Stabilization Techniques
128(3)
9.2.3 Choice of Quiescent Bias Points
131(2)
9.2.4 Self-Heating Effects
133(1)
9.3 Thermal Resistance Extraction
134(2)
9.3.1 Pulsed-DC IV Isothermal Curves Overlapping
134(1)
9.3.2 Pulsed-DC IV and Static-DC Crossing
135(1)
9.4 Transients
136(2)
9.4.1 Thermal Time Constants
137(1)
9.4.2 Trapping Time Constants
138(1)
9.5 Thermal Model
138(2)
9.6 Trapping Subcircuit
140(1)
9.7 Summary
141(1)
References
141(4)
Chapter 10 Vector Network Analyzer: Operation Principle and Error Models 145(12)
10.1 Introduction
145(1)
10.2 Evolution of the Vector Network Analyzer
145(2)
10.3 Vector Network Analyzer Construction and Operation
147(3)
10.4 Error-Corrected Measurements
150(5)
10.4.1 Error Models
153(1)
10.4.2 Calibration
154(1)
10.5 Summary
155(1)
References
155(2)
Chapter 11 Uncertainties in the Device Modeling Process 157(22)
11.1 Introduction
157(1)
11.2 Definition of Measurement Terms
157(6)
11.2.1 Uncertainty
157(2)
11.2.2 Measurement Errors
159(1)
11.2.3 System Calibration
160(1)
11.2.4 Accuracy
161(1)
11.2.5 Precision
161(1)
11.2.6 Repeatibility
161(1)
11.2.7 Reproducibility
161(1)
11.2.8 Reliability
162(1)
11.2.9 Validity
162(1)
11.2.10 Blunders
163(1)
11.3 Accurate Measurements: A Key Condition for Successful Device Modeling
163(10)
11.3.1 Importance of Diligent System Calibration
164(5)
11.3.2 Device Measurement Analysis Issues
169(2)
11.3.3 Choice of Model Topology Complexity
171(1)
11.3.4 Challenges in the Parameter Extraction Process
171(1)
11.3.5 Challenges of Consistency in Device Modeling
172(1)
11.3.6 Model Implementation into Circuit Simulator
173(1)
11.4 Extraction Strategy Recommendations
173(2)
11.4.1 Check of Measured Data
174(1)
11.4.2 Choice of Topology
174(1)
11.4.3 Choice of Extraction Algorithm
174(1)
11.5 Summary
175(1)
References
175(4)
Chapter 12 Optimization Methods for Model Parameter Extraction 179(40)
12.1 Introduction
179(1)
12.2 Local Minimum Problem
180(1)
12.3 Optimization Strategies
181(2)
12.4 Descent Methods
183(5)
12.4.1 Steepest Descent Method
184(2)
12.4.2 Newton's Method
186(1)
12.4.3 Davidon-Fletcher-Powell Method
187(1)
12.5 Nonlinear Least-Squares Data Fitting
188(3)
12.5.1 Gauss-Newton Method
188(2)
12.5.2 Levenberg-Marquardt Method
190(1)
12.6 Direct Search Methods
191(5)
12.6.1 Hook-Jeeves
191(1)
12.6.2 Simplex
192(4)
12.7 Global Optimization
196(14)
12.7.1 Multistart Methods
197(1)
12.7.2 Genetic Algorithm
198(2)
12.7.3 Simulated Annealing
200(4)
12.7.4 Tree Annealing
204(3)
12.7.5 Leaping Simplex
207(3)
12.8 Hybrid Optimizer
210(2)
12.9 Summary
212(1)
References
212(7)
Chapter 13 Extraction Methods: An Overview 219(4)
Chapter 14 All-at-once Model Parameter Extraction 223(14)
14.1 Introduction
223(1)
14.2 Random Search Combined with Local Optimizer
223(6)
14.2.1 Measurement Bandwidth Variation
227(1)
14.2.2 Measurement Error Simulation
228(1)
14.3 Search Space Minimization
229(1)
14.4 Reduction of Optimization Variables
230(3)
14.4.1 Interrelation of Intrinsic and Extrinsic Model Elements
230(2)
14.4.2 Gate Resistance Allocation to the Intrinsic Elements
232(1)
14.5 Linear Relationship among Series Resistances
233(1)
14.6 Summary
234(2)
References
236(1)
Chapter 15 Decomposition-Based Extraction Methods 237(16)
15.1 Introduction
237(1)
15.2 Empirical Decomposition
237(3)
15.3 Automatic Decomposition Based on Sensitivity Analysis
240(11)
15.3.1 Principal-Component Sensitivity Analysis
241(1)
15.3.2 Sensitivity Analysis by Hessian Matrix Diagonalization
242(3)
15.3.3 Scaling of Variables for Condition Number Adjustment
245(1)
15.3.4 Decomposed Optimization in Transformed Model Space
245(1)
15.3.5 Decomposed Optimization of Individual Parameters
246(5)
15.4 Summary
251(1)
References
251(2)
Chapter 16 Bidirectional Search Method 253(22)
16.1 Introduction
253(1)
16.2 Bidirectional Search Strategy
254(2)
16.3 Definition of Object Function
256(3)
16.3.1 Extrinsic Data Fitting
257(1)
16.3.2 Intrinsic Data Fitting
257(2)
16.4 Bidirectional Search Operation
259(3)
16.4.1 Starting Vector Analysis at Pinch-off
260(1)
16.4.2 Default Starting Vector
261(1)
16.5 Multibias Extraction
262(9)
16.5.1 Three-Bias Measurement and Simulation
265(1)
16.5.2 Extracted Model Parameters
266(3)
16.5.3 Confidence Limits on Extracted Parameters
269(2)
16.6 Repeatibility and Reproducibility Confirmation Test
271(1)
16.7 Summary
272(1)
References
272(3)
Chapter 17 Pure Analytical Model Parameter Extraction 275(20)
17.1 Introduction
275(1)
17.2 Theoretical Analysis
276(12)
17.2.1 Determination of Extrinsic Capacitances and Inductances
278(6)
17.2.2 Conditioning of Equation System for the10-Element Model
284(2)
17.2.3 Iterative Determination of Intrinsic Model Elements
286(2)
17.3 Frequency Bandwidth Dependent Extraction Accuracy
288(1)
17.4 Simulated Measurement Error Dependent Extraction Accuracy
288(2)
17.5 Measurement-based Analytical Model Parameter Extraction
290(3)
17.6 Summary
293(1)
References
293(2)
Chapter 18 Analytical Model Parameter Extraction Using Rational Functions 295(14)
18.1 Introduction
295(1)
18.2 Rational Functions-based Model Parameter Extraction
296(10)
18.2.1 Least-Squares Approximation by Rational Functions
296(1)
18.2.2 Extrinsic and Intrinsic Y-Parameters
297(3)
18.2.3 Direct Model Parameter Extraction
300(4)
18.2.4 Results
304(2)
18.3 Distributed Small-signal Model of HBT Device
306(1)
18.4 Summary
307(1)
References
308(1)
Chapter 19 Repetitive Random Optimization and and Adaptive Search Space 309(16)
19.1 Introduction
309(2)
19.2 Starting Values
311(7)
19.2.1 Effective Capacitances
311(3)
19.2.2 Effective Inductances
314(2)
19.2.3 Distributed Model Elements
316(2)
19.3 Adaptive Search Space Algorithm
318(1)
19.4 Results: Mathematical Versus Physics-based Solution
318(5)
19.5 Summary
323(1)
References
324(1)
Chapter 20 Bias-Dependence of Source and Drain Resistances 325(18)
20.1 Introduction
325(1)
20.2 Bias-Dependent Versus Bias-Independent Series Resistances
325(4)
20.3 Practical Experiences in the Extraction of Series Resistances of GaAs FETs
329(7)
20.3.1 Frequency Scanning Extraction Method
331(1)
20.3.2 Extracted Bias-Dependent Source Resistances
332(4)
20.4 Bias-Dependent Access Resistances in GaN HEMTs
336(2)
20.5 Frequency- and Temperature Dependence of Series Resistances
338(1)
20.6 Summary
339(1)
References
340(3)
Chapter 21 Model Parameter Extraction with Measurement-Correlated Parameter Starting Values 343(60)
21.1 Introduction
343(1)
21.2 Model Parameter Extraction Conditions
344(1)
21.2.1 Heuristically Defined Capacitance Ratio Values
344(13)
21.2.2 Reliable Determination of Capacitance Ratio Values from Top-View Device Images
346(5)
21.2.3 Definition of Pinch-Off Voltage
351(1)
21.2.4 Definition of Minimum Measurement Range
352(2)
21.2.5 Definition of Object Function
354(3)
21.3 Concept of Measurement-Correlated Starting Value Generation
357(7)
21.3.1 Description of the Extraction Algorithm
358(2)
21.3.2 Determination of Series Impedances at Pinch-Off
360(2)
21.3.3 Error Analysis
362(2)
21.4 Estimation of Total Branch Capacitances from Low-frequency Measurements
364(1)
21.5 Estimation of Distributed Capacitances
365(4)
21.6 Estimation of Inductances by Linear Curve Fitting
369(1)
21.7 Closed-Form Analytical Determination of Inductances
369(7)
21.7.1 Measurement-like S-Parameters Based on VNA Uncertainty Specifications
372(2)
21.7.2 Validation of Inductance Determination Based on Noisy S-Parameters
374(2)
21.8 Estimation of Resistances
376(7)
21.8.1 Cold Pinch-Off Measurement
376(1)
21.8.2 Cold Forward Measurement
377(1)
21.8.3 Standard Cold Reverse Measurement
378(1)
21.8.4 Modified Cold Reverse Measurement
378(5)
21.9 Model Parameter Extraction with Measured S-Parameters
383(6)
21.9.1 Extraction Based on Linear Curve Fitting of Inductances
384(4)
21.9.2 Extraction Based on Analytical Determination of Inductances
388(1)
21.10 Determination of Intrinsic Model Parameters
389(5)
21.11 Small-Signal Model Verification
394(2)
21.12 Summary
396(2)
References
398(5)
Chapter 22 Basics of Nonlinear FET Modeling 403(18)
22.1 Terms and Definitions
403(4)
22.1.1 Types of Model Elements in Equivalent Circuits
403(1)
22.1.2 Quasi-Static Assumption
404(1)
22.1.3 Definition of Voltages
405(1)
22.1.4 Modes of Operation
405(2)
22.2 Nonlinear Equivalent Circuit Elements
407(1)
22.3 Nonlinear Model Conductance
408(6)
22.3.1 Single-Controlled Model Conductance
408(4)
22.3.2 Multicontrolled Model Conductance
412(2)
22.4 Nonlinear Model Capacitance
414(5)
22.4.1 Single-Controlled Model Capacitance
414(3)
22.4.2 Multicontrolled Model Capacitance
417(2)
22.5 Summary
419(1)
References
419(2)
Chapter 23 Non-Quasi-Static Transistor Model 421(32)
23.1 Introduction
421(1)
23.2 Transistor Behavioral Model
422(3)
23.2.1 Nonlinear N-Port
422(2)
23.2.2 Nonlinear Two-Port
424(1)
23.3 Quasi-Static Transistor Model
425(5)
23.3.1 Symmetric Equivalent Pi-Network
427(1)
23.3.2 Asymmetric Equivalent Pi-Network
428(2)
23.4 Dispersive Drain Current Model
430(7)
23.4.1 Drain Current Source With Bias-Dependent Conductances
431(4)
23.4.2 Gate Charging Resistance
435(2)
23.5 Electrothermal Drain Current Modeling
437(5)
23.5.1 Pulsed-DC Related Drain Current Model
438(1)
23.5.2 Transistor Thermal Model
439(3)
23.6 Extraction of Electrothermal Drain Current Model
442(5)
23.6.1 Extraction of Isothermal Drain Current and Trapping Correction Functions
443(1)
23.6.2 Extraction of Thermal Parameters fth and fp
444(3)
23.7 Extraction of Trapping and Thermal Time Constants
447(2)
23.8 Summary
449(1)
References
450(3)
Chapter 24 Large-Signal Measurement Techniques for Device Characterization and Model Verification 453(48)
24.1 Overview of Large-Signal Measurement Methods
453(1)
24.2 Evolution of Combined Frequency-/Time-Domain Signal-Waveform Measurement
454(15)
24.2.1 Pure Signal Waveform Measurement
454(4)
24.2.2 Fundamental Active Load-Pull Measurement
458(5)
24.2.3 Harmonic Load-Pull Measurement with Electronic Tuner
463(6)
24.3 Overview of High-Power Wideband Source-/Load Pull Measurement Techniques
469(2)
24.3.1 Setup Costs for High-Power Large-Signal Measurements
469(1)
24.3.2 Advanced Signal Waveform Measurement Concepts for Wideband Applications
470(1)
24.4 High-Power Time-Domain Source-/Load-Pull Measurement Setups
471(10)
24.4.1 High-Power Harmonic Source-/Load-Pull System with Passive Envelope Tuning
471(1)
24.4.2 Issues Arising with Wideband Load-Pull Terminations
471(6)
24.4.3 100W Broadband Passive Harmonic and Envelope Source-/Load-Pull System
477(4)
24.5 High-Power Frequency-Domain IMD Measurement System Including Envelope Load-Pull
481(14)
24.5.1 System Description
481(1)
24.5.2 Envelope and RF Bias Networks
482(4)
24.5.3 Issues in IMD Measurement Arising with Setup Configuration
486(2)
24.5.4 System Calibration
488(3)
24.5.5 Pou,-PAE-IMD Load-Pull Optimization
491(2)
24.5.6 Sweet-Spot Measurement
493(2)
24.6 Summary
495(1)
References
496(5)
Chapter 25 Popular Nonlinear FET Models: Capabilities and Limitations 501(30)
25.1 Widely Used 15-Element Small-Signal Equivalent Circuit
502(5)
25.1.1 Extraction of Pad Capacitances Cpg and Cpd
503(1)
25.1.2 Extraction of Parasitic Resistances and Inductances
504(1)
25.1.3 Intrinsic Bias-Dependent Model Elements
504(3)
25.2 Popular Nonlinear FET Models
507(12)
25.2.1 Curtice Quadratic Nonlinear Model (1980)
507(1)
25.2.2 Curtice-Ettenberg Cubic Nonlinear Model (1985)
508(1)
25.2.3 Materka-Kacprzak Model (1983, 1985)
509(1)
25.2.4 Statz Model (1987)
510(3)
25.2.5 Angelov Model (1992/96)
513(2)
25.2.6 TOM Model (TriQuint Nonlinear Model) (1990)
515(1)
25.2.7 Tajima Model (1981/84)
516(1)
25.2.8 Root Model (1991)
517(1)
25.2.9 TOPAS Model (1996)
518(1)
25.3 Model Implementation in Commercial Simulation Software
519(2)
25.3.1 Implementation of Analytical Models
519(2)
25.3.2 Implementation of Table-Based Models
521(1)
25.4 Simulation Results
521(5)
25.4.1 Static-DC Simulations
521(2)
25.4.2 Pulsed-DC Simulations
523(1)
25.4.3 Single-Tone Input Power Sweep
523(2)
25.4.4 Two-Tone Input Power Sweep
525(1)
25.5 Summary
526(2)
References
528(3)
Chapter 26 Nonlinear Transistor Model Verification 531(10)
26.1 Complete Large-Signal Device Model
533(1)
26.2 Model Implementation
533(2)
26.3 Simulation and Comparison with Measured Device Data
535(4)
26.3.1 Simulation of Bias-Dependent S-Parameters
535(1)
26.3.2 Simulation of Pulsed-DC IV Characteristics
536(1)
26.3.3 Simulation of Single- and Two-Tone Device Response
537(2)
26.4 Summary
539(1)
References
540(1)
Appendix A Generic Two-Port Matrix Transistor Model 541(2)
Appendix B Direct Measurement of Series Resistances 543(8)
B.1 Introduction
543(1)
B.2 DC Method after Williams
543(1)
B.3 DC Method after Fukui
544(3)
B.4 RF Method after Dambrine et al.
547(2)
B.5 Comparative Experimental Results
549(1)
References
550(1)
Appendix C Parameter Extraction Relations for Inner FET Branch Topologies 551(6)
C.1 R-L-C Series Circuit
551(2)
C.2 R-C Series Circuit
553(1)
C.3 G-C Parallel Circuit
554(1)
C.4 R2-C Parallel Circuit Series-Connected to R1
554
C.5 Voltage Controlled Current Source
551(6)
Appendix D Embedding the Intrinsic Model into an Extrinsic Network 557(4)
D.1 Embedding into an Impedance Network
557(1)
D.2 Embedding into an Admittance Network
558(1)
Appendix E Derivation of Riccati Equation
559(2)
Appendix F General N-Port and Two-Port Admitance Matrix 561(4)
About the Author 565(2)
Index 567