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PIC16F1847 Microcontroller-Based Programmable Logic Controller, Three Volume Set [Multiple-component retail product]

(Department of Electrical and Electronics Engineering, Meliksah University in Kayseri, Turkey (Retired))
  • Formaat: Multiple-component retail product, 1224 pages, kõrgus x laius: 234x156 mm, kaal: 2420 g, 1231 Illustrations, black and white, Contains 3 hardbacks
  • Ilmumisaeg: 23-Oct-2020
  • Kirjastus: CRC Press
  • ISBN-10: 036750653X
  • ISBN-13: 9780367506537
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  • Multiple-component retail product
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PIC16F1847 Microcontroller-Based Programmable Logic Controller, Three Volume SetSuurem pilt
  • Formaat: Multiple-component retail product, 1224 pages, kõrgus x laius: 234x156 mm, kaal: 2420 g, 1231 Illustrations, black and white, Contains 3 hardbacks
  • Ilmumisaeg: 23-Oct-2020
  • Kirjastus: CRC Press
  • ISBN-10: 036750653X
  • ISBN-13: 9780367506537
Teised raamatud teemal:
Püsilink: https://www.kriso.ee/db/9780367506537.html
Märksõnad:
Programmable logic controllers (PLCs) have been used extensively and are offered in terms of functions, program memories, and the number of inputs/outputs (I/Os), ranging from a few to thousands. With a focus on how to design and implement a PLC, this set explains hardware and associated basic concepts, intermediary and advanced concepts of PLC (using PIC16F1847 microcontroller). Flowcharts are provided to help the understanding of macros (instructions). Twenty application examples to show how to use the PIC16F1847-Based PLC in different control applications, related files for hardware and software components, and appendices are also provided. Aimed at researchers and graduate students in electrical engineering, power electronics, robotics and automation, sensors, this book:











Explains how to design and use a PIC16F1847 microcontroller-based PLC including easy to use software structures.





Covers concepts like Contact and Relay Based Macros, Flip-Flop Macros, Timer Macros, Counter Macros and Comparison Macros.





Presents arithmetical and logical macros to carry out arithmetical and logical operations to be used for 8-bit or 16-bit variables and/or constant values.





Illustrates program control macros to enable or disable a block of PLC program or to move execution of a program from one place to another.





Discusses the implementation of Sequential Function Chart (SFC) elements with up to 24 steps.
Prologue xiii
Preface xv
Author xvii
Background and Use of the Book xix
Chapter 1 Program Control Macros
1(40)
Introduction
1(1)
1.1 Jump Instructions
1(1)
1.2 Macro "jump" (Jump to Label)
2(1)
1.3 Macro "jumpN" (Jump to Label)
3(1)
1.4 Macro "jmp_lst_2" (Jump to One of Two Labels)
3(1)
1.5 Macro "jmp_lst_4" (Jump to One of Four Labels)
4(2)
1.6 Macro "jmp_lst_8" (Jump to One of Eight Labels)
6(2)
1.7 Macro "call.SR" (Call Subroutine)
8(3)
1.8 Macro "return_SR" (Return from Subroutine)
11(1)
1.9 Macro "FOR" (Beginning of FOR-NEXT Loop)
12(3)
1.10 Macro "NEXT" (End of FOR-NEXT Loop)
15(1)
1.11 Macro "clear_WDT" (Clear the Watchdog Timer)
16(1)
1.12 Implementation of Master Control Relay (MCR)
17(1)
1.13 Examples for Program Control Macros
18(22)
1.13.1 Example 1.1
19(1)
1.13.2 Example 1.2
20(1)
1.13.3 Example 1.3
21(2)
1.13.4 Example 1.4
23(2)
1.13.5 Example 1.5
25(1)
1.13.6 Example 1.6
26(2)
1.13.7 Example 1.7
28(3)
1.13.8 Example 1.8
31(3)
1.13.9 Example 1.9
34(2)
1.13.10 Example 1.10
36(3)
1.13.11 Example 1.11
39(1)
References
40(1)
Chapter 2 High Speed Counter and PWM Macros
41(110)
Introduction
41(1)
2.1 High Speed Counter (HSC) Instruction
41(9)
2.2 PWM Overview
50(1)
2.3 Using Standard PWM Functions
51(2)
2.3.1 Timer2/4/6 Timer Resource
51(1)
2.3.2 PWM Period
51(1)
2.3.3 PWM Duty Cycle
52(1)
2.3.4 PWM Resolution
52(1)
2.4 Macro "PWM_RA4v" (A Standard PWM Operation with a Variable Duty Cycle Using the RA4 Pin)
53(2)
2.5 Macro "PWM_RA4c" (A Standard PWM Operation with a Fixed Duty Cycle Using the RA4 Pin)
55(6)
2.6 Macro "PWM_RA7v" (A Standard PWM Operation with a Variable Duty Cycle Using the RA7 Pin)
61(3)
2.7 Macro "PWM_RA7c" (A Standard PWM Operation with a Fixed Duty Cycle Using the RA7 Pin)
64(8)
2.8 Some Control Circuits for the Brushed DC Motor
72(23)
2.8.1 Basic Control of the Brushed DC Motor
74(1)
2.8.2 Implementation of ON-OFF or PWM Control for a Brushed DC Motor
74(4)
2.8.3 Control of the Brushed DC Motor in Both Forward and Reverse Directions with an H-Bridge Circuit
78(5)
2.8.4 Speed Control of Brushed DC Motors in an H-Bridge with PWM
83(1)
2.8.5 A Relay-Based H-Bridge Circuit for the Control of Brushed DC Motors
84(11)
2.9 Examples for High Speed Counter and PWM Macros
95(54)
2.9.1 Example 2.1
101(2)
2.9.2 Example 2.2
103(2)
2.9.3 Example 2.3
105(6)
2.9.4 Example 2.4
111(2)
2.9.5 Example 2.5
113(6)
2.9.6 Example 2.6
119(2)
2.9.7 Example 2.7
121(8)
2.9.8 Example 2.8
129(3)
2.9.9 Example 2.9
132(4)
2.9.10 Example 2.10
136(7)
2.9.11 Example 2.11
143(6)
References
149(2)
Chapter 3 Memory-Related Macros
151(112)
Introduction
151(1)
3.1 Memory Organization of the PIC16F1847 Microcontroller
152(3)
3.1.1 Flash Program Memory Organization
152(1)
3.1.2 Data SRAM Organization
153(2)
3.2 Introduction to Memory Read/Write Operations
155(4)
3.3 Macro "sram_read" (Read 1 Byte from SRAM)
159(5)
3.4 Macro "eeprom_read" (Read One Byte from EEPROM to SRAM)
164(2)
3.5 Macro "copy_eeprom_to_sram" (Copy N Bytes from EEPROM to SRAM)
166(1)
3.6 Macro "eeprom_write" (Write 1 Byte from SRAM to EEPROM)
167(4)
3.7 Macro "write_sram_to_eeprom" (Write N Bytes from SRAM to EEPROM)
171(2)
3.8 Macro "prg_mem_read" (Read 1 Word from Flash Program Memory)
173(2)
3.9 Macro "copy_prgmem_to_sram" (Copy N Bytes from Flash Program Memory to SRAM)
175(4)
3.10 Macro "prg_mem_erase" (Erase N Rows of Flash Program Memory)
179(1)
3.11 Macro "write_B_sram_to_prgmem" (Write Bytes from SRAM to Flash Program Memory)
180(2)
3.12 Macro "write_W_sram_to_prgmem" (Write Words from SRAM to Flash Program Memory)
182(3)
3.13 Macro "fill_sram_N80" (Fill up to 80 Variables with Values in a Bank)
185(1)
3.14 Macro "fill_sram_N255" (Fill up to 255 Variables with Values in SRAM)
186(4)
3.15 Examples for Memory-Related Macros
190(71)
3.15.1 Example 3.1
197(1)
3.15.2 Example 3.2
198(4)
3.15.3 Example 3.3
202(3)
3.15.4 Example 3.4
205(2)
3.15.5 Example 3.5
207(3)
3.15.6 Example 3.6
210(4)
3.15.7 Example 3.7
214(6)
3.15.8 Example 3.8
220(6)
3.15.9 Example 3.9
226(3)
3.15.10 Example 3.10
229(2)
3.15.11 Example 3.11
231(12)
3.15.12 Example 3.12
243(6)
3.15.13 Example 3.13
249(5)
3.15.14 Example 3.14
254(7)
Reference
261(2)
Chapter 4 Drum Sequencer Instruction
263(106)
Introduction
263(1)
4.1 Implementation of the Drum Sequencer Instruction
264(13)
4.2 Examples for the Drum Sequencer Instruction
277(90)
4.2.1 Example 4.1
280(16)
4.2.2 Example 4.2
296(13)
4.2.3 Example 4.3
309(13)
4.2.4 Example 4.4
322(19)
4.2.5 Example 4.5
341(17)
4.2.6 Example 4.6
358(9)
References
367(2)
Chapter 5 Sequential Function Charts
369(1)
Introduction
369(1)
5.1 Introduction to SFC
369(18)
5.1.1 Steps
370(1)
5.1.2 Transitions
370(3)
5.1.3 SFC Evolution Rules
373(9)
5.1.4 Actions
382(1)
5.1.5 Action Qualifiers
383(1)
5.1.6 Action Control
383(4)
5.2 Implementation of SFC Elements
387(164)
5.2.1 Macro "step_timer"
393(3)
5.2.2 Sequence Evolution Examples
396(1)
5.2.2.1 Example 5.1--Single-Sequence SFC Example
397(11)
5.2.2.2 Example 5.2--Divergence of Sequence with Left to Right Priority and Convergence of Sequence Example
408(5)
5.2.2.3 Example 5.3--Divergence of Sequence with Numbered Branches and Convergence of Sequence Example
413(4)
5.2.2.4 Example 5.4--Divergence of Sequence with Mutual Exclusion and Convergence of Sequence Example
417(7)
5.2.2.5 Example 5.5--Simultaneous Divergence after a Single Transition and Simultaneous Convergence before a Single Transition Example
424(5)
5.2.2.6 Example 5.6--Sequence Loop and Sequence Skip Example
429(4)
5.2.2.7 Example 5.7--Simultaneous Divergence after a Sequence Selection Convergence and Simultaneous Convergence before a Sequence Selection Divergence Example
433(6)
5.2.3 Actions and Their Implementation
439(1)
5.2.3.1 Example 5.8--An SFC Example Used in the Explanation of Actions
439(7)
5.2.3.2 Macro "action_N" (Non-Stored Action)
446(2)
5.2.3.3 Example 5.9--An SFC Example with Non-Stored Actions
448(3)
5.2.3.4 Macro "action_S" (Stored Action)
451(3)
5.2.3.5 Example 5.10--An SFC Example with Stored and Reset Actions
454(2)
5.2.3.6 Macro "action_L" (Time-Limited Action)
456(5)
5.2.3.7 Example 5.11--An SFC Example with Time-Limited Actions
461(4)
5.2.3.8 Macro "action_D" (Time-Delayed Action)
465(4)
5.2.3.9 Example 5.12--An SFC Example with Time-Delayed Actions
469(4)
5.2.3.10 Macro "action_SD" (Stored and Time-Delayed Action)
473(5)
5.2.3.11 Example 5.13--An SFC Example with Stored and Time-Delayed Actions
478(4)
5.2.3.12 Macro "action_DS" (Time-Delayed and Stored Action)
482(6)
5.2.3.13 Example 5.14--An SFC Example with Time-Delayed and Stored Actions
488(2)
5.2.3.14 Macro "action_SL" (Stored and Time-Limited Action)
490(7)
5.2.3.15 Example 5.15--An SFC Example with Stored and Time-Limited Actions
497(2)
5.2.3.16 Macro "action_Pl" (Pulse [ Rising Edge] Action)
499(2)
5.2.3.17 Example 5.16--An SFC Example with Pulse (Rising Edge) Actions
501(2)
5.2.3.18 Macro "action_P0" (Pulse [ Falling Edge] Action)
503(1)
5.2.3.19 Example 5.17--An SFC Example with Pulse (Falling Edge) Actions
503(4)
5.2.3.20 Macro "ACTION_CONTROL" (Action Control Function Block)
507(5)
5.2.3.21 Example 5.18--An Example with ACTION.CONTROL Function Blocks
512(5)
5.2.3.22 Macro "F_5_in_MTOAI" (More Than One Active Input Function with Five Inputs)
517(1)
5.2.3.23 Example 5.19--An Example with the F_5_in_MTOAI Macro
517(1)
5.2.3.24 Macro "ACTION_CONTROL_w_ Error" (Action Control with Error Output Function Block)
517(8)
5.2.3.25 Example 5.20--An Example with ACTION_CONTROL_w_Error Function Block
525(4)
5.2.3.26 Example 5.21--Direct Implementation of Action Control Function Block with Error Output
529(5)
5.2.3.27 Example 5.22--Direct Implementation of Action Control with a Few Action Qualifiers
534(3)
5.2.3.28 Example 5.23--An SFC Example with Direct Implementation of Action Control
537(8)
5.2.3.29 Example 5.24--An SFC Example Consisting of an Action with a Sequence of Instructions
545(6)
References
551(2)
About the Downloadable Files for Advanced Concepts 553(2)
Index 555
Prologue xiii
Preface xv
About the Author xvii
Background and Use of the Book xix
Chapter 1 Hardware of the PIC16F1847-Based PLC
1(12)
Chapter 2 Basic Software
13(92)
Introduction
13(1)
2.1 Definition and Allocation of Variables
14(15)
2.2 Contents of the File "PICPLC_PIC16F1847_memory.inc"
29(1)
2.3 Contents of the File "PICPLC_PIC16F1847_main.asm"
30(8)
2.4 Contents of the File "PICPLC_PIC16F1847_user_Bsc.inc"
38(1)
2.5 Contents of the File "PICPLC_PIC16F1847_subr.inc"
38(3)
2.6 Contents of the File "PICPLC_PIC16F1847_macros _Bsc.inc"
41(46)
2.6.1 Macro "initialize"
43(3)
2.6.2 Macro "ISR"
46(1)
2.6.3 Elimination of Contact Bouncing Problem in the PIC16F1847-Based PLC
47(1)
2.6.3.1 Contact Bouncing Problem
47(1)
2.6.3.2 Understanding a Generic Single I/O Contact Debouncer
48(4)
2.6.3.3 Debouncer Macro "dbncrN"
52(3)
2.6.4 Macro "get_inputs"
55(15)
2.6.5 Low-Pass Digital Filter Macro "lpf_progs"
70(7)
2.6.6 Macro "send_outputs"
77(10)
2.7 Example Programs
87(17)
2.7.1 Example 2.1
88(1)
2.7.2 Example 2.2
89(1)
2.7.3 Example 2.3
90(2)
2.7.4 Example 2.4
92(3)
2.7.5 Example 2.5
95(4)
2.7.6 Example 2.6
99(5)
Reference
104(1)
Chapter 3 Contact and Relay-Based Macros
105(66)
Introduction
105(1)
3.1 Macro "Id" (load)
106(1)
3.2 Macro "ld_not" (load.not)
107(1)
3.3 Macro "not"
108(1)
3.4 Macro "or"
108(1)
3.5 Macro "or_not"
109(2)
3.6 Macro "nor"
111(1)
3.7 Macro "and"
111(2)
3.8 Macro "and _not"
113(2)
3.9 Macro "nand"
115(1)
3.10 Macro "xor"
116(1)
3.11 Macro "xor_not"
116(2)
3.12 Macro "xnor"
118(1)
3.13 Macro "out"
118(1)
3.14 Macro "out_not"
119(3)
3.15 Macro "mid_out" (Midline Output)
122(1)
3.16 Macro "mid_out_not" (Inverted Midline Output)
122(1)
3.17 Macro "in_out"
123(2)
3.18 Macro "inv_out"
125(1)
3.19 Macro "_set"
126(1)
3.20 Macro "_reset"
127(1)
3.21 Macro "SR" (Set-Reset)
128(1)
3.22 Macro "RS" (Reset-Set)
128(2)
3.23 Macro "r_edge" (Rising Edge Detector)
130(2)
3.24 Macro "f_edge" (Falling Edge Detector)
132(1)
3.25 Macro "r_toggle" (Output Toggle with Rising Edge Detector)
132(1)
3.26 Macro "f_toggle" (Output Toggle with Falling Edge Detector)
133(1)
3.27 Macro "adrs_re" (Address Rising Edge Detector)
134(1)
3.28 Macro "adrs_fe" (Address Falling Edge Detector)
135(1)
3.29 Macro "setBF" (Set Bit Field)
136(13)
3.30 Macro "resetBF" (Reset Bit Field)
149(1)
3.31 Examples for Contact and Relay-Based Macros
149(22)
3.31.1 Example 3.1
156(1)
3.31.2 Example 3.2
157(2)
3.31.3 Example 3.3
159(1)
3.31.4 Example 3.4
160(5)
3.31.5 Example 3.5
165(1)
3.31.6 Example 3.6
165(1)
3.31.7 Example 3.7
165(2)
3.31.8 Example 3.8
167(4)
Chapter 4 Flip-Flop Macros
171(116)
Introduction
171(1)
4.1 Macro "latch1" (D Latch with Active High Enable)
171(1)
4.2 Macro "latchO" (D Latch with Active Low Enable)
172(1)
4.3 Macro "dff_r" (Rising Edge-Triggered D Flip-Flop)
173(1)
4.4 Macro "dff_r_SR" (Rising Edge-Triggered D Flip-Flop with Active High Preset [ S] and Clear [ R] Inputs)
174(3)
4.5 Macro "dff_f' (Falling Edge-Triggered D Flip-Flop)
177(2)
4.6 Macro "dff_f_SR" (Falling Edge-Triggered D Flip-Flop with Active High Preset [ S] and Clear [ R] Inputs)
179(3)
4.7 Macro "tff_r" (Rising Edge-Triggered T Flip-Flop)
182(1)
4.8 Macro "tff_r_SR" (Rising Edge-Triggered T Flip-Flop with Active High Preset fS] and Clear [ R] Inputs)
182(3)
4.9 Macro "tff_f' (Falling Edge-Triggered T Flip-Flop)
185(2)
4.10 Macro "tff_f_SR" (Falling Edge-Triggered T Flip-Flop with Active High Preset [ S] and Clear [ R] Inputs)
187(1)
4.11 Macro "tkff_r" (Rising Edge-Triggered JK Flip-Flop)
188(3)
4.12 Macro "jkff_r_SR" (Rising Edge-Triggered JK Flip-Flop with Active High Preset [ S] and Clear [ R] Inputs)
191(2)
4.13 Macro "jkff_f" (Falling Edge-Triggered JK Flip-Flop)
193(1)
4.14 Macro "jkff_f_SR" (Falling Edge-Triggered JK Flip-Flop with Active High Preset [ S] and Clear [ R] Inputs)
194(3)
4.15 Examples for Flip-Flop Macros
197(90)
4.15.1 Example 4.1
203(3)
4.15.2 Example 4.2
206(3)
4.15.3 Example 4.3
209(2)
4.15.4 Example 4.4
211(1)
4.15.5 Example 4.5: 4-Bit Asynchronous Up Counter
212(5)
4.15.6 Example 4.6: 4-Bit Asynchronous Down Counter
217(3)
4.15.7 Example 4.7: Asynchronous Decade Counter
220(2)
4.15.8 Example 4.8: 4-Bit Asynchronous Up/Down Counter
222(5)
4.15.9 Example 4.9: Synchronous Decade Counter
227(5)
4.15.10 Example 4.10: 4-Bit Synchronous Up/Down Counter
232(4)
4.15.11 Example 4.11: 4-Bit Serial-in, Parallel-out Shift Right Register
236(6)
4.15.12 Example 4.12: 4-Bit Serial-in, Serial-out Shift Right Register
242(3)
4.15.13 Example 4.13: 4-Bit Serial-In, Parallel-Out Shift Right or Shift Left Register
245(4)
4.15.14 Example 4.14: 4-Bit Parallel-in, Serial-out Shift Right Register
249(2)
4.15.15 Example 4.15: 4-Bit Parallel-in, Parallel-out Register
251(1)
4.15.16 Example 4.16: 74164 8-Bit Serial-in, Parallel-out Shift Register
252(5)
4.15.17 Example 4.17: 74165 8-Bit Parallel-in, Serial-out Shift Register
257(4)
4.15.18 Example 4.18: 74194 4-Bit Bidirectional Universal Shift Register
261(5)
4.15.19 Example 4.19: 74595 8-Bit Serial-in, Serial- or Parallel-out Shift Register
266(5)
4.15.20 Example 4.20: 4-Bit Johnson Counter
271(7)
4.15.21 Example 4.21: 8-Bit Ring Counter
278(9)
Chapter 5 Timer Macros
287(100)
Introduction
287(1)
5.1 On-Delay Timer (TON)
288(1)
5.2 Macro "TON_8" (8-Bit On-Delay Timer)
288(8)
5.3 Macro "TON_16" (16-Bit On-Delay Timer)
296(5)
5.4 Retentive On-Delay Timer (RTO)
301(1)
5.5 Macro "RTO_8" (8-Bit Retentive On-Delay Timer)
302(4)
5.6 Macro "RTO_16" (16-Bit Retentive On-Delay Timer)
306(5)
5.7 Off-Delay Timer (TOF)
311(1)
5.8 Macro "TOF_8" (8-Bit Off-Delay Timer)
311(5)
5.9 Macro "TOF_16" (16-Bit Off-Delay Timer)
316(5)
5.10 Pulse Timer (TP)
321(1)
5.11 Macro "TP_8" (8-Bit Pulse Timer)
321(5)
5.12 Macro "TP_16" (16-Bit Pulse Timer)
326(5)
5.13 Extended Pulse Timer (TEP)
331(1)
5.14 Macro "TEP_8" (8-Bit Extended Pulse Timer)
332(4)
5.15 Macro "TEP_16" (16-Bit Extended Pulse Timer)
336(5)
5.16 Oscillator Timer (TOS)
341(1)
5.17 Macro "TOS_8" (8-Bit Oscillator Timer)
342(5)
5.18 Macro "TOS_16" (16-Bit Oscillator Timer)
347(6)
5.19 Examples for Timer Macros
353(34)
5.19.1 Example 5.1
353(6)
5.19.2 Example 5.2
359(5)
5.19.3 Example 5.3
364(6)
5.19.4 Example 5.4
370(5)
5.19.5 Example 5.5
375(6)
5.19.6 Example 5.6
381(6)
Chapter 6 Counter Macros
387(1)
Introduction
387(3)
6.1 Up Counter (CTU)
390(5)
6.2 Macro "CTU_8" (8 Bit Up Counter)
395(7)
6.3 Macro "CTU_16" (16 Bit Up Counter)
402(5)
6.4 Down Counter (CTD)
407(1)
6.5 Macro "CTD_8" (8 Bit Down Counter)
407(6)
6.6 Macro "CTD_16" (16 Bit Down Counter)
413(4)
6.7 Up/Down Counter (CTUD)
417(1)
6.8 Macro "CTUD_8" (8 Bit Up/Down Counter)
418(8)
6.9 Macro "CTUD_16" (16 Bit Up/Down Counter)
426(9)
6.10 Generalized Up/Down Counter (GCTUD)
435(2)
6.11 Macro "GCTUD_8" (Generalized 8 Bit Up/Down Counter)
437(7)
6.12 Macro "GCTUD_16" (Generalized 16 Bit Up/Down Counter)
444(9)
6.13 Examples for Counter Macros
453(1)
6.13.1 Example 6.1
454(6)
6.13.2 Example 6.2
460(6)
6.13.3 Example 6.3
466(5)
6.13.4 Example 6.4
471(5)
6.13.5 Example 6.5
476(3)
6.13.6 Example 6.6
479(6)
About the Downloadable Files for Hardware and Basic Concepts 485(2)
Index 487
Prologue xiii
Preface xv
About the Author xvii
Background and Use of the Book xix
References xxvi
Chapter 1 Arithmetical Macros
1(52)
Introduction
1(1)
1.1 Macro "RladdR2"
2(1)
1.2 Macro "RladdR2_16"
3(2)
1.3 Macro "RaddK"
5(1)
1.4 Macro "RaddK_16"
6(1)
1.5 Macro "RlsubR2"
7(1)
1.6 Macro "RlsubR2_16"
8(2)
1.7 Macro "RsubK"
10(1)
1.8 Macro "RsubK_16"
10(2)
1.9 Macro "RlmulR2"
12(2)
1.10 Macro "DivU16by8"
14(1)
1.11 Macro "incR"
15(1)
1.12 Macro "incR_16"
16(1)
1.13 Macro "decR"
17(2)
1.14 Macro "decR_16"
19(1)
1.15 Macro "Hbit_CNT" (High Bit Counter)
19(11)
1.16 Macro "Lbit_CNT" (Low Bit Counter)
30(3)
1.17 Examples for Arithmetical Macros
33(18)
1.17.1 Example 1.1
34(3)
1.17.2 Example 1.2
37(1)
1.17.3 Example 1.3
38(1)
1.17.4 Example 1.4
39(3)
1.17.5 Example 1.5
42(1)
1.17.6 Example 1.6
43(1)
1.17.7 Example 1.7
44(1)
1.17.8 Example 1.8
44(4)
1.17.9 Example 1.9
48(3)
References
51(2)
Chapter 2 Logical Macros
53(32)
Introduction
53(1)
2.1 Macro "RlandR2"
53(3)
2.2 Macro "RandK"
56(1)
2.3 Macro "RlnandR2"
57(1)
2.4 Macro "RnandK"
58(2)
2.5 Macro "RlorR2"
60(3)
2.6 Macro "RorK"
63(1)
2.7 Macro "RlnorR2"
64(1)
2.8 Macro "RnorK"
65(1)
2.9 Macro "RlxorR2"
66(3)
2.10 Macro "RxorK"
69(2)
2.11 The Macro "RlxnorR2"
71(1)
2.12 Macro "RxnorK"
72(1)
2.13 Macro "invR"
73(3)
2.14 An Example for Logical Macros
76(9)
Chapter 3 Shift and Rotate Macros
85(112)
Introduction
85(1)
3.1 Macro "Ashift_R" (Arithmetic Shift Right Rin)
86(1)
3.2 Macro `Ashift_R_16" (Arithmetic Shift Right Rin)
87(2)
3.3 Macro "Lshift.R" (Logical Shift Right Rin)
89(1)
3.4 Macro "Lshift_R_16" (Logical Shift Right Rin)
90(3)
3.5 Macro "Lshift_L" (Logical Shift Left Rin)
93(1)
3.6 Macro "Lshift_L_16" (Logical Shift Left Rin)
94(3)
3.7 Macro "shift.R" (Shift Right Rin)
97(2)
3.8 Macro "shift_R_16" (Shift Right Rin)
99(2)
3.9 Macro "shift_L" (Shift Left Rin)
101(2)
3.10 Macro "shift_L_16" (Shift Left Rin)
103(2)
3.11 Macro "rotate_R" (Rotate Right Rin)
105(5)
3.12 Macro "rotate_R_16" (Rotate Right Rin)
110(3)
3.13 Macro "rotate_L" (Rotate Left Rin)
113(3)
3.14 Macro "rotate_L_16" (Rotate Left Rin)
116(3)
3.15 Macro "Swap"
119(3)
3.16 Examples for Shift and Rotate Macros
122(75)
3.16.1 Example 3.1
129(10)
3.16.2 Example 3.2
139(9)
3.16.3 Example 3.3
148(9)
3.16.4 Example 3.4
157(10)
3.16.5 Example 3.5
167(10)
3.16.6 Example 3.6
177(9)
3.16.7 Example 3.7
186(11)
Chapter 4 Selection Macros
197(124)
Introduction
197(1)
4.1 Macro "move_R" (Move)
198(1)
4.2 Macro "load_R" (Load)
198(3)
4.3 Macro "select" (Selection of One of Two 8-Bit Input Variables)
201(1)
4.4 Macro "select_16" (Selection of One of Two 16-Bit Input Variables)
201(2)
4.5 Macro "max _5" (Maximum in Five 8-Bit Variables)
203(5)
4.6 Macro "max_10" (Maximum in Ten 8-Bit Variables)
208(1)
4.7 Macro "max_N80" (Maximum in N 8-Bit Variables, N = 2,3,..., 80)
209(1)
4.8 Macro "max_N40_16" (Maximum in N 16-Bit Variables, N = 2, 3... 40)
210(3)
4.9 Macro "max_N255" (Maximum in N 8-Bit Variables, N = 2,3... 255)
213(1)
4.10 Macro "max_N255_16" (Maximum in N 16-Bit Variables, N = 2, 3,... , 255)
214(2)
4.11 Macro "min _5" (Minimum in Five 8-Bit Variables)
216(2)
4.12 Macro min_10" (Minimum in Ten 8-Bit Variables)
218(1)
4.13 Macro "min_N80" (Minimum in N 8-Bit Variables, N = 2,3,... ,80)
218(3)
4.14 Macro "min_N40_16" (Minimum in N 16-Bit Variables, N = 2, 3,... ,40)
221(2)
4.15 Macro "min_N255" (Minimum in N 8-Bit Variables, N = 2, 3,... ,255)
223(2)
4.16 Macro "min_N255_16" (Minimum in N 16-Bit Variables, N = 2, 3,... , 255)
225(2)
4.17 Macro "limiter"
227(1)
4.18 Macro "limiter_16"
228(1)
4.19 Multiplexer Macros
229(1)
4.20 Macro "mux_2_1"
230(1)
4.21 Macro "mux_2_1_E"
230(1)
4.22 Macro "mux_4_1"
231(1)
4.23 Macro "mux_4_1_E"
231(2)
4.24 Macro "mux_8_1"
233(1)
4.25 Macro "mux_8_1_E"
233(1)
4.26 Macro "mux_16_1"
234(1)
4.27 Macro "mux_16_1_E"
235(1)
4.28 Macro "B_mux_2_1_E"
236(1)
4.29 Macro "B_mux_4_1_E"
237(1)
4.30 Macro "B_mux_8_1_E"
238(3)
4.31 Examples for Selection Macros
241(80)
4.31.1 Example 4.1
243(4)
4.31.2 Example 4.2
247(1)
4.31.3 Example 4.3
248(1)
4.31.4 Example 4.4
249(3)
4.31.5 Example 4.5
252(9)
4.31.6 Example 4.6
261(2)
4.31.7 Example 4.7
263(5)
4.31.8 Example 4.8
268(7)
4.31.9 Example 4.9
275(4)
4.31.10 Example 4.10
279(5)
4.31.11 Example 4.11
284(7)
4.31.12 Example 4.12
291(5)
4.31.13 Example 4.13
296(7)
4.31.14 Example 4.14
303(3)
4.31.15 Example 4.15
306(2)
4.31.16 Example 4.16
308(1)
4.31.17 Example 4.17
308(2)
4.31.18 Example 4.18
310(1)
4.31.19 Example 4.19
310(3)
4.31.20 Example 4.20
313(3)
4.31.21 Example 4.21
316(2)
4.31.22 Example 4.22
318(3)
Chapter 5 Demultiplexer Macros
321(58)
Introduction
321(1)
5.1 Macro "Dmux_1_2" (1×2 DMUX)
322(1)
5.2 Macro "Dmux_1_2_E" (1×2 DMUX with Enable Input)
322(1)
5.3 Macro "Dmux_1_4" (1×4 DMUX)
323(1)
5.4 Macro "Dmux_1_4_E" (1×4 DMUX with Enable Input)
323(2)
5.5 Macro "Dmux_1_8" (1×8 DMUX)
325(1)
5.6 Macro "Dmux_1_8_E" (1×8 DMUX with Enable Input)
325(5)
5.7 Macro "Dmux_1_16" (1×16 DMUX)
330(1)
5.8 Macro "Dmux_1_16_E" (1×x16 DMUX with Enable Input)
330(1)
5.9 Macro "B_Dmux_1_2_E" (1×2 Byte DeMultiplexer with Enable Input)
331(3)
5.10 Macro "B_Dmux_1_4_E" (1× Byte DeMultiplexer with Enable Input)
334(2)
5.11 Macro "B_Dmux_1_8_E" (1×8 Byte DeMultiplexer with Enable Input)
336(3)
5.12 Macro "Dispatcher_1_8_E" (1×8 Dispatcher with Enable Input)
339(2)
5.13 Macro "Patcher_8_1_E" (8×1 Patcher with Enable Input)
341(5)
5.14 Examples for Demultiplexer Macros
346(33)
5.14.1 Example 5.1
353(4)
5.14.2 Example 5.2
357(2)
5.14.3 Example 5.3
359(2)
5.14.4 Example 5.4
361(4)
5.14.5 Example 5.5
365(2)
5.14.6 Example 5.6
367(2)
5.14.7 Example 5.7
369(3)
5.14.8 Example 5.8
372(4)
5.14.9 Example 5.9
376(3)
Chapter 6 Conversion Macros
379(70)
Introduction
379(1)
6.1 Macro "Conv_UsInt_2_BCD_U" (Unsigned Short Integer to Unpacked BCD Conversion)
380(3)
6.2 Macro "Conv_UsInt_2_BCD_P" (Unsigned Short Integer to Packed BCD Conversion)
383(2)
6.3 Macro "Conv_UInt_2_BCD_U" (Unsigned Integer to Unpacked BCD Conversion)
385(1)
6.4 Macro "Conv_UInt_2_BCD_P" (Unsigned Integer to Packed BCD Conversion)
386(3)
6.5 Macro "Conv_BCD_U_2_UInt" (5-Digit Unpacked BCD to Unsigned Integer Conversion)
389(3)
6.6 Macro "Conv_BCD_P_2_UInt" (5-Digit Packed BCD to Unsigned Integer Conversion)
392(3)
6.7 Seven-Segment LED Displays
395(4)
6.8 Macro "Segment.CCD" (Segment_CCD Instruction)
399(7)
6.9 Macro "Segment_CAD" (Segment_CAD Instruction)
406(4)
6.10 Macro "Conv_Bin_2_Gray" (Binary to Gray Code Conversion)
410(2)
6.11 Macro "Conv_Bin_2_Gray_16" (Binary to Gray Code Conversion)
412(2)
6.12 Macro "Conv_Gray_2_Bin" (Gray Code to Binary Conversion)
414(4)
6.13 Macro "Conv_Gray_2_Bin_16" (Gray Code to Binary Conversion)
418(2)
6.14 Examples for Conversion Macros
420(28)
6.14.1 Example 6.1
424(3)
6.14.2 Example 6.2
427(1)
6.14.3 Example 6.3
428(2)
6.14.4 Example 6.4
430(1)
6.14.5 Example 6.5
431(2)
6.14.6 Example 6.6
433(1)
6.14.7 Example 6.7
434(1)
6.14.8 Example 6.8
435(1)
6.14.9 Example 6.9
436(1)
6.14.10 Example 6.10
437(2)
6.14.11 Example 6.11
439(2)
6.14.12 Example 6.12
441(7)
References
448(1)
About the Downloadable Files for Intermediate Concepts 449(2)
Index 451
Murat Uzam was borned in Söke, Turkey, in 1968. He received the B.Sc. and M.Sc. degrees from Electrical Engineering Department, Yldz Technical University, stanbul, Turkey, 1989 and 1991, respectively, and the Ph.D. degree from University of Salford, Salford, U.K., in 1998. He was with Nigde University, Turkey, from 1993 to 2010 in the Department of Electrical and Electronics Engineering as a Research Assistant, Assistant Professor, Associate Professor and Professor. He was a Professor in the Department of Electrical and Electronics Engineering, at Melikah University in Kayseri, Turkey from 2011 to 2016. He was a Visiting Researcher with INRIA, University of Metz and University of Rennes, France, in 1999, with University of Toronto, Toronto, ON, Canada, in 2003, and with Xidian University, Xian, China, in 2013, 2015 and 2019. Since 15 April 2020, he has been serving as a Professor in the Department of Electrical and Electronics Engineering, at Yozgat Bozok University in Yozgat, Turkey. He has published 50 conference papers and 85 journal and magazine papers, 70 of which are indexed by Science Citation Index Expanded (SCIE). He has published two books in Turkish and one book in English by CRC Press (Taylor & Francis Group). According to Publons, his H-Index is 15 and his papers have been cited 1269 times by the papers indexed in the SCIE. His current research interests include design and implementation of discrete event control systems modeled by Petri nets and, in particular, deadlock prevention/liveness enforcing in flexible manufacturing systems, programmable logic controllers (PLCs), microcontrollers (especially PIC microcontrollers), and design of microcontroller-based PLCs. Dr. Uzam has been serving as a reviewer for prestigious journals and conferences. According to Publons, the number of his verified reviews is 70.