The papers in this work cover many topics, including not only electronic components, but also developments in all areas of electronic technology. Emerging technologies such as optoelectronic and ballgrid array packaging are reported.
1 Optical Serial Links 1(45) Chairs: Robert A. Boudreau, AMP Lawrence Watkins, Lucent Technologies Low-Cost, Compact, Gigabit Transceivers for Data Communications 1(6) Kenneth P. Jackson, IBM Microsystems and Wafer Processes for Volume Production of Highly Reliable Fiber Optic Components for Telecom and Datacom Application 7(9) Hans L. Althaus Wolfgang Gramann Klaus Panzer, Siemens A New Premolded Packaging Technology for Low Cost E/O Device Applications 16(3) Nobuyuki Takehashi Masatsugu Horii, Kyocera Comparison of Low-Cost Fiber Optic Technologies for Data Transmission 19(6) M.B. Ritter J.M. Trewhella D.M. Kuchta M.M. Oprysko, IBM Novel Solvent Bonded Low Cost Pigtailed PIN Module 25(5) Ching-Long (John) Jiang Steve ONeill Eric Mak Bill Reysen, AMP Coupling Efficiency of an Alignment-Tolerant, Single Fiber, Bi-Directional Link 30(7) S.C. Wang J. Cross S. M. Chai A. Lopez J. Park M.A. Ingram N.M. Jokerst D.S. Wills M. Brooke A. Brown, Georgia Tech Packaging of Large-Scale Planar Lightwave Circuits 37(9) Kuniharu Kato Motohaya Ishii Yasuyuki Inoue, NTT 2 Plastic Packaging 46(49) Chairs: Eric Perfecto, IBM C.P. Wong, Georgia Tech Study of Encapsulating Systems for Diversified Area Bump Packages 46(8) Satoshi Ito Makoto Kuwamura Shinichiro Sudo Masaki Mizutani Takashi Fukushima Hiroshi Noro Shin Akizuki Ashok Prabhu, Nitto Denko A New Encapsulating Method for Semiconductor Devices Using Resin Sheets 54(6) Hideo Ota Shinetsu Fujieda Tetsuo Okuyama, Toshiba Wire Sweep Control with Mold Compound Formulations 60(12) L. Nguyen J. Jackson C.H. Teo S. Chillara C. Asanasavest T. Burke R. Walberg R. Lo P. Weiler, National Semiconductor Reliability of Aluminum Nitride-Filled Mold Compound 72(6) Daniel Tracy Luu Nguyen Richard Giberti Anthony Gallo, Dexter Electronic Materials Charles Bischof, Dexter Electronic Materials James N. Sweet, Sandia National Labs Alex W. Hsia, National Semiconductor The Oxidation Control of Copper Leadframe Package for Prevention of Popcorn Cracking 78(6) Eiji Takano Toshikazu Mino Kenji Takahashi Kanako Sawada, Anam Industrial Shin-ya Shimizu, Oita Precision Hee Yeoul Yoo, Toshiba Evaluation of Interface Delamination in IC Packages by Considering Swelling of Molding Compound Due to Moisture Absorption 84(7) Naotaka Tanaka Makoto Kitano Tetsuo Kumazawa Asao Nishimura, Hitachi Molding Compounds for High Breakdown Voltage Applications on Power IC Semiconductors 91(4) A.S. Chen A. Shafi R.W. Busse R. Orr R.H.Y. Lo, National Semiconductor 3 Soldering and Modeling 95(32) Chair: Guy Delisle, IBM Kitty Pearsall, IBM Molding Challenges of LOC Packages with Large Devices 95(6) Marie-Claude Paquet, IBM The Development of Repairable Au-Al Solid Phase Diffusion Flip-Chip Bonding 101(7) Atsuko Iida Yukio Kizaki Yumi Fukuda Miki Mori, Toshiba The Effect of Filler on the Properties of Molding Compounds and Their Moldability 108(6) Minjin Ko Myungwhan Kim Dongsuk Shin Inhee Lim Myungsun Moon Yongjoon Park, LG Chemical A New Approach to Chip Size Package Using Meniscus Soldering and FPC-Bonding 114(6) Christine Kallmayer Erik Jung, IZM Paul Kasulke, Pac Tech Ramin Azadeh, IZM Ghassem Azdasht, IZM Elke Zakel, IZM Herbert Reichl, TU-Berlin Oxidation and Reduction Kinetics of Eutectic SnPb, InSn and AuSn: A Knowledge Base for Fluxless Solder Bonding Applications 120(7) J.F. Kuhmann, Mikroelecktronic Centret A. Preuss, TU-Dresden B. Adolphi, TU-Dresden K. Maly, Heinrich-Hertz-Institute T. Wirth, Bundesanstalt fur Materialforschung W. Oesterle, Bundesanstalt fur Materialforschung W. Pittroff, Ferdinand Braun Institute G. Weyer, Aarhus University F. Fanciulli, Aarhus University 4 Modeling and Testing 127(41) Chair: Darvin R. Edwards, Texas Instruments Robert Howard, Consultant Complex Fatigue of Soldered Joints--Comparison of Fatigue Models 127(7) Matthew Bevan, Johns Hopkins University Manfred Wuttig, University of Maryland Stresses from Flip-Chip Assembly and Underfill: Measurements with the ATC4.1 Assembly Test Chip and Analysis by Finite Element Method 134(10) David W. Peterson James N. Sweet Steven N. Burchett Alex Hsia, Sandia National Labs A Unified Multi-Axial Sub-Micron Fatigue Tester with Applications to Electronic Packaging Materials 144(5) Minfu Lu Wei Ren Sheng Liu, Wayne State University Nondestructive Ultrasonic Inspection of Thin IC Packages 149(4) Yang Ji Cheng Swee Yong Khim, Texas Instruments Aging Kinetics for Temperature Loads of z-Conductive Adhesives In-situ Monitoring of the Contact Resistance of Heat Seal Connectors 153(5) J.F.J.M. Caers F.J.H. Kessels, Philips Time-Accurate, 3-D Computation of Wire Sweep During Plastic Encapsulation of IC Components 158(10) H.Q. Yang S. Bayyuk, CFD Research L.T. Nguyen, National Semiconductor 5 Current Electronic Packaging Education 168(28) Chairs: Jim Billigmeier, 3M J. Peter Krusius, Cornell University Multimedia Education: Training for Packaging Engineers 168(4) Paul Wesling, Tandem Computers Electronic Packaging Education in an Interdisciplinary, Cooperative Research Environment 172(5) John L. Prince Oleg A. Palusinski Andreas C. Cangellaris Kenneth A. Jackson, University of Arizona A Multi-Pronged Approach to Electronic Packaging Education 177(5) Roop L. Mahajan, University of Colorado Microelectronics Packaging Curriculum Development at San Jose State University 182(5) Guna S. Selvaduray Fred Barez, San Jose State University Microelectronics and Electronic Packaging Education and Research at Virginia Tech 187(4) Aicha Elshabini-Riad Fred D. Barlow, Virginia Polytechnic Institute and State University Interdisciplinary, Multi-Instructor Graduate Education in Electronics Packaging 191(5) W.D. Brown, The University of Arkansas 6 Parallel Optical Interconnects 196(44) Chairs: Daniel B. Schwartz, Motorola Mitchell S. Cohen, IBM Extending the Useful Range of Copper Interconnects for High Data Rate Signal Transmission 196(8) James R. Broomall Herb Van Deusen, W.L. Gore OPTOBUS(TM)I: A Production Parallel Fiber Optical Interconnect 204(6) L.J. Norton Frank Carney N. Choi K.Y. Chun R.K. Denton, Jr. D. Diaz J. Knapp M. Meyering C. Ngo S. Planer G. Raskin E. Reyes J. Sauvageau D.B. Schwartz G. Shook J. Yoder Y. Yen M. Meyering, Motorola 3.5 Gb/s x 4 ch Optical Interconnection Module for ATM Switching System 210(7) Nobuyuki Tanaka Yoshimitsu Arai Hideyuki Takahara Yasuhiro Ando Noboru Ishihara Shigeki Hino, NTT Automated Testing Methodologies for Low Cost, Parallel Optical Bus Components 217(8) Kevin Stawiasz Dan Kuchta, IBM Peter Xiao, NeoParadigm Labs Reliable, Compact, CMOS Interface, 200-Mbit/s x 12 Channel Optical Interconnects Using Single-Mode Fiber Arrays 225(6) Atsushi Miura Koichiro Tonehira Atsushi Takai Satoshi Aoki Satoshi Kaneko Hiroki Irie Shoichi Hanatani, Hitachi Gigabit Parallel Fiber Optic Link Based on Edge Emitting Lasers 231(3) Radhakrishnan Nagarajan Wei Jian Sha Benjamin Li Peter Braid, SDL Robert Furmanak, Dupont Joseph Marchegiano, Dupont Bruce Booth, Dupont A Parallel Optical Link for Intra- and Inter-Rack Interconnections 234(6) Q. Tan G. De pestel G. Willems J. Cannaerts W. Rehm N. Kaiser, Alcatel Telecom K. Vandeputte, University of Ghent A. Van Hove, University of Ghent J. Van Koetsem, Framatome Connectors Belgium 7 Low-Cost Flip Chip 240(39) Chair: Paul A. Totta, IBM Ray Fillion, General Electric Solder Bumping Methods for Flip Chip Packaging 240(8) Glenn A. Rinne, MCNC Flex on Cap -- Solder Paste Bumping 248(6) Peter Elenius, Flip Chip Technologies Fine Pitch Stencil Printing of Sn/Pb and Lead Free Solders for Flip Chip Technology 254(11) Joachim Kloeser Katrin Heinricht, Pac Tech Kai Kutzner Erik Jung Andreas Ostmann, TU-Berlin Elke Zakel Herbert Reichl, IZM-Berlin Ball Bumping and Coining Operations for Tab and Flip Chip 265(3) Lee Levine, Kulicke and Soffa Low Cost Flip Chip Technology for Organic Substrates 268(6) Shunji Baba, Fujitsu Conductive Adhesive Flip-Chip Bonding for Bumped and Unbumped Die 274(5) Glen Connell Robert L.D. Zenner Joel A. Gerber, 3M 8 Thermal/Mechanical Modeling 1 279(40) Chairs: Suresh K. Sitaraman, Georgia Tech Peter P. Black, US Army Missile Command Transient Thermal Analysis of Electronic Packages by the Boundary Element Method 279(10) I. Guven C.L. Chan E. Madenci, University of Arizona Thermal Evaluation of a Flip Chip RF-PA for Simulation-Driven Short-Cycle Re-Design 289(7) Sue Y. Teng Tien-Yu Tom Lee, Motorola Modeling and Metrology in High Performance Heat Sink Design 296(7) Chandrakant D. Patel Christian L. Belady, Hewlett Packard The MCM/MCP Thermal Characteristic and Its Circuit Representations 303(6) Zemo Yang Xing An Wang Jon Ewanich, Philips Thermal Evaluation of a Cost-Effective Plastic Ball Grid Array Package -- NuBGA 309(10) Frank Wu John Lau Kuan-Luen Chen, Express Package Systems 9 Single Chip Packaging 1 319(44) Chairs: E. Jan Vardaman, TechSearch International Raj N. Master, AMD Ceramic Column Grid Array (CCGA) Module for a High Performance Work Station Application 319(6) S.K. Ray H. Quinones S. Iruvanti E. Atwood L. Walls, IBM Eutectic Solder Flip Chip Technology -- Bumping and Assembly Process Development For CSP/BGA 325(7) Hideo Aoki Chiaki Takubo Takahito Nakazawa Soichi Honma Kazuhide Doi Masahiro Miyata Hirokazu Ezawa Yoichi Hiruta, Toshiba Thermal Coastline -- Leadframes for High Power at No Cost 332(6) Tom Moore, Analog Devices BV A Thermally Enhanced Plastic Package with Indented Leadframe 338(5) Chin C. Lee David H. Chien, UC Irvine Development of Chip Scale Packages (CSP) for Center Pad Devices 343(10) Masazumi Amagai Hiroyuki Sano Takayuki Maeda Takahiro Imura Tadashi Saitoh, Texas Instruments Board on Chip-Ball Grid Array (BOC-BGA(TM)) Package -- A New Design for High Frequency Application (Package Design and Reliability) 353(5) Chee-Kiang Yew Pang-Hup Ong Yong-Khim Swee Min-Yu Chan Siu-Waf Low Jeffrey Toh Jeffrey Chan Chew-Weng Leong, Texas Instruments Low Cost Chip-Scale Package 358(5) Y.C. Teo T.B. Lim H.M. Ho C.Q. Cui Christina Tsui, Institute of Microelectronics S.C. Lian, Advanced System Automation T.T. Tan, Advanced System Automation 10 Vertical Cavity Surface Emitting Lasers (VCSELs) 363(36) Chairs: Michael Lebby, Motorola Torsten Wipiejewski, University of Ulm From Inter-System to ICs Level, VCSEL as a Key Component for Optoelectronic Active Interconnects, a Survey 363(5) Andre Chenevas-Paule Thierry Collette Patrick Scheer, LETI/CEA Jean-Pierre Bouzinac, ONERA/CERT Pascal Churoux, ONERA/CERT Sylvain Paineau, Thomson-CSF Vertical Cavity Surface Emitting Laser Packaging with Auto Power Control 368(3) Wenbin Jiang Paul Claisse Craig Gaw Phil Kiely Bob Lawrence Michael Lebby Michael Roll, Motorola Bias-Free 1 Gb/s Data Transmission Using High Efficiency VCSELs 371(5) P. Schnitzer M. Grabherr R. Jager C. Jung R. Michalzik G. Reiner W. Schmid B. Weigl D. Wiedenmann K.J. Ebeling, University of Ulm Free-Space Optical Link Realized with Microlensed Components 376(6) E.M. Strzelecka D.A. Louderback K. Bertilsson B.J. Thibeault M. Mondry L.A. Coldren, UC Santa Barbara Plastic-Based Receptacle-Type VCSEL-Array Modules with One and Two Dimensions Fabricated Using the Self-Alignment Mounting Technique 382(9) Hideo Kosaka Mikihiro Kajita Mitsuki Yamada Yoshimasa Sugimoto Kazuhiko Kurata Takashi Tanabe Yasuhiko Kasukawa, NEC High Density Optical Interconnects for Board and Backplane Applications Using VCSELs and Polymer Waveguides 391(8) Y.S. Liu, GE R.J. Wojnarowski, GE W.A. Hennessy, GE J. Rowlette, AMP J. Stack, AMP M. Kadar-Kallen, AMP Eric Green, AMP Yue Liu, Honeywell J.P. Bristow, Honeywell A. Peczalski, Honeywell L. Eldada, AlliedSignal J. Yardley, AlliedSignal M. Osgood, Columbia University R. Scarmozzino, Columbia University S.H. Lee, UC San Diego S. Patra, UC San Diego 12 Connectors and Optical Paths 399(31) Chairs: Venkata A. Bhagavatula, Corning Frank V. DiMarcello, Lucent Technologies Packaging of Emerging Optical Interconnection Technologies in Telecom Platforms 399(5) Gary J. Grimes, University of Alabama and Lucent Technologies Automated Assembly of Parallel Fiber Optic Cables 404(6) S.A. Igl B.A. Debaun N.A. Lee T.L. Smith G.D. Henson A.S. Kuczma, 3M P.K. Pepeljugoski, IBM Face-Lock(TM) Optical Fiber Connector Design and Fabrication 410(4) S. Sheem F. Zhang E. Allen S. Low, Berkeley Optics Low-Cost Connector-Type Optical Terminators 414(5) Wilton W. King Daniel L. Stephenson, Lucent Technologies Performance Evaluation of Micromechanical Binary Phase-Only Holographic Optical Elements 419(6) David A. Winick Bruce E. Duewer S. Palchaudhury Paul D. Franzon, North Carolina State University Design and Qualification of a Hermetically Packaged Lithium Niobate Optical Modulator 425(5) R.S. Moyer R. Grencavich R.W. Smith W.J. Minford, Lucent Technologies 13 Thermal/Mechanical Modeling II 430(49) Chairs: Erdogan Madenci, University of Arizona Ravi Mahajan, University of Colorado Evaluation of Plastic Package Delamination Via Reliability Testing and Fracture Mechanics Approach 430(6) Van Holakere Susan Mirano, Alphatec An-Yu Kuo, Optimal Wen-Tang Chen, Optimal Chalermsak Sumithpibul, NS Electronics Saravuth Sirinorakul, NS Electronics Solder Joint Formation Simulation and Finite Element Analysis 436(8) Gary K. Mui Xiaohua Wu Kai X. Hu Chao-Pin Yeh Karl Wyatt, Motorola High Temperature Deformation of Area Array Packages by Moire Interferometry/FEM Hybrid Method 444(9) Jiansen Zhu Daqing Zou Sheng Liu, Wayne State University Efficient Design Using Fuzzy Logic Based Regression Models 453(9) Brian Schaible Y.C. Lee Hong Xie, University of Colorado An Efficient Approach to Predict Solder Fatigue Life and its Application to SM- and Area Array Components 462(10) Rainer Dudek Margareta Nylen, Swedish Institute for Metals Research Andreas Schubert Bernd Michel Herbert Reichl, IZM-Berlin Two and Three-Dimensional Modeling of VSPA Butt Solder Joints 472(7) R. Sean Murphy Suresh K. Sitaraman, Georgia Tech 14 Multichip Packaging 479(39) Chairs: Joseph W. Soucy, Micro Network Sudipta K. Ray, IBM MCM-C/D Design for the CMOS Implementation of the S/390 System 479(7) G.A. Katopis D. Becker H. Smith H. Stoller, IBM Advanced ATM-Layer Function MCM-D Module for ATM Wide-Area Network 486(5) Tomoaki Kawamura Naoaki Yamanaka Katsumi Kaizu, NTT New MCM Composed of D/L Base Substrate, High-Density-Wiring CSP and 3D Memory Modules 491(6) Akinobu Shibuya Ichiro Hazeyama Tadanori Shimoto Nobuaki Takahashi Naoji Senba Mitsuru Kimura Yuzo Shimada Hajime Matsuzawa Fumio Mori, NEC Mixed L.F/R.F. MCM 497(5) Claude Drevon Sebastien George Augustin Coello Vera Michel Pouysegur Jean Louis Cazaux, Alcatel Espace Application of Laser Engraving for the Fabrication of Fine Resolution Printed Wiring Laminates for MCM-Ls 502(9) Zsolt Illyefalvi-Vitez Janos Pinkola, TU-Budapest Fast Static RAM Level Two Cache MCM with Gold Wire Ball Bumped Flip Chip Assembly 511(7) Leo Higgins Rebecca Cole Diana Duane, Motorola 15 Die Attach & Interconnection Adhesives 518(49) Chairs: Wayne J. Howell, IBM James Morris, University of New York A Novel Die Bonding Adhesive -- Silver Filled Film 518(7) Shinji Takeda Takashi Masuko Yasuo Miyadera Mitsuo Yamazaki Iwao Maekawa, Hitachi Chemical Moisture and Thermal Degradation of Cyanate-Ester-Based Die Attach Material 525(11) John Ivan J. Gonzales, Analog Devices Manolo G. Mena, University of the Philippines Processing Diagrams for Polymeric Die Attach Adhesives 536(8) J.-C. Hsiung R.A. Pearson, Lehigh University Enhancing Adhesion Between Mold Compound and Substrate in BGA Packaging 544(6) C.Q. Cui T.B. Lim, Institute of Microelectronics Cure Kinetics and Mechanical Properties of Conductive Adhesive 550(4) Sean X. Wu Crystal Zhang, Cornell University Chao-Pin Yeh, Steve Wille Karl Wyatt, Motorola Transient Liquid Phase Sintering Conductive Adhesives as Solder Replacements 554(7) Catherine Gallagher Goran Matijasevic, Toranaga Technologies James F. Maguire, Boeing The Effect of Temperature Ramp on Flip-Chip Joint Quality and Reliability Using Anisotropically Conductive Adhesive on FR-4 Substrate 561(6) Katrin Gustafasson, Chalmers University of Technology Samjid Mannan, Loughborough University Johan Liu, IVF Zonghe Lai, IVF David Whalley, Loughborough University David Williams, Loughborough University 16 Unique and Special Packaging Educational Programs 567(26) Chairs: Paul Wesling, Tandem Computers Aicha Elshabini-Riad, Virginia Polytechnic Institute Global Education for Packaging Engineers: Beyond Science and Technology 567(3) Richard J. Higgins, Georgia Tech Educating Under-Represented Minority Students in Electronics Packaging for the 21st Century 570(5) Gary S. May, Georgia Tech Video-Based Packaging Courses 575(4) John A. Fillo Chittaranjan Sahay Krishnaswami Srihari, SUNY-Binghamton Distance Learning Paradigms in Electronics Packaging: A National Course on Thermal Design of Electronic Products 579(6) Yogendra Joshi, University of Maryland Avram Bar-Cohen, University of Minnesota Sushil Bhavnani, Auburn University Electronic Packaging and Reliability Education for the 21st Century: The University of Maryland CALCE EPRC Program 585(4) Y. Joshi M. Pecht W. Nakayama, University of Marlyland The Student Factory at Auburn University 589(4) R. Wayne Johnson, Auburn University 17 WDM Systems 593(45) Chairs: William M. Sherry, Lucent Technologies Martin Groeneveld, Philips Challenges in Optoelectronic Packaging for High Performance WDM Networks 593(8) Erik C.M. Pennings, Philips Performance and Packaging Implications of a MEMS Based Optical Modulator for WDM Fiber-to-the-Home Systems 601(6) J.A. Walker J.E. Ford N. Basavanhally, Lucent Technologies High Power and High Sensitivity PLC Module Using a Novel Corner-Illuminated PIN Photodiode 607(7) Gohji Nakagawa Seimi Sasaki Naoki Yamamoto Kazuhiro Tanaka Kazunori Miura Mitsuhiro Yano, Fujitsu Optical Reflective Filter with Comb-Drive Nickel Micromirror for Optical Fiber Communication 614(6) Koji Akimoto Yuji Uenishi Kazuharu Honma Shinji Hagaoka, NTT Hybrid WDM Transmitter/Receiver Module Using Alignment-Free Assembly Techniques 620(6) Akio Goto Shinichi Nakamura Kazuhiko Kurata Masaaki Funabashi Takashi Tanabe Kouya Komatsu Osamu Akiyama Naoki Kitamura Takefuni Tamura Shigeta Ishikawa, NEC DWDM Components with 0.03nm Center Wavelength Accuracy Using a Novel Adjustment Mechanism 626(6) T. Kubo H. Sonoda N. Naganuma N. Fukushima H. Noda H. Isono, Fujitsu Assembly and Wiring Technologies on PLC Platforms for Low-Cost and High-Speed Applications 632(6) Yuji Akahori Takaharu Ohyama Toshikazu Hashimoto Yasufumi Yamada, NTT 18 Chip Scale/Bonding 638(38) Chairs: Corey Koehler, Motorola Matt Schwiebert, Hewlett-Packard Chip Scale Packaging Using Chip-on-Flex Technology 638(5) Ray Fillion Bill Burdick Dave Shaddock Pat Piacente, GE Flip-Chip Assembly of Motorola Fast Static RAM Known Good Die 643(6) Craig Beddingfield Don Kost, Motorola Flip-Chip and Chip-Scale I/O Density Requirements and Printed Wiring Board Capabilities 649(7) K.V. Guinn R.C. Frye, Lucent Technologies Mini Ball Grid Array (mBGA) Assembly on MCM-L Boards 656(8) Rajen Chanchani Keith Treece Paul Dressendorfer, Sandia National Labs Development of Reflowable Sn-Pb Alloy Bump for Al Pad 664(6) Toshinori Ogashiwa Takatoshi Arikawa, Tanaka Denshi Kogyo Akihisa Inoue, Tohoku University Wirebonding on Various Multichip Module Substrates and Metallurgies 670(6) Harry K. Charles, Jr. Katherine J. Mach Richard L. Edwards S. John Lehtonen David M. Lee, Johns Hopkins University 19 Electrical Simulation 676(37) Chairs: Andreas Cangellaris, University of Arizona George A. Katopis, IBM Mid-Frequency Simultaneous Switching Noise in Computer Systems 676(6) W. Becker H. Smith T. McNamara P. Muench J. Eckhardt M. McAllister G. Katopis, IBM Comparison of Electrical Performance of Enhanced BGAs 682(7) Ravi Kaw Bill Hanna Nur Devnani, Hewlett-Packard Fast Time Domain Simulation in SPICE with Frequency Domain Data 689(7) Norman Chang Lee Barford Boris Troyanovsky, Hewlett-Packard UASSNS 3.1: An Integrated Design and Analysis Tool for SSO Noise in Leadframe Packages 696(8) Chender Huang Lei Lin John L. Prince, University of Arizona When are Transmission-Line Effects Important for On-Chip Interconnections 704(9) A. Deutsch G.V. Kopcsay P. Restle G. Katopis W.D. Becker H. Smith P.W. Coteus C.W. Surovic B.J. Rubin R.P. Dunne T. Callo K.A. Jenkins L.M. Terman R.H. Dennard G.A. Sai-Halasz D.R. Knebel, IBM 20 Integrated Passive Components 713(42) Chairs: Amit P. Agrawal, Hewlett-Packard Rao Bonda, Motorola Integrated and Integral Passive Components: A Technology Roadmap 713(11) John Rector, Jr, IBM Joseph Dougherty, Penn State University Vernon Brown, Motorola John Galvagni, AVX John Prymak, Kemet The Stealth Decoupling Capacitor 724(6) L. Schaper R. Ulrich D. Nelms, University of Arkansas E. Porter, Sheldahl T. Lenihan, Sheldahl C. Wan, Sheldahl Reliability of Flexible Thin-Film Embedded Resistors and Electrical Characterization of Thin-Film Embedded Capacitors and Inductors 730(9) K. Fairchild G. Morcan T. Lenihan, Sheldahl W. Brown L. Schaper S. Ang W. Sommers J. Parkerson M. Glover, University of Arkansas Integration of Thin Film Passive Circuits Using High/Low Dielectric Constant Materials 739(6) P. Chahal A. Haridass A. Pham R.R. Tummala M.G. Allen M. Swaminathan J. Laskar, Georgia Tech Determination of Youngs Modulus of Thin Films Used in Embedded Passive Devices 745(5) R. Djakaria B.I. Chandran M.H. Gordon W.F. Schmidt, University of Arkansas T.G. Lenihan, Sheldahl Material Compatibility and Dielectric Properties of Co-Fired High and Low Dielectric Constant Ceramic Packages 750(5) Raghu Natarajan J.P. Dougherty, Pennsylvania State University 21 Photonic Device Mounting 755(49) Chairs: Craig A. Gaw, Motorola Mark W. Beranek, Boeing Fluxless, No-Clean Assembly of Optoelectronic Devices with PADS 755(8) S. Nagalia N. Koopman V. Rogers, MCNC M.W. Beranek, Boeing H.E. Hanger, Boeing E.A. Ledbury, Boeing V.A. Loebs, Boeing E.C. Miao, Boeing C.H. Tang, Boeing C.A. Pico, Electro Scientific Industries E.J. Swenson, Electro Scientific Industries D. Hatzis, M/A COM P. Li, M/A COM C. Luck, M/A COM Wafer Scale Photonic-Die Attachment 763(5) Ping Zhou Robert Boudreau Terry Bowen, AMP Bimetallic Heatsinks for Temperature Compensation of Diode Lasers: Prospects for Microfabrication 768(7) Daniel A. Cohen Larry A. Coldren, UC Santa Barbara A Rapid Flip Chip Die Bonding Method for Semiconductor Laser Diode Arrays 775(5) S.A. Merritt F. Seiferth V. Vusirikala M. Dagenais Y.J. Chen D.R. Stone, University of Maryland Fluxless Die Bonding of High Power Laser Bars Using the AuSn-Metallurgy 780(8) Stefan Weiss Volker Bader, IZM Ghassem Azdasht, IZM Paul Kasulke, Pac Tech Elke Zakel, IZM Herbert Reichl, TU-Berlin Polymer Tapered Waveguides and Flip-Chip Solder Bonding as Compatible Technologies for Efficient OEIC Coupling 788(9) Dominic J. Goodwill Regis S. Fan R. Brian Hooker Yung-Cheng Lee Brian L. McComas Alan R. Mickelson Nina D. Morozova Darja Tomic, University of Colorado Gas Flow Effects on Precision Solder Self-Alignment 797(7) Bingzhi Su M. Gershovich Y.C. Lee, University of Colorado 22 Electrical Modeling 804(38) Chairs: John L. Prince, University of Arizona Ravi Kaw, Hewlett-Packard Electrical Modeling of Extremely Large Packages 804(6) B. J. Rubin A. Mechentel J.H. Magerlein, IBM Quantification of Interconnect Coupling Mechanisms in Multilayer Substrates with Perforated Ground Planes 810(7) Yuh-Sheng Tsuei, Tandem Computers Andreas C. Cangellaris, University of Arizona On-Chip Coupled Noise Analysis of a High Performance S/390 Microprocessor 817(9) A.H. Dansky H.H. Smith P.M. Williams, IBM Effects of Floating Planes in Three-Dimensional Packaging Structures on Simultaneous Switching Noise 826(6) Loizos Vakanas Samil Hasan Andreas Cangellaris John Prince, University of Arizona Electrical Modeling of an IC Package Chip Paddle as an Integral Ground Bus 832(4) Michael A. Lamson, Texas Instruments Effect of Mutual Coupling Between Signal Traces and Ground Planes on SSO Noise in Packages with Multiple Stacked Ground Planes 836(6) Abdul-Rahman Yaghmour John L. Prince, University of Arizona 23 Flip Chip: Materials and Assembly 842(48) Chairs: Rajen Chanchani, Sandia National Labs Gordon Roberts, Lucent Technologies Optimization of Shrinkage and Expansion Properties of Epoxy Encapsulants 842(8) Justin C. Bolger, Bolger Corp. High Performance No Flow Underfills for Low-Cost Flip-Chip Applications 850(9) C.P. Wong S.H. Shi G. Jefferson, Georgia Tech Experimental and Numerical Study of Underfill Encapsulation of Flip-Chips Using Conductive Epoxy Polymer Bumps 859(7) G. Ni M.H. Gordon W.F. Schmidt A. Muyshondt, University of Arkansas A New Ni-W Thin Film Metallization for Solder Interconnections and Design Method of Metallization Thickness 866(9) Masahide Harada Ryoohei Satoh Osamu Yamada Akira Yabushita Mitsuko Itoh Toshitada Netsu Toshiro Terouchi, Hitachi Development of Fluxless Flip Chip Bonding to a Thin Film Multichip Module Substrate 875(4) Rao Bonda Treliant Fang Ben Hileman David Spigler John Stafford Geoff Swan Gordon Tam, Motorola Thermal Study for Flip Chip on FR-4 Boards 879(6) Tiao Zhou Michael Hundt Claudio Villa Robert Bond Tom Lao, SGS-Thomson Corrosion/Migration Study of Flip Chip Underfill and Ceramic Overcoating 885(5) R. Lachance H. Lavoie A. Montanari, IBM 24 Connectors 890(52) Chairs: Tim Adams, Brush Wellman Robert Pokrzywa, Brush Wellman Stress Analysis of a Compressed Elastomeric Connector Spring 890(8) Yun Ling, AMP Numerical and Experimental Modeling of High-Speed Cables and Interconnects 898(7) Benjamin Beker, University of South Carolina Tom Hirsch, MCC Feasibility Study of Laser Microwelding of High Density Cable Assemblies with Applications to Portable Electronics 905(6) Mark A, Wojcicki, AMP Ryszard J. Pryputniewicz, Worcester Polytechnic Institute High Performance Mainframe Computer Cables 911(7) Brian Beaman, IBM Material Coupon Test Method to Simulate Contact Performance Under Automotive Conditions 918(10) Nathan A. Gildersleeve, NGK Metals Kevin J. Collins, Innovative Testing Solutions Methodology for Connector Reliability Analysis 928(8) Apurba Choudhury Mark Maxson Mark Plucinski, IBM Extraction of Electrical Parameters of High Density Connectors Using Time Domain Measurements 936(6) Sreemala Pannala Christine Nguyen Madhavan Swaminathan, Georgia Tech 25 International Packaging Education and Panel Discussion 942(25) Chairs: Koji Nihei, Oki Electric Industry Jim Morris, Technische Universitat -- Chemnitz-Zwiekau Problem-Oriented Education of Electronics Technology at the Technical University of Budapest 942(9) Zsolt Illyefalvi-Vitez Pal Nemeth Bela Szikora, TU-Budapest Packaging Education at the Dresden University of Technology/Germany 951(5) Ekkehard Meusel, TU-Dresden Education and Training at the Electronics Technology Laboratory of Dresden University of Technology 956(4) Thomas Zerna, TU-Dresden Next Generation of Electronic Packaging Education at Georgia Tech Packaging Research Center 960(4) Rao R. Tummala, Georgia Tech Electronic Packaging Education: A View from 1992 and 1996 Conferences 964(3) J.P. Krusius Che-Yu Li, Cornell University J. Fillo, SUNY-Binghamton 26 Process Advances 967(28) Chairs: Tom Poulin, Sorvall Products Tony Suppelsa, Motorola Process for Fabricating Thin Film Multilayer Modules Using Photosensitive Epoxy Dielectrics 967(5) Tom Swirbel, Motorola Pad Printer 972(7) Gordon R. Love, MultiLythics Galeb Maher, MRA Labs Richard A. Lambrech, L-Systems Application of Die Attachless Process for Plastic Packages (Thermoplastic Polyimide-Transferred Wafer Technology 979(7) Norito Umehara Masazumi Amagai, Texas Instruments Mamoru Kobayashi, Lintec Modeling Component Placement Errors in Surface Mount Technology Using Neural Networks 986(5) Gary S. May Harold Forbes Nasir Hussain Andy Louis-Charles, Georgia Tech Towards PCB Physical Design Automation: Architectural Analysis and Synthesis 991(4) Delphin Y. Montuno Q.J. Zhang Brian Stacey Wenfeng Chen Vikas Chaudhary Dan Poirier Tom Montor, Nortel Technology 27 Single Chip Packaging II 995(46) Chairs: Karla Y. Carichner, LSI Logic Jeffrey A. Knight, IBM Semiconductor Packaging for the Telecommunications Industry 995(6) Reg Simpson, Nortel Semiconductors Manufacturing Process for Combination Lead Frame/TAB BGA 1001(7) Mamoru Mita Gen Murakami Toyohiko Kumakura Norio Okabe Noriaki Taketani Kazuhisa Hatano Tatsuya Ohtaka, Hitachi Cable Aluminum Decal for Transferring Solder Spheres During Electronic Package Assembly 1008(7) Gregory B. Hotchkiss, Texas Instruments New Composite Organic Dielectric for High Performance Flip Chip Single Chip Packages 1015(7) Joseph E. Korleski Robin E. Gorrell Christopher P. Bowen David B. Noddin, W.L. Gore Development of Highly Reliable CSP 1022(7) Yasuhisa Yamaji Hiroyuki Juso Yosikazu Ohara Yuji Matsune Koji Miyata Yoshiki Sota Atsuya Narai Tomoshi Kimura Kazuya Fujita Morihiro Kada, Sharp New Packaging System and Materials for FPAC 1029(3) Yuji Hotta Amane Mochizuki Michie Sakamoto Masahiro Yoshioka Ashok Prabhu Shinya Akizuki, Nitto Denko The Application of Acoustic Microscopy to the Characterization of Non-Standard Microelectronic Packaging Structures 1032(9) W. Lawton J. Barrett, NMRC 28 Materials Reliability and Testing 1041(40) Chairs: Patrick Thompson, Motorola Jo Caers, Philips Influence of Preheat and Maximum Temperature of the Solder-Reflow Profile on Moisture Sensitive ICs 1041(8) R.L. Shook V.S. Sastry, Lucent Technologies Investigation of a Novel Leadframe Treatment for Dry-Pack Free Packaging 1049(12) Charles Lee, Siemens Arvind Parthasarathi, Olin Effects of Polymer Die Attach-Leadframe Interface Integrity on Thermal Performance of Power Semiconductor Packages 1061(7) Shih-Fang Chuang David R. Kee, Texas Instruments Investigation of Heat Sink Attach Methodologies and the Effects on Package Structural Integrity and Interconnect Reliability of the 119-Lead Plastic Ball Grid Array 1068(8) L. Michael Eyman Gary B. Kromann, Motorola A Unique Approach for Bare Die Testing Which Utilizes Au-Stud-Bumping Technology and TAB Technology 1076(5) Shoichiro Harada Yoshiyuki Kado Tetsuya Hayashida Hideyuki Sasaki, Hitachi 29 Component Characterization 1081(36) Chairs: Larry A. Mann, KEMET Electronics Albert F. Puttlitz, Consultant Electrical Design of a Low Cost and High Performance Plastic Ball Grid Array Package -- NuBGA 1081(6) Tai-Yu Chou Frank Wu John Lau Kuan-Luen Chen, Express Package Systems Electrical Characterization of BGA Packages 1087(7) Carmen Mattei, Amkor Electronics Amit P. Agrawal, Hewlett-Packard Clock Design and Analysis for a Superconductive Crossbar Switch 1094(6) J. Dunn P. Vichot M. Piket-May J. Mix Z. Schoenborn, University of Colorado Revolutionary Approach in Tantalum Capacitor Design Which Has Made Microminiature 0603 Case Size Possible and Improved Electrical Performance 1100(5) Ian Salisbury, AVX Mechanical and Electrical Characterization of a Dendrite Connector 1105(5) Shouguan Lin James H. Constable, SUNY-Binghamton William Brodsky, IBM George H. Thiel, IBM O.C. Sun, IBM Adhesion Strength of Solder Joints to Alloy 42 Component Leads 1110(7) Fay Hua Zequn Mei Helen Holder Judy Glazer, Hewlett-Packard 30 Poster Presentations 1117 Chairs: Steve Bezuk, UNISYS Mino F. Dautartas, Lucent Technologies Stresses in a Partially Coated Optical Glass Fiber Subjected to the Ends Off-Set 1117(3) E. Suhir, Lucent Technologies Thermal Effects on PCBs with Connectors During Solder Attachment 1120(4) Bob Schluter Joe De La Rosa Randy Mattsen Kitty Pearsall, IBM CTE Measurement and Delamination Growth by a Real Time Moire Technique 1124(4) Daqing Zou Jianjun Wang Wei Yang Sheng Liu, Wayne State University Thermosonic Flip-Chip Bonding Using Longitudinal Ultrasonic Vibration 1128(6) Qing Tan Wenge Zhang Brian Schaible Leonard J. Bond T.H. Ju Y.C. Lee, University of Colorado Ultra Fast Neural Models for Analysis of Electro/Optical Interconnects 1134(4) Q.J. Zhang G. Wilson, Nortel Technology R. Venkatachalam, Nortel Technology A. Sarangan, Nortel Technology J. Williamson, Nortel Technology F. Wang, Carleton University A New Power Distribution Strategy for Area Array Bonded ICs and Packages of Future Deep Sub-Micron ULSI 1138(8) L. Cao J.P. Krusius, Cornell University A Computer Program That Generates an RF Electrical Model of the Parasitics of QFP Packages 1146(6) Michael Caggiano, Lucent Technologies and Rutgers University A Novel Double-Decker Flip-Chip/BGA Package for Low Power Giga-Hertz Clock Distribution 1152(6) L. Cao J.P. Krusius, Cornell University Modeling and Experimental Validation of Interconnects with Meshed Power Planes 1158(5) Y.L. Li El-Badawy El-Sharawy, Arizona State University Lesley Polka Anna Madrid J.C. Liao David Figueroa, Intel Optimization for Thermal and Electrical Performance for a Flip-Chip Package Using Physical-Neural Network Modeling 1163(7) V.V. Calmidi R.L. Mahajan, University of Colorado The Effect of Underfill Epoxy on Mechanical Behavior of Flip Chip Assembly 1170(6) Wenge Zhang Derick Wu Bingzhi Su Saeed Hareb Y.C. Lee, University of Colorado Pat Masterson, Melles Griot Warpage Analysis of 144-Pin TQFP During Reflow Using Image Processing 1176(6) Dawei Zheng Ray P. Hwang, SUNY-Binghamton Xinyu Dou Chaopin Yeh Mani Prakash, SUNY-Binghamton Keith Boardman Greg Ridsdale, Motorola A Study of the Thermal Characteristics of a Conductive Adhesive Chip Attach Process 1182(6) S. Sathe B. Sammakia R. Kodnani M. Gaynes, IBM Controlled Solder Self-Alignment Sequence for an Optoelectronic Module without Mechanical Stops 1188(6) N.D. Morozova L.-A. Liew W. Zhang R. Irwin Bingzhi Su Y.C. Lee, University of Colorado Assessment of High Power Diode Laser Arrays by Fourier-Transform Photo-Current Measurements 1194(5) J.W. Tomm A. Barwolff, Max-Born-Institute A. Gerhardt, Institut fur Kristallzuchtung J. Donecker, Institut fur Kristallzuchtung Resonant Cavity SiGe/Si MQW Heterojunction Phototransistor Grown on the SIMOX Substrate for 1.3 mu m Operation 1199(6) Yuqing Zhu Qinqing Yang Qiming Wang, Chinese Academy of Sciences Simulation of WIDM Systems Using PC-SIMFO 1205(5) Luis C. Kakimoto Sandro M. Rossi Edson Moschim, State University of Campinas 3D Packaging -- Combining Chip on Chip (COC) and Chip on Board (COB) Packages -- Process and Design Considerations 1210(4) Jaya R. Ganasan, Crystalaid Manufacture Thermal and Thermo-Mechanical Behavior of Silicon Platform with Direct Lead Attachment 1214(13) F.C. Anigbo M.F. Dautartas S.L. Broutin Y.-H. Wong, Lucent Technologies 3D Packaging Solutions for a Silicon Micropump 1227(8) G. Kelly J. Alderman C. Lyden J. Barrett A. Morrissey, University College Flip-Chip Mounting of Laser Diodes with Au/Sn Solder Bumps: Bumping, Self-Alignment and Laser Behavior 1235(7) W. Pittroff J. Barnikow A. Klein P. Kurpas U. Merkel K. Vogel J. Wurfl, Ferdinand-Braun-Institute J. Kuhmann, Heinrich-Hertz Institute Investigation on the Effect of Molding Compounds on Package Delamination 1242(6) Minjin Ko Myungwhan Kim Dongsuk Shin Yongjoon Park Myungsun Moon Inhee Lim, EPM (Electronic Packaging Material) Group Non Halogen/Antimony Flame Retardant System for High End IC Package 1248(6) Miho Yamaguchi Hitomi Shigyo Yuko Yamamoto Shinichiro Sudo Satoshi Ito, Nitto Denko Influence of the Mounting Configuration on the Transient Thermal Behavior of High Power Laser Diode Arrays 1254(6) R. Puchert A. Barwolff M. Voss U. Menzel J.W. Tomm, Max-Born Institute J. Luft, Siemens Photosensitive Benzocyclobutene for Stress-Buffer and Passivation Applications (One Mask Manufacturing Process) 1260(9) A.J.G. Strandjord W.B. Rogers Y. Ida R.R. DeVellis S. Shiau E.S. Moyer D. Scheck P.E. Garrou, Dow An Empirical Reliability Prediction Method for 1.55 (Mu)m InGaAs/InP MQW-DFB Laser Diodes 1269(3) Nam Hwang Seung-Goo Kang Hee-Tae Lee Seong-Su Park Min-Kyu Song Kwang-Eui Pyun, ETRI Effect of Au Thickness on Laser Beam Penetration in Invar-to-Invar Packages 1272(5) S.C. Wang H.L. Chang C. Wang C.M. Wang J.W. Liaw, Telecommunication Labs M.T. Sheen, National Sun Yat-sen University Y.C. Sheu, National Sun Yat-sen University J.H. Kuang, National Sun Yat-sen University S. Chi, National Chiao Tung University Y.D. Yang, National Sun Yat-sen University W.H. Cheng, National Sun Yat-sen University Improvement of Solder Joint Reliability between Multilayer Ceramic Package and Printed Wiring Board by New Ceramic Material 1277(6) Kouchi Yamaguchi Masahiko Higashi Noriaki Hamada Hideto Yonekura Yasuyoshi Kunimatsu, Kyocera Development of Molding Compound for Non-Antimony And Non-Halogen 1283(6) Shinichi Iwasaki Shigehisa Ueda, Sumitomo Bakelite Simulation of High Speed Optical Fiber Systems Using PC-SIMFO 1289 Sandro M. Rossi Edson Moschim, State University of Campinas
