| Regular Papers |
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FPGA-Based Parallel DBSCAN Architecture |
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1 | (12) |
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FPGA-Based High Performance AES-GCM Using Efficient Karatsuba Of man Algorithm |
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13 | (12) |
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Efficient Elliptic-Curve Cryptography Using Curve25519 on Reconfigurable Devices |
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25 | (12) |
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Accelerating Heap-Based Priority Queue in Image Coding Application Using Parallel Index-Aware Tree Access |
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37 | (12) |
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Methods, Frameworks and OS for Debug, Over-Clocking and Relocation |
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A Unified Framework for Over-Clocking Linear Projections on FPGAs under PVT Variation |
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49 | (12) |
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Relocatable Hardware Threads in Run-Time Reconfigurable Systems |
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61 | (12) |
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Faster FPGA Debug: Efficiently Coupling Trace Instruments with User Circuitry |
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73 | (12) |
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On the Impact of Replacing a Low-Speed Memory Bus on the Maxeler Platform, Using the FPGA's Configuration Infrastructure |
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85 | (12) |
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Towards Dynamic Cache and Bandwidth Invasion |
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97 | (11) |
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Stand-Alone Memory Controller for Graphics System |
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108 | (13) |
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Methodologies and Tools I |
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Evaluating High-Level Program Invariants Using Reconfigurable Hardware |
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121 | (12) |
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Automated Data Flow Graph Partitioning for a Hierarchical Approach to Wordlength Optimization |
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133 | (11) |
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Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer |
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144 | (12) |
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Enhanced Radiation Tolerance of an Optically Reconfigurable Gate Array by Exploiting an Inversion/Non-inversion Implementation |
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156 | (11) |
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Hardware-Accelerated Data Compression in Low-Power Wireless Sensor Networks |
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167 | (12) |
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OCP2XI Bridge: An OCP to AXI Protocol Bridge |
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179 | (12) |
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FPGA Implementation of a Video Based Abnormal Action Detection System with Real-Time Cubic Higher Order Local Auto-Correlation Analysis |
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191 | (6) |
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A Synthesizable Multicore Platform for Microwave Imaging |
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197 | (8) |
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An Efficient Implementation of the Adams-Hamilton's Demosaicing Algorithm in FPGAs |
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205 | (8) |
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FPGA Design of Delay-Based Digital Effects for Electric Guitar |
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213 | (6) |
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Design Space Exploration of a Particle Filter Using Higher-Order Functions |
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219 | (8) |
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Simulation of Complex Biochemical Pathways in 3D Process Space via Heterogeneous Computing Platform: Preliminary Results |
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227 | (6) |
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Efficient Buffer Design and Implementation for Wormhole Routers on FPGAs |
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233 | (7) |
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MicroACP -- A Fast and Secure Reconfigurable Asymmetric Crypto-Processor -- Overhead Evaluation of Side-Channel Countermeasures |
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240 | (8) |
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Arabica: A Reconfigurable Arithmetic Block for ISA Customization |
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248 | (6) |
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Built-in 3-Dimensional Hamming Multiple-Error Correcting Scheme to Mitigate Radiation Effects in SR AM-Based FPGAs |
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254 | (8) |
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Adapting Processor Grain via Reconfiguration |
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262 | (6) |
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Jecel Mattos de Assumpcao, Jr. |
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Instruction Set Optimization for Application Specific Processors |
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268 | (7) |
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Methodologies and Tools II |
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A Dataflow Inspired Programming Paradigm for Coarse-Grained Reconfigurable Arrays |
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275 | (8) |
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Thread Shadowing: Using Dynamic Redundancy on Hybrid Multi-cores for Error Detection |
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283 | (8) |
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Diffusion-Based Placement Algorithm for Reducing High Interconnect Demand in Congested Regions of FPGAs |
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291 | (7) |
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GPU vs FPGA: A Comparative Analysis for Non-standard Precision |
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298 | (8) |
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Instruction Extension and Generation for Adaptive Processors |
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306 | (6) |
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DeSyRe: On-Demand Adaptive and Reconfigurable Fault-Tolerant SoCs |
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312 | (6) |
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Effective Reconfigurable Design: The FASTER Approach |
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318 | (6) |
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HARNESS Project: Managing Heterogeneous Computing Resources for a Cloud Platform |
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324 | (6) |
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Profile-Guided Compilation of Scilab Algorithms for Multiprocessor Systems |
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330 | (7) |
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SAVE: Towards Efficient Resource Management in Heterogeneous System Architectures |
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337 | (8) |
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Data Parallel Application Adaptivity and System-Wide Resource Management in Many-Core Architectures |
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345 | (8) |
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| Author Index |
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353 | |
