Muutke küpsiste eelistusi

Reversible Logic Circuit [Kõva köide]

,
  • Formaat: Hardback, 137 pages, kõrgus x laius: 230x155 mm, kaal: 546 g
  • Ilmumisaeg: 01-Jan-2015
  • Kirjastus: Nova Science Publishers Inc
  • ISBN-10: 1634634217
  • ISBN-13: 9781634634212
Teised raamatud teemal:
Reversible Logic CircuitSuurem pilt
  • Formaat: Hardback, 137 pages, kõrgus x laius: 230x155 mm, kaal: 546 g
  • Ilmumisaeg: 01-Jan-2015
  • Kirjastus: Nova Science Publishers Inc
  • ISBN-10: 1634634217
  • ISBN-13: 9781634634212
Teised raamatud teemal:
Püsilink: https://www.kriso.ee/db/9781634634212.html
Märksõnad:
Preface vii
Chapter 1
1 Introduction
1(6)
1.1 Foreword
1(2)
1.2 Reversible Logic
3(1)
1.3 Content and Content Structure of the Book
4(3)
Chapter 2
2 Basic Knowledge of Reversible Quantum Logic Circuit
7(18)
2.1 Quantum Bit
7(1)
2.2 Unitary Operation
8(1)
2.3 Reversible Logic Functions
9(2)
2.4 The Basic Quantum Reversible Logic Gate
11(10)
2.5 Quantum Circuits Structure
21(1)
Conclusion
22(1)
References
22(3)
Chapter 3
3 Reversible Adders
25(60)
3.1 Designing a Novel Reversible BCD Adder
25(15)
3.2 Designing a Novel Reversible No-Wait-Carry Adder
40(13)
3.3 Novel Designs for Fault Tolerant Reversible Binary Coded Decimal Adders
53(16)
3.4 Novel Design for a Reversible BCD Subtractor
69(3)
3.5 Proposing a Novel Reversible BCD Adder/Subtractor
72(8)
References
80(5)
Chapter 4
4 Transistor Realization of Reversible "ZS" Series Gates and a Reversible Array Multiplier
85(24)
4.1 Basic Reversible Gate Library and Its Pass-transistor Implementation
86(4)
4.2 Reversible "ZS" Series Gates
90(9)
4.3 Reversible Array Multiplier Based on ZS Series Gates
99(3)
4.4 Evaluation of the Proposed Reversible Multiplier Circuit
102(3)
Conclusion
105(1)
References
106(3)
Chapter 5
5 Optimization Approaches for Designing a Novel 4-Bit Reversible Comparator
109(16)
5.1 Basic Reversible Logic Gates
109(2)
5.2 The Proposed New ZRQ Gate and The Design of Novel Reversible Comparator
111(6)
5.3 The Performance Analysis of the Proposed Circuit
117(5)
5.4 Test and Verify the Correct Proposed 4-Bit Reversible Comparator
122(1)
5.5 Conclusion and Future Work
123(1)
References
124(1)
Chapter 6
6 Reversible Arithmetic Logic Unit
125(18)
6.1 Method One
126(8)
6.2 Method Two
134(7)
References
141(2)
Chapter 7
7 QCA Theory
143(6)
7.1 QCA Cells
143(2)
7.2 QCA Quantum Mechanics Overview
145(1)
7.3 QCA Cell Characteristic
146(1)
7.4 QCA Signal Clocking
147(1)
7.5 Logic Circuit Calculation Principle
148(1)
References
148(1)
Chapter 8
8 QCA General Logic Gate Design
149(16)
8.1 QCA General Logic Gate
149(5)
8.2 QCA Combinational Logic Circuit Design
154(9)
References
163(2)
Chapter 9
9 QCA Simulation
165(14)
9.1 What's QCADesigner?
165(3)
9.2 Simulation of 3×3 Subsystem
168(10)
References
178(1)
Index 179