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Silicon Systems For Wireless Lan [Kõva köide]

Edited by (Ihp, Leibniz-inst Fur Innovative Mikroelektronik, Germany), Edited by (Csic, Spain & Imse-cnm, Spain), Edited by (Ecole Centrale De Lyon, France)
Teised raamatud teemal:
Teised raamatud teemal:
Today's integrated silicon circuits and systems for wireless communications are of a huge complexity.This unique compendium covers all the steps (from the system-level to the transistor-level) necessary to design, model, verify, implement, and test a silicon system. It bridges the gap between the system-world and the transistor-world (between communication, system, circuit, device, and test engineers).It is extremely important nowadays (and will be more important in the future) for communication, system, and circuit engineers to understand the physical implications of system and circuit solutions based on hardware/software co-design as well as for device and test engineers to cope with the system and circuit requirements in terms of power, speed, and data throughput.Related Link(s)
Foreword v
Part 1 Design
Chapter 1 System Architecture
Zoran Stamenkovic
Mile Stojcev
1.1 Introduction
3(2)
1.2 Wireless Communication Systems
5(4)
1.3 WLAN Transceiver Architecture
9(8)
References
16(1)
Chapter 2 Digital Baseband
Zoran Stamenkovic
Mile Stojcev
Bojan Dimitrijevic
2.1 Introduction
17(2)
2.2 Scrambling/Descrambling
19(2)
2.3 Channel Coding and Error Correction
21(10)
2.4 Interleaving/Deinterleaving
31(5)
2.5 Mapping/Demapping
36(1)
2.6 Pilot Insertion
37(2)
2.7 IEFT/FFT
39(2)
2.8 Cyclic Prefix
41(1)
2.9 Pulse Shaping
42(2)
2.10 Synchronization
44(9)
2.11 Channel Estimation
53(5)
2.12 Equalization
58(3)
References
59(2)
Chapter 3 Analog Front-End
Gildas Leger
Antonio Gines
3.1 Introduction
61(8)
3.2 Specifying Transceiver
69(7)
3.3 Transmitter Architecture
76(7)
3.4 Receiver Architectures
83(14)
References
92(5)
Part 2 Modeling
Chapter 4 System Models
Zoran Stamenkovic
Bojan Dimitrijevic
Mile Stojcev
4.1 Introduction
97(3)
4.2 WLAN MAC Model
100(3)
4.3 WLAN Baseband Model
103(4)
4.4 What is Next?
107(4)
References
107(4)
Chapter 5 Digital Circuit Models
Zoran Stamenkovic
Bojan Dimitrijevic
Mile Stojcev
5.1 Introduction
111(1)
5.2 General Purpose Processors
112(9)
5.3 Digital Signal Processors
121(35)
5.4 System Bus
156(1)
5.5 Memory Controller
156(1)
5.6 Debug Support Unit
157(1)
5.7 Peripherals
158(7)
References
162(3)
Chapter 6 AMS Circuit Budgets
Gildas Leger
Antonio Gines
6.1 Introduction
165(1)
6.2 From High-Level Specifications to Low(er)-level Requirements
166(22)
6.3 Budgeting the Transceiver
188(11)
References
196(3)
Chapter 7 Embedded Memories
Hassen Aziza
7.1 Introduction
199(1)
7.2 Memory Systems: Current Landscape
200(5)
7.3 Memory technologies
205(14)
7.4 Conclusion
219(6)
References
219(6)
Part 3 Implementation and Integration
Chapter 8 Implementation Methodologies
Zoran Stamenkovic
Gildas Leger
8.1 Introduction
225(1)
8.2 Semi-Custom Methodology
226(13)
8.3 Full-Custom Methodology
239(4)
References
241(2)
Chapter 9 Semi-Custom Implementation of Digital Circuits
Zoran Stamenkovic
Milos Krstic
9.1 Introduction
243(1)
9.2 MAC Processor
244(7)
9.3 Digital Baseband Processor
251(12)
References
262(1)
Chapter 10 Full-Custom Implementation of Analog and Mixed-Signal Circuits
Gildas Leger
Antonio Gines
10.1 Introduction
263(2)
10.2 Technology Selection
265(6)
10.3 AMS-RF Top-Level Implementation
271(14)
References
282(3)
Chapter 11 Integration
Gildas Leger
Antonio Gines
Zoran Stamenkovic
11.1 Introduction
285(1)
11.2 Package Technology
286(6)
11.3 Antennas
292(5)
11.4 RF-MIMO Transceiver Example
297(14)
References
307(4)
Part 4 Verification and Testing
Chapter 12 Verification
Ernesto Sanchez
12.1 Introduction
311(4)
12.2 Verification Process
315(9)
12.3 Verification Techniques
324(3)
12.4 Testbench
327(2)
12.5 Coverage Metrics
329(5)
12.6 UVM Verification
334(4)
12.7 Conclusions
338(3)
References
338(3)
Chapter 13 Digital Testing
Alberto Bosio
13.1 Introduction
341(2)
13.2 Test for What? Defects and Fault Modelling
343(3)
13.3 Which Test Sequence Do I have to Apply? Test Generation
346(9)
13.4 How the Test Sequence is Applied? Design-for-Test
355(3)
13.5 Conclusions
358(3)
References
358(3)
Chapter 14 Analog, Mixed-Signal, and RF Circuits Test
Gildas Leger
14.1 Introduction
361(1)
14.2 System-Level Considerations
362(3)
14.3 Performance-Oriented Testing
365(12)
14.4 Defect-Oriented Testing
377(10)
References
383(4)
Chapter 15 Embedded Memory Test
Hassen Aziza
Alberto Bosio
15.1 Introduction
387(1)
15.2 SRAM Memory Test
387(6)
15.3 Flash Memory Test
393(5)
15.4 Test Challenges of Emerging Memories
398(7)
References
402(3)
Index 405