| Preface |
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xi | |
| Acknowledgements |
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iii | |
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xv | |
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xxiii | |
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1 | (14) |
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1.1 The Technology Scaling Roadmap so far |
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1 | (2) |
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1.2 New Solutions for Future Technology Nodes |
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3 | (3) |
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1.3 Energy Harvesting in a More than Moore era |
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6 | (1) |
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1.4 Tunnel FETs as a Key Technology for Energy Harvesting |
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7 | (2) |
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1.5 Topics Addressed in This Book |
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9 | (2) |
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11 | (4) |
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12 | (3) |
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2 Tunnel FET: State of the Art |
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15 | (22) |
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2.1 The Tunneling Phenomenon |
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15 | (1) |
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2.2 Band-to-Band Tunneling (BTBT) Current |
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16 | (4) |
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2.3 From Tunnel Diode to Gated p-i-n Structure |
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20 | (17) |
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2.3.1 First Observations of Tunneling in Gated Structures |
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20 | (2) |
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2.3.2 Structural Improvements for Boosted Performance |
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22 | (2) |
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2.3.3 Tunnel FET Evolution over the Past Decades |
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24 | (5) |
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2.3.4 Directions for Further Improvements in Tunneling Devices |
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29 | (3) |
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2.3.5 A Brief Discussion of the Tunneling Device State of the Art |
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32 | (1) |
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32 | (5) |
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3 Tunnel FET: Physical Properties |
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37 | (20) |
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3.1 Thermionic Injection vs. BTBT |
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37 | (4) |
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3.2 Impact of Physical Properties in the TFET Performance |
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41 | (14) |
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3.2.1 Device Structure and Applied Model |
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42 | (2) |
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3.2.2 Dielectric Permittivity, EOT, and Body Thickness Impact |
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44 | (3) |
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3.2.3 Impact of Doping in Drain and Source Regions of Si-TFET |
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47 | (4) |
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3.2.4 Impact of Materials in a Double-gate TFET |
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51 | (1) |
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3.2.5 Impact of Doping in Drain and Source Regions for TFETs with Different Materials |
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52 | (3) |
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55 | (2) |
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56 | (1) |
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4 Tunnel FET: Electrical Properties |
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57 | (22) |
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4.1 Tunnel FET Models for SPICE Simulations |
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57 | (4) |
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4.1.1 Analytic TFET Model |
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57 | (3) |
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4.1.2 TFET Model Based on Lookup Tables |
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60 | (1) |
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4.2 Electrical Characteristics of TFETs |
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61 | (5) |
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4.2.1 Input Characteristics of TFETs |
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61 | (3) |
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4.2.2 Output Characteristics of TFETs |
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64 | (1) |
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4.2.3 Intrinsic Capacitance of TFETs |
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65 | (1) |
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4.3 TFETs in Digital Design |
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66 | (3) |
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4.4 TFETs in Analog Design |
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69 | (4) |
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4.5 TFETs' Circuit Layout Issues and Extra-parasitics |
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73 | (1) |
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74 | (5) |
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75 | (4) |
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5 Tunnel FET-based Charge Pumps |
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79 | (20) |
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79 | (2) |
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5.2 Problems Associated with TFETs in Charge Pumps |
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81 | (3) |
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5.3 Circuit-level Solutions for Reverse-biased TFETs |
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84 | (2) |
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5.4 Proposed TFET-based Charge Pump |
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86 | (2) |
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5.5 Capacitance Optimization of Charge-pump Stage |
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88 | (2) |
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5.6 Charge Pumps' Performance Comparison |
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90 | (5) |
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95 | (4) |
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96 | (3) |
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6 Tunnel FET-based Rectifiers |
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99 | (16) |
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99 | (1) |
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6.2 State-of-the-art TFET-based Rectifier |
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100 | (3) |
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6.3 Advantages of Tunnel FETs in Rectifiers |
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103 | (2) |
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6.4 Drawbacks of Tunnel FETs in Rectifiers |
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105 | (1) |
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6.5 Proposed Tunnel FET-based Rectifier |
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106 | (2) |
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6.6 Optimization of the Proposed Rectifier |
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108 | (3) |
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6.7 Performance Comparison of Rectifiers |
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111 | (1) |
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112 | (3) |
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113 | (2) |
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7 TFET-based Power-management Circuit for RF Energy Harvesting |
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115 | (24) |
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115 | (1) |
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7.2 Challenges in RF Power Transport |
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116 | (4) |
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7.3 Proposed TFET-based PMC |
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120 | (11) |
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121 | (2) |
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123 | (2) |
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7.3.2.1 Challenges in TFET-based boost-converter design |
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125 | (2) |
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7.3.2.2 Advantages of TFETs in PMC and boost converters |
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127 | (1) |
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128 | (3) |
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131 | (4) |
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135 | (4) |
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136 | (3) |
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8 TFET-based Power-management Circuit for Nanowatt DC Energy-Harvesting Sources |
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139 | (20) |
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139 | (1) |
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8.2 Proposed TFET-based PMC for Ultra-low-power DC Sources |
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140 | (10) |
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140 | (4) |
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144 | (1) |
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145 | (5) |
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150 | (6) |
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8.4 Impact of TFET-based Circuit Layout and Parasitics |
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156 | (1) |
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157 | (2) |
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157 | (2) |
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159 | (4) |
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9.1 Summary of Book Contributions |
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161 | (1) |
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162 | (1) |
| Glossary |
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163 | (4) |
| Index |
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167 | (4) |
| About the Authors |
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171 | |