This book offers a technology-oriented assessment of analog and mixed-signal circuits in emerging high-k and multi-gate CMOS technologies. Coverage includes transient threshold voltage variations and integration of tunnel transistors in a multi-gage process.
Since scaling of CMOS is reaching the nanometer area serious limitations enforce the introduction of novel materials, device architectures and device concepts. Multi-gate devices employing high-k gate dielectrics are considered as promising solution overcoming these scaling limitations of conventional planar bulk CMOS. Variation Aware Analog and Mixed-Signal Circuit Design in Emerging Multi-Gate CMOS Technologies provides a technology oriented assessment of analog and mixed-signal circuits in emerging high-k and multi-gate CMOS technologies.
