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On-chip High-Voltage Generator Design: Design Methodology for Charge Pumps 2nd ed. 2016 [Kõva köide]

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  • Formaat: Hardback, 254 pages, kõrgus x laius: 235x155 mm, kaal: 5384 g, XIX, 254 p., 1 Hardback
  • Sari: Analog Circuits and Signal Processing
  • Ilmumisaeg: 08-Oct-2015
  • Kirjastus: Springer International Publishing AG
  • ISBN-10: 331921974X
  • ISBN-13: 9783319219745
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On-chip High-Voltage Generator Design: Design Methodology for Charge Pumps 2nd ed. 2016Suurem pilt
  • Formaat: Hardback, 254 pages, kõrgus x laius: 235x155 mm, kaal: 5384 g, XIX, 254 p., 1 Hardback
  • Sari: Analog Circuits and Signal Processing
  • Ilmumisaeg: 08-Oct-2015
  • Kirjastus: Springer International Publishing AG
  • ISBN-10: 331921974X
  • ISBN-13: 9783319219745
Teised raamatud teemal:
Püsilink: https://www.kriso.ee/db/9783319219745.html
Märksõnad:
Design Methodology for Charge Pumps Second Edition.

This book provides various design techniques for switched-capacitor on-chip high-voltage generators, including charge pump circuits, regulators, level shifters, references, and oscillators. Readers will see these techniques applied to system design in order to address the challenge of how the on-chip high-voltage generator is designed for Flash memories, LCD drivers, and other semiconductor devices to optimize the entire circuit area and power efficiency with a low voltage supply, while minimizing the cost. This new edition includes a variety of useful updates, including coverage of power efficiency and comprehensive optimization methodologies for DC-DC voltage multipliers, modeling of extremely low voltage Dickson charge pumps, and modeling and optimum design of AC-DC switched-capacitor multipliers for energy harvesting and power transfer for RFID.
1 System Overview and Key Design Considerations
1(16)
1.1 Applications of On-Chip High-Voltage Generator
1(10)
1.2 System and Building Block Design Consideration
11(3)
References
14(3)
2 Basics of Charge Pump Circuit
17(50)
2.1 Pump Topologies and Qualitative Comparison
17(16)
2.2 Matrix Expression of Charge Pump Cell
33(1)
2.3 Greinacher-Cockcroft-Walton (CW) Multiplier
34(4)
2.4 Serial-Parallel (SP) Multiplier
38(3)
2.5 Falkner-Dickson Linear (LIN) Multiplier
41(7)
2.6 Fibonacci (FIB) Multiplier
48(6)
2.7 2N Multiplier
54(3)
2.8 Comparison of Five Topologies
57(8)
2.8.1 Ideal Case Where the Parasitic Capacitance Is Negligibly Small
57(2)
2.8.2 Area and Current Efficiency Comparison
59(6)
References
65(2)
3 Design of DC-DC Dickson Charge Pump
67(56)
3.1 Circuit Analysis Under Low-Frequency Operation
67(13)
3.1.1 Dynamic Behavior
67(5)
3.1.2 Equivalent Circuit Model
72(6)
3.1.3 Input and Output Power in Dynamic State
78(1)
3.1.4 Body Effect of Transfer Transistors
79(1)
3.2 Circuit Analysis Under Medium- to High-Frequency Operation
80(23)
3.2.1 DC-DC Charge Pump Using Switching Diodes
82(8)
3.2.2 DC-DC Charge Pump Using Switching MOSFET in Saturation Region
90(5)
3.2.3 DC-DC Charge Pump Using Switching MOSFET in Triode Region
95(8)
3.3 Power Efficiency
103(3)
3.4 Optimum Design
106(12)
3.4.1 Optimization for Maximizing the Output Current
106(2)
3.4.2 Optimization for Minimizing the Rise Time
108(3)
3.4.3 Optimization for Minimizing the Input Power
111(1)
3.4.4 Optimization with Area Power Balance
111(4)
3.4.5 Guideline for Comprehensive Optimum Design
115(3)
3.5 Summary of Useful Equations
118(3)
References
121(2)
4 Design of AC-DC Charge Pump
123(34)
4.1 Continuous Wave (CW) AC-DC Charge Pump Voltage Multipliers
124(18)
4.1.1 Circuit Model
124(8)
4.1.2 Design and Device Parameter Sensitivity on the Pump Performance
132(5)
4.1.3 Optimum Design
137(3)
4.1.4 Impact of AC Source Impedance
140(2)
4.2 Multi-sine (MS) Wave AC-DC Charge Pump Voltage Multipliers
142(12)
4.2.1 Circuit Model
142(9)
4.2.2 Design and Device Parameter Sensitivity on the Pump Performance
151(1)
4.2.3 On the Effectiveness of Multi-sine Wave Over Continuous Wave
151(3)
References
154(3)
5 Charge Pump State of the Art
157(20)
5.1 Switching Diode Design
157(7)
5.2 Capacitor Design
164(2)
5.3 Wide VDD Range Operation Design
166(1)
5.4 Area Efficient Multiple Pump System Design
167(2)
5.5 Noise and Ripple Reduction Design
169(3)
5.6 Stand-by and Active Pump Design
172(1)
References
173(4)
6 Pump Control Circuits
177(44)
6.1 Regulator
178(8)
6.2 Oscillator
186(5)
6.3 Level Shifter
191(16)
6.3.1 NMOS Level Shifter
192(4)
6.3.2 CMOS High-Level Shifter
196(4)
6.3.3 Depletion NMOS and Enhancement PMOS High-Level Shifter
200(3)
6.3.4 CMOS Low-Level Shifter
203(4)
6.4 Voltage Reference
207(10)
6.4.1 Kuijk Cell
208(3)
6.4.2 Brokaw Cell
211(2)
6.4.3 Meijer Cell
213(2)
6.4.4 Banba Cell
215(2)
References
217(4)
7 System Design
221(30)
7.1 Hard-Switching Pump Model
222(2)
7.2 Power Line Resistance Aware Pump Model for a Single Pump Cell
224(4)
7.3 Optimum Design for a Given Power Line Resistance
228(7)
7.4 Pump Behavior Model for Multiple Pump System
235(6)
7.5 Concurrent Pump and Regulator Models for Fast System simulation
241(7)
7.6 System Design Methodology
248(2)
References
250(1)
Index 251
Toru Tanzawa is a Distinguish Member of the Technical Staff, and  Principal Design Engineer, at Micron Japan Ltd.