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Precision Instrumentation Amplifiers and Read-Out Integrated Circuits 2013 ed. [Kõva köide]

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  • Formaat: Hardback, 196 pages, kõrgus x laius: 235x155 mm, kaal: 501 g, XII, 196 p., 1 Hardback
  • Sari: Analog Circuits and Signal Processing
  • Ilmumisaeg: 24-Jul-2012
  • Kirjastus: Springer-Verlag New York Inc.
  • ISBN-10: 146143730X
  • ISBN-13: 9781461437307
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Precision Instrumentation Amplifiers and Read-Out Integrated Circuits 2013 ed.Suurem pilt
  • Formaat: Hardback, 196 pages, kõrgus x laius: 235x155 mm, kaal: 501 g, XII, 196 p., 1 Hardback
  • Sari: Analog Circuits and Signal Processing
  • Ilmumisaeg: 24-Jul-2012
  • Kirjastus: Springer-Verlag New York Inc.
  • ISBN-10: 146143730X
  • ISBN-13: 9781461437307
Teised raamatud teemal:
Püsilink: https://www.kriso.ee/db/9781461437307.html
Märksõnad:
This book offers innovations in the theory, design and realization of low-noise, low-drift interface electronics for bridge transducers and thermocouples. The focus is on power efficient dynamic offset cancellation techniques to mitigate low frequency errors.

This book presents innovative solutions in the design of precision instrumentation amplifier and read-out ICs, which can be used to boost millivolt-level signals transmitted by modern sensors, to levels compatible with the input ranges of typical Analog-to-Digital Converters (ADCs). The discussion includes the theory, design and realization of interface electronics for bridge transducers and thermocouples. It describes the use of power efficient techniques to mitigate low frequency errors, resulting in interface electronics with high accuracy, low noise and low drift. Since this book is mainly about techniques for eliminating low frequency errors, it describes the nature of these errors and the associated dynamic offset cancellation techniques used to mitigate them.
1 Introduction
1(20)
1.1 Motivation
1(2)
1.2 Overview of Read-Out Electronics for Sensors
3(2)
1.3 Instrumentation Amplifier Topologies
5(4)
1.3.1 Three-Opamp Topology
5(1)
1.3.2 Switched-Capacitor Topology
5(1)
1.3.3 Capacitively-Coupled Topology
6(2)
1.3.4 Current-Mode Topology
8(1)
1.3.5 Current-Feedback Topology
8(1)
1.4 Current-Feedback Instrumentation Amplifier
9(2)
1.5 Read-Out ICs
11(3)
1.6 Targeted Sensor Applications and Challenges
14(3)
1.7 Organization of the Thesis
17(4)
References
18(3)
2 Dynamic Offset Cancellation Techniques for Operational Amplifiers
21(30)
2.1 Introduction
22(1)
2.2 Low Frequency Errors
22(1)
2.2.1 Offset
22(1)
2.2.2 1/f Noise
22(1)
2.2.3 Drift
23(1)
2.3 Dynamic Offset Cancellation Techniques
23(7)
2.3.1 Auto-Zeroing
24(4)
2.3.2 Chopping
28(1)
2.3.3 Conclusions
29(1)
2.4 Charge Injection Compensation Techniques in Auto-Zeroed and Chopper Amplifiers
30(7)
2.4.1 Compensation Techniques for Charge Injection
30(1)
2.4.2 Charge Injection and Clock Feed-Through in Chopper Amplifiers
31(4)
2.4.3 Chopper Charge Injection Suppression Techniques
35(2)
2.4.4 Conclusions
37(1)
2.5 Dynamic Offset Compensated Operational Amplifiers
37(9)
2.5.1 Feedback
38(1)
2.5.2 Ping-Pong Operational Amplifier
38(2)
2.5.3 Chopper-CDS Operational Amplifier
40(1)
2.5.4 Offset-Stabilized Operational Amplifiers
41(1)
2.5.5 Chopper Offset-Stabilized Operational Amplifiers
42(4)
2.6 Conclusions
46(5)
References
48(3)
3 Current-Feedback Instrumentation Amplifiers and Gain Accuracy Improvement Techniques
51(18)
3.1 Current-Feedback Instrumentation Amplifier
51(3)
3.1.1 Indirect Current-Feedback Instrumentation Amplifier
52(1)
3.1.2 Direct Current-Feedback Instrumentation Amplifier
53(1)
3.2 Precision Current-Feedback Instrumentation Amplifiers
54(4)
3.2.1 Chopper-Stabilized Current-Feedback Instrumentation Amplifier
55(1)
3.2.2 Ping-Pong Auto-Zeroed Current-Feedback Instrumentation Amplifier
56(1)
3.2.3 Conclusions
57(1)
3.3 Gain Accuracy Improvement Techniques
58(11)
3.3.1 Current-Feedback Instrumentation Amplifier with Resistor-Degenerated Input Stages
59(2)
3.3.2 Chopper-Stabilized Current-Feedback Instrumentation Amplifier with Auto-Gain Calibration
61(1)
3.3.3 Ping-Pong-Pang Current-Feedback Instrumentation Amplifier
62(3)
3.3.4 Conclusions
65(1)
References
66(3)
4 A Chopper Instrumentation Amplifier with Offset Reduction Loop
69(38)
4.1 Amplifier Requirements
69(2)
4.2 Amplifier Architecture
71(3)
4.3 Offset Reduction Loop
74(7)
4.3.1 Basic Concept
74(3)
4.3.2 Transfer Function Analysis
77(4)
4.4 Other Sources of Chopper Ripple
81(3)
4.4.1 Cascode Buffer Isolation
81(2)
4.4.2 Chopper Ripple from the Intermediate Stage
83(1)
4.5 Applying ORL to General Purpose Instrumentation Amplifiers and Operational Amplifiers
84(2)
4.6 Circuit Implementations
86(12)
4.6.1 The Input Stages
86(4)
4.6.2 The Intermediate and Output Stages
90(1)
4.6.3 The Cascode Buffers
91(2)
4.6.4 Constant-Gm Bias Circuit
93(1)
4.6.5 Chopper Clock Design and Layout
94(4)
4.7 Measurement Results
98(4)
4.8 Benchmark and Conclusions
102(5)
References
104(3)
5 A Chopper Instrumentation Amplifier with Gain Error Reduction Loop
107(30)
5.1 Motivation
107(1)
5.2 Dynamic Element Matching
108(1)
5.3 Analog Gain Error Reduction Loop
109(5)
5.3.1 Basic Concept
109(1)
5.3.2 Qualitative Analysis
110(1)
5.3.3 Quantitative Analysis
110(4)
5.4 Digitally-Assisted Gain Error Reduction Loop
114(2)
5.5 Comparison Between ORL and GERL
116(1)
5.6 The Effects of Chopping, DEM and GERL on CFIA Performance
117(1)
5.7 Circuit Implementations
118(9)
5.7.1 Current-Feedback Instrumentation Amplifier with Analog Gain Error Reduction Loop
118(6)
5.7.2 Current-Feedback Instrumentation Amplifier with Digitally-Assisted Gain Error Reduction Loop
124(3)
5.8 Measurement Results
127(8)
5.8.1 Noise
128(1)
5.8.2 Output Ripple Measurement
128(1)
5.8.3 INL
129(2)
5.8.4 Gain Accuracy and Gain Drift
131(2)
5.8.5 Settling Behavior of Analog GERL and Digitally-Assisted GERL
133(2)
5.9 Benchmark and Conclusions
135(2)
References
136(1)
6 Read-Out Integrated Circuits
137(42)
6.1 ADC Requirements
137(3)
6.2 Architecture Design of the ADC
140(11)
6.2.1 Modulator Topology
140(5)
6.2.2 Non-Idealities in the δ Modulator
145(6)
6.3 Gain Accuracy Improvement Techniques in the Read-Out IC
151(4)
6.3.1 Dynamic Element Matching
151(2)
6.3.2 Digitally-Assisted Gain Error Correction Scheme
153(2)
6.4 Offset and 1/f Noise Suppression Techniques in the Read-Out IC
155(4)
6.4.1 Previous Approach (Multi-Stage Chopping and System-Level Chopping)
155(1)
6.4.2 Proposed Approach (Input-Stage Chopping Combined with System-Level Chopping)
156(3)
6.5 Error Correction Techniques Summary
159(1)
6.6 Circuit Implementations
159(9)
6.6.1 CFIA Implementation
159(4)
6.6.2 ADC Implementation
163(5)
6.7 Measurement Results
168(8)
6.8 Conclusions
176(3)
References
177(2)
7 Conclusions
179(4)
7.1 Original Contributions
179(1)
7.2
Chapter 4
179(1)
7.3
Chapter 5
180(1)
7.4
Chapter 6
180(1)
7.5 Main Findings
181(1)
7.6 Other Applications of this Work
181(1)
7.7 Future Work
181(2)
References
182(1)
Summary 183(6)
About the Author 189(2)
Index 191
Rong Wu was born on November 4, 1981. She received the B.Eng. degree in microelectronics from Fudan University, Shanghai, China, in 2003. After one year of graduate studies in Fudan, she started the M.Sc. program in electrical engineering at Delft University of Technology, Delft, the Netherlands, in September, 2004. She received her M.Sc. degree from TU Delft in February 2006 and her M.Sc. degree from Fudan University in July, 2006, both in electrical engineering.

In October 2006, she joined the Electronic Instrumentation Laboratory of the TU Delft, pursuing her Ph.D degree on the subject of precision amplifier and sigma-delta ADCs for sensor read-out. In December 2011, she received her Ph.D degree. Currently, she is with precision ADC group of Analog Devices in Wilmington, MA. Her research interests include sensors, precision analog and mixed-signal interface electronics.