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Wake-up Receiver Based Ultra-Low-Power WBAN 2014 ed. [Kõva köide]

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  • Formaat: Hardback, 150 pages, kõrgus x laius: 235x155 mm, kaal: 424 g, 53 Illustrations, color; 32 Illustrations, black and white; XV, 150 p. 85 illus., 53 illus. in color., 1 Hardback
  • Sari: Analog Circuits and Signal Processing
  • Ilmumisaeg: 24-Jun-2014
  • Kirjastus: Springer International Publishing AG
  • ISBN-10: 3319064495
  • ISBN-13: 9783319064499
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Wake-up Receiver Based Ultra-Low-Power WBAN 2014 ed.Suurem pilt
  • Formaat: Hardback, 150 pages, kõrgus x laius: 235x155 mm, kaal: 424 g, 53 Illustrations, color; 32 Illustrations, black and white; XV, 150 p. 85 illus., 53 illus. in color., 1 Hardback
  • Sari: Analog Circuits and Signal Processing
  • Ilmumisaeg: 24-Jun-2014
  • Kirjastus: Springer International Publishing AG
  • ISBN-10: 3319064495
  • ISBN-13: 9783319064499
Teised raamatud teemal:
Püsilink: https://www.kriso.ee/db/9783319064499.html
Märksõnad:

This book presents the cross-layer design and optimization of wake-up receivers for wireless body area networks (WBAN), with an emphasis on low-power circuit design. This includes the analysis of medium access control (MAC) protocols, mixer-first receiver design, and implications of receiver impairments on wideband frequency-shift-keying (FSK) receivers. Readers will learn how the overall power consumption is reduced by exploiting the characteristics of body area networks. Theoretical models presented are validated with two different receiver implementations, in 90nm and 40nm CMOS technology.

1 Introduction 1(6)
1.1 Wake-Up Receiver
2(1)
1.2 Wake-Up Receiver Challenges
2(1)
1.3 Scope of the Book
3(1)
1.4 Book Outline
4(1)
References
5(2)
2 Wireless Body Area Networks 7(22)
2.1 Wireless Sensor Network Properties
7(1)
2.2 MAC Layer Energy Consumption Model
8(14)
2.2.1 Address Coding
9(4)
2.2.2 Radio Model
13(2)
2.2.3 Network Statistics
15(1)
2.2.4 WURx-Enhanced Asynchronous Network
16(2)
2.2.5 WURx-Less Asynchronous Network
18(1)
2.2.6 Synchronous Network
19(2)
2.2.7 Application Example
21(1)
2.3 Applications
22(2)
2.4 Solution Space
24(3)
2.5 Conclusion
27(1)
References
28(1)
3 Wake-up Receiver System Level Design 29(32)
3.1 State of the Art
30(1)
3.2 Modulation Complexity
31(1)
3.3 Zero-IF Architecture
31(1)
3.4 FSK Receiver Model
32(6)
3.4.1 Non-ideal Receiver Front-End
34(1)
3.4.2 Receiver Phase Noise and Jitter
35(2)
3.4.3 Limiter Discriminator Model
37(1)
3.5 Effects of Receiver Imperfections on FSK BER
38(16)
3.5.1 Bit Error Rate Analysis
39(11)
3.5.2 Simulation and Model Results
50(4)
3.6 Wake-up Receiver Specifications
54(3)
3.6.1 Interferer Robustness
55(1)
3.6.2 Sensitivity and Noise Figure
55(1)
3.6.3 Phase Noise
56(1)
3.7 Conclusion
57(1)
References
57(4)
4 Low-Power Zero-IF Receiver Design 61(32)
4.1 Passive Mixer-First Design
62(15)
4.1.1 Time-Domain Passive Mixer Model
62(4)
4.1.2 Voltage Conversion Gain
66(2)
4.1.3 Input Impedance
68(3)
4.1.4 Transducer Power Gain
71(1)
4.1.5 Maximal Transducer Power Gain
71(2)
4.1.6 Noise Figure
73(2)
4.1.7 Optimal Design
75(2)
4.2 Low-Power Local Oscillator Design
77(8)
4.2.1 Oscillator Design Considerations for Minimum Power
77(1)
4.2.2 LC Oscillator Design
78(1)
4.2.3 Ring Oscillator Design
79(2)
4.2.4 LC and Ring Oscillator Design Approach
81(1)
4.2.5 LC Versus Ring Oscillators
82(3)
4.3 FSK Demodulator
85(1)
4.4 Automatic Frequency Control Loop
86(4)
4.4.1 Closed Loop Analysis
87(2)
4.4.2 System Level Implications
89(1)
4.5 Conclusion
90(1)
References
90(3)
5 Receiver Front-End Version 1 93(16)
5.1 Implementation
93(5)
5.1.1 Mixer
94(1)
5.1.2 Local Oscillator
95(2)
5.1.3 IF Amplifier
97(1)
5.2 Measurement Results
98(5)
5.2.1 LO Measurements
100(1)
5.2.2 Amplifier Measurements
101(1)
5.2.3 Receiver Front-End Measurements
102(1)
5.3 Comparison with Literature
103(3)
5.4 Conclusion
106(1)
References
106(3)
6 Receiver Front-End Version 2 109(26)
6.1 Design Targets
109(1)
6.2 Implementation
109(11)
6.2.1 Passive Mixer
110(1)
6.2.2 Local Oscillator
111(2)
6.2.3 Variable Gain Amplifier
113(1)
6.2.4 Demodulator
114(2)
6.2.5 Automatic Frequency Control Loop
116(4)
6.3 Receiver Front-End Measurements
120(10)
6.3.1 DCDM Demodulator
122(1)
6.3.2 DCO
123(3)
6.3.3 Bit Error Rate
126(1)
6.3.4 Blocker Rejection
127(1)
6.3.5 AFC Loop
128(2)
6.4 Comparison with Literature
130(3)
6.5 Conclusion
133(1)
References
133(2)
7 Conclusions 135(2)
Appendix A: MAC Protocol Packet Statistics 137(8)
Appendix B: Nordic Radio Parameters 145(2)
Appendix C: Simulation Script 147(2)
Index 149