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Operation and Modeling of the MOS Transistor 3rd edition [Pehme köide]

  • Formaat: Paperback / softback, 752 pages
  • Ilmumisaeg: 29-Oct-2010
  • Kirjastus: Oxford University Press Inc
  • ISBN-10: 0195170156
  • ISBN-13: 9780195170153
  • Formaat: Paperback / softback, 752 pages
  • Ilmumisaeg: 29-Oct-2010
  • Kirjastus: Oxford University Press Inc
  • ISBN-10: 0195170156
  • ISBN-13: 9780195170153
Operation and Modeling of the MOS Transistor has become a standard in academia and industry. Extensively revised and updated, the third edition of this highly acclaimed text provides a thorough treatment of the MOS transistor--the key element of modern microelectronic chips.

New to this edition:

* Energy bands and the energy barrier viewpoint are integrated into the discussion in a smooth, simple manner
* Expanded discussion of small-dimension effects, including velocity saturation, drain-induced barrier lowering, ballistic operation, polysilicon depletion, quantum effects, gate tunneling current, and gate-induced drain leakage
* Expanded discussion of small-signal modeling, including gate and substrate current modeling and flicker noise
* New chapter on substrate nonuniformity and structural effects, discussing transversal and lateral (halo) doping nonuniformity, stress and well proximity effects, and statistical variability
* A completely re-written chapter on modeling for circuit simulation, covering the considerations and pitfalls in the development of models for computer-aided design
* Extensively updated bibliography
* An accompanying website includes additional details not covered in the text, as well as model computer code

Arvustused

"The only book that covers device physics and modeling in a clear and cohesive fashion."--Ali M. Niknejad, University of California-Berkeley "This is an excellent book and one that is very well respected within the Integrated Circuits community."--Adel Sedra, University of Toronto

Preface xvii
Chapter 1 Semiconductors, Junctions, and MOSFET Overview 1(64)
1.1 Introduction
1(1)
1.2 Semiconductors
1(14)
1.2.1 Intrinsic Semiconductors, Free Electrons, and Holes
2(2)
1.2.2 Extrinsic Semiconductors
4(3)
1.2.3 Equilibrium in the Absence of Electric Field
7(3)
1.2.4 Equilibrium in the Presence of Electric Field
10(2)
1.2.5 Nonequilibrium; Quasi-Fermi Levles
12(1)
1.2.6 Relations between Charge Density, Electric Field, and Potential; Poisson's Equation
13(2)
1.3 Conduction
15(11)
1.3.1 Transit Time
15(2)
1.3.2 Drift
17(5)
1.3.3 Diffusion
22(3)
1.3.4 Total Current
25(1)
1.4 Contact Potentials
26(6)
1.5 The pn Junction
32(11)
1.6 Overview of the MOS Transitor
43(11)
1.6.1 Basic Structure
43(4)
1.6.2 A Qualitative Description of MOS Transistor Operation
47(2)
1.6.3 A Fluid Dynamical Analog
49(3)
1.6.4 MOS Transistor Characteristics
52(2)
1.7 Fabrication Processes and Device Features
54(6)
1.8 A Brief Overview of This Book
60(2)
References
62(1)
Problems
63(2)
Chapter 2 The Two-Terminal MOS Structure 65(50)
2.1 Introduction
65(1)
2.2 The Flatband Voltage
66(7)
2.3 Potential Balance and Charge Balance
73(2)
2.4 Effect of Gate-Body Voltage on Surface Condition
75(11)
2.4.1 Flatband Condition
75(1)
2.4.2 Accumulation
75(1)
2.4.3 Depletion and Inversion
76(4)
2.4.4 General Analysis
80(6)
2.5 Accumulation and Depletion
86(2)
2.6 Inversion
88(14)
2.6.1 General Relations and Regions of Inversion
88(6)
2.6.2 Strong Inversion
94(4)
2.6.3 Weak Inversion
98(3)
2.6.4 Moderate Inversion
101(1)
2.7 Small-Signal Capacitance
102(9)
2.8 Summary of Properties of the Regions of Inversion
111(1)
References
111(1)
Problems
112(3)
Chapter 3 The Three-Terminal MOS Structure 115(36)
3.1 Introduction
115(1)
3.2 Contacting the Inversion Layer
115(16)
3.3 The Body Effect
131(1)
3.4 Regions of Inversion
132(9)
3.4.1 Approximate Limits
132(4)
3.4.2 Strong Inversion
136(2)
3.4.3 Weak Inversion
138(3)
3.4.4 Moderate Inversion
141(1)
3.5 A "KB Control" Point of View
141(6)
3.5.1 Fundamentals
141(4)
3.5.2 The "Pinchoff Voltage"
145(2)
3.6 Uses for Three-Terminal MOS Structures
147(1)
References
148(1)
Problems
149(2)
Chapter 4 The Four-Terminal MOS Transistor 151(92)
4.1 Introduction
151(5)
4.2 Transistor Regions of Operation
156(2)
4.3 Complete All-Region Model
158(14)
4.4 Simplified All-Region Models
172(9)
4.4.1 Linearizing the Depletion Region Charge
172(1)
4.4.2 Body-Referenced Simplified All-Region Models
173(3)
4.4.3 Source-Referenced Simplified All-Region Models
176(1)
4.4.4 Charge Formulation of Simplified All-Region Models
177(4)
4.5 Models Based on Quasi-Fermi Potentials
181(2)
4.6 Regions of Inversion in Terms of Terminal Voltages
183(3)
4.7 Strong Inversion
186(18)
4.7.1 Complete Strong-Inversion Model
186(6)
4.7.2 Body-Referenced Simplified Strong-Inversion Model
192(1)
4.7.3 Source-Referenced Simplified Strong-Inversion Model
192(11)
4.7.4 Model Origin Summary
203(1)
4.8 Weak Inversion
204(4)
4.8.1 Special Conditions in Weak Inversion
204(1)
4.8.2 Body-Referenced Model
205(1)
4.8.3 Source-Referenced Model
206(2)
4.9 Moderate-Inversion and Single-Piece Models
208(2)
4.10 Source-Referenced vs. Body-Referenced Modeling
210(2)
4.11 Effective Mobility
212(10)
4.12 Effect of Extrinsic Source and Drain Series Resistances
222(2)
4.13 Temperature Effects
224(2)
4.14 Breakdown
226(2)
4.15 The p-Channel MOS Transistor
228(2)
4.16 Enhancement-Mode and Depletion-Mode Transistors
230(1)
4.17 Model Parameter Values, Model Accuracy, and Model Comparison
231(2)
References
233(7)
Problems
240(3)
Chapter 5 Small-Dimension Effects 243(86)
5.1 Introduction
243(1)
5.2 Carrier Velocity Saturation
244(9)
5.3 Channel Length Modulation
253(6)
5.4 Charge Sharing
259(12)
5.4.1 Introduction
259(2)
5.4.2 Short-Channel Devices
261(5)
5.4.3 Narrow-Channel Devices
266(4)
5.4.4 Limitations of Charge-Sharing Models
270(1)
5.5 Drain-Induced Barrier Lowering
271(4)
5.6 Punchthrough
275(2)
5.7 Combining Several Small-Dimension Effects into One Model—A Strong-Inversion Example
277(3)
5.8 Hot Carrier Effects; Impact Ionization
280(5)
5.9 Velocity Overshoot and Ballistic Operation
285(3)
5.10 Polysilicon Depletion
288(5)
5.11 Quantum Mechanical Effects
293(2)
5.12 DC Gate Current
295(7)
5.13 Junction Leakage; Band-to-Band Tunneling; GIDL
302(3)
5.14 Leakage Currents—Particular Cases
305(2)
5.15 The Quest for Ever-Smaller Devices
307(9)
5.15.1 Introduction
307(1)
5.15.2 Classical Scaling
308(4)
5.15.3 Modem Scaling
312(4)
References
316(11)
Problems
327(2)
Chapter 6 The MOS Transistor in Dynamic Operation-Large-Signal Modeling 329(56)
6.1 Introduction
329(1)
6.2 Quasi-Static Operation
330(4)
6.3 Terminal Currents in Quasi-Static Operation
334(7)
6.4 Evaluation of Intrinsic Charges in Quasi-Static Operation
341(14)
6.4.1 Introduction
341(1)
6.4.2 Strong Inversion
342(6)
6.4.3 Moderate Inversion
348(1)
6.4.4 Weak Inversion
348(2)
6.4.5 All-Region Model
350(2)
6.4.6 Depletion and Accumulation
352(1)
6.4.7 Plots of Charges vs. VGS
353(1)
6.4.8 Use of Intrinsic Charges in Evaluating the Terminal Currents
354(1)
6.5 Transit Time under DC Conditions
355(2)
6.6 Limitations of the Quasi-Static Model
357(6)
6.7 Non-Quasi-Static Modeling
363(8)
6.7.1 Introduction
363(1)
6.7.2 The Continuity Equation
364(1)
6.7.3 Non-Quasi-Static Analysis
365(6)
6.8 Extrinsic Parasitics
371(8)
6.8.1 Extrinsic Capacitances
371(3)
6.8.2 Extrinsic Resistances
374(4)
6.8.3 Temperature Dependence
378(1)
6.8.4 Simplified Models
378(1)
References
379(4)
Problems
383(2)
Chapter 7 Small-Signal Modeling for Low and Medium Frequencies 385(88)
7.1 Introduction
385(1)
7.2 A Low-Frequency Small-Signal Model for the Intrinsic Part
386(28)
7.2.1 Introduction
386(1)
7.2.2 Small-Signal Model for the Drain-to-Source Current
386(4)
7.2.3 Small-Signal Model for the Gate and Body Currents
390(3)
7.2.4 Complete Low-Frequency Small-Signal Model for the Intrinsic Part
393(3)
7.2.5 Strong Inversion
396(11)
7.2.6 Weak Inversion
407(2)
7.2.7 Moderate Inversion
409(1)
7.2.8 All-Region Models
409(5)
7.3 A Medium-Frequency Small-Signal Model for the Intrinsic Part
414(21)
7.3.1 Introduction
414(1)
7.3.2 Intrinsic Capacitances
414(21)
7.4 Including the Extrinsic Part
435(1)
7.5 Noise
436(20)
7.5.1 Introduction
436(4)
7.5.2 White Noise
440(10)
7.5.3 Flicker Noise
450(6)
7.5.4 Noise in Extrinsic Resistances
456(1)
7.5.5 Including Noise in Small-Signal Circuits
456(1)
7.6 All-Region Models
456(2)
References
458(11)
Problems
469(4)
Chapter 8 High-Frequency Small-Signal Models 473(74)
8.1 Introduction
473(1)
8.2 A Complete Quasi-Static Model for the Intrinsic Part
474(18)
8.2.1 Complete Description of Intrinsic Capacitance Effects
474(4)
8.2.2 Small-Signal Equivalent Circuit Topologies
478(6)
8.2.3 Evaluation of Capacitances
484(7)
8.2.4 Frequency Region of Validity
491(1)
8.3 y-Parameter Models
492(7)
8.4 Non-Quasi-Static Models
499(25)
8.4.1 Introduction
499(1)
8.4.2 A Non-Quasi-Static Strong-Inversion Model
500(19)
8.4.3 Other Approximations and Higher-Order Models
519(3)
8.4.4 Model Comparison
522(2)
8.5 High-Frequency Noise
524(5)
8.6 Considerations in MOSFET Modeling for RF Applications
529(9)
References
538(4)
Problems
542(5)
Chapter 9 Substrate Nonuniformity and Other Structural Effects 547(53)
9.1 Introduction
547(1)
9.2 Ion Implantation and Substrate Nonuniformity
548(3)
9.3 Substrate Transverse Nonuniformity
551(20)
9.3.1 Preliminaries
551(4)
9.3.2 Threshold Voltage
555(9)
9.3.3 Drain Current
564(2)
9.3.4 Buried-Channel Devices
566(5)
9.4 Substrate Lateral Nonuniformity
571(6)
9.5 Well Proximity Effect
577(4)
9.6 Stress Effects
581(3)
9.7 Statistical Variability
584(8)
References
592(6)
Problems
598(2)
Chapter 10 Modeling for Circuit Simulation 600(53)
10.1 Introduction
600(1)
10.2 Types of Models
601(5)
10.2.1 Models for Device Analysis and Design
601(1)
10.2.2 Device Models for Circuit Simulation
602(4)
10.3 Attributes of Good Compact Models
606(2)
10.4 Model Formulation
608(7)
10.4.1 General Consideration and Choices
609(6)
10.5 Model Implementation in Circuit Simulators
615(3)
10.6 Model Testing
618(1)
10.7 Parameter Extraction
618(17)
10.8 Simulation and Extraction for RF Applications
635(3)
10.9 Common MOSFET Models Available in Circuit Simulators
638(4)
10.9.1 BSIM
638(2)
10.9.2 EKV
640(1)
10.9.3 PSP
640(2)
10.9.4 Other Models
642(1)
References
642(6)
Problems
648(5)
Appendices
A Basic Laws of Electrostatics in One Dimension
653(6)
B Quasi-Fermi Levels and Currents
659(2)
C General Analysis of the Two-Terminal MOS Structure
661(5)
D Careful Definitions for the Limits of Moderate Inversion
666(3)
E General Analysis of the Three-Terminal MOS Structure
669(5)
F Drain Current Formulation Using Quasi-Fermi Potentials
674(4)
G Modeling Based on Pinchoff Voltage and Related Topics
678(6)
H Evaluation of the Intrinsic Transient Source and Drain Currents
684(3)
I Quantities Used in the Derivation of the Non-Quasi-Static y-Parameter Model
687(3)
J Analysis of Buried-Channel Devices
690(10)
K MOSFET Model Benchmark Tests
700(13)
Index 713
Yannis Tsividis is Charles Batchelor Professor of Electrical Engineering at Columbia University. His work with MOS transistors began in 1975 as part of his Ph.D. work at the University of California, Berkeley, in the context of the design and fabrication of the first fully-integrated MOS operational amplifier. He is a Fellow of IEEE. Among his awards are the 1984 IEEE W. R. G. Baker Prize for the best IEEE publication and the 2003 IEEE International Solid-State Circuits Conference Outstanding Paper Award.

Colin McAndrew became involved with modeling semiconductor devices in 1987 and has contributed to the development of models for MOS, bipolar, and passive devices. He developed the backward-propagation-of-variation (BPV) technique for statistical modeling and has been a primary advocate of the use of Verilog-A and compilers for device modeling. He has a Ph.D. from the University of Waterloo, works at Freescale Semiconductor, and is a Fellow of the IEEE.