Operation and Modeling of the MOS Transistor has become a standard in academia and industry. Extensively revised and updated, the third edition of this highly acclaimed text provides a thorough treatment of the MOS transistor--the key element of modern microelectronic chips.
1. : SEMICONDUCTORS, JUNCTIONS, AND MOSFET OVERVIEW; 1.1 INTRODUCTION;
1.2 SEMICONDUCTORS; 1.2.1 INTRINSIC SEMICONDUCTORS, FREE ELECTRONS, AND
HOLES; 1.2.2 EXTRINSIC SEMICONDUCTORS; 1.2.3 EQUILIBRIUM IN THE ABSENCE OF
ELECTRIC FIELD; 1.2.4 EQUILIBRIUM IN THE PRESENCE OF ELECTRIC FIELD; 1.2.5
SEMICONDUCTORS IN NONEQUILIBRIUM; QUASI-FERMI LEVELS; 1.2.6 RELATIONS BETWEEN
CHARGE DENSITY, ELECTRIC FIELD, AND; POTENTIALS; POISSON'S EQUATION; 1.3
CONDUCTION; 1.3.1 TRANSIT TIME; 1.3.2 DRIFT; 1.3.3 DIFFUSION; 1.3.4 TOTAL
CURRENT; 1.4 CONTACT POTENTIALS; 1.5 THEPN JUNCTION; 1.6 OVERVIEW OF THE MOS
TRANSISTORS; 1.6.1 BASIC STRUCTURE; 1.6.2 A QUALITATIVE DESCRIPTION OF MOS
TRANSISTOR OPERATION; 1.6.3 A FLUID DYNAMICAL ANALOG; 1.6.4 MOS TRANSISTOR
CHARACTERISTICS; 1.7 FABRICATION PROCESSES AND DEVICE FEATURES; 1.8 A BRIEF
OVERVIEW OF THIS BOOK; REFERENCES; PROBLEMS;
2. : THE TWO TERMINAL MOS
STRUCTURE; 2.1 INTRODUCTION; 2.2 THE FLAT-BAND VOLTAGE; 2.3 POTENTIAL BALANCE
AND CHARGE BALANCE; 2.4 EFFECT OF GATE - BODY VOLTAGE ON SURFACE CONDITION;
2.4.1 FLAT -BAND CONDITION; 2.4.2 ACCUMULATION; 2.4.3 DEPLETION AND
INVERSION; 2.4.4 GENERAL ANALYSIS; 2.5 ACCUMULATION AND DEPLETION; 2.6
INVERSION; 2.6.1 GENERAL RELATIONS AND REGIONS OF INVERSION; 2.6.2 STRONG
INVERSION; 2.6.3 WEAK INVERSION; 2.6.4 MODERATE INVERSION; 2.7 SMALL - SIGNAL
CAPACITANCE; 2.8 SUMMARY OF PROPERTIES OF THE REGIONS OF INVERSION;
REFERENCES; PROBLEMS;
3. : THE THREE TERMINAL MOS STRUCTURE; 3.1
INTRODUCTION; 3.2 CONTACTING THE INVERSION LAYER; 3.3 THE BODY EFFECT; 3.4
REGIONS OF INVERSION; 3.4.1 APPROXIMATE LIMITS; 3.4.2 STRONG INVERSION; 3.4.3
WEAK INVERSION; 3.5 A "CB CONTROL" POINT OF VIEW; 3.5.1 FUNDAMENTALS; 3.5.2
THE "PINCHOFF VOLTAGE"; REFERENCES; PROBLEMS;
4. : THE FOUR - TERMINAL MOS
TRANSISTOR; 4.1 INTRODUCTION; 4.2 TRANSISTOR REGIONS OF OPERATION; 4.3
COMPLETE ALL - REGION MODEL; 4.3.1 CURRENT EQUATIONS; 4.4 SIMPLIFIED ALL -
REGION MODELS; 4.4.1 LINEARIZING THE DEPLETION REGION CHARGE; 4.4.2 BODY
-REFERENCED SIMPLIFIED ALL - REGION MODELS; 4.4.3 SOURCE - REFERENCED
SIMPLIFIED ALL - REGION MODELS; 4.4.4 CHARGE FORMULATION OF SIMPLIFIED
ALL-REGION MODELS; 4.5 MODELS BASED ON QUASI - FERMI POTENTIALS; 4.6 REGIONS
OF INVERSION IN TERMS OF TERMINAL VOLTAGES; 4.7 STRONG INVERSION; 4.7.1
COMPLETE STRONG -INVERSION MODEL; 4.7.2 BODY - REFERENCED SIMPLIFIED STRONG
INVERSION MODEL; 4.7.3 SOURCE - REFERENCED SIMPLIFIED STRONG - INVERSION
MODEL; 4.7.4 MODEL ORIGIN SUMMARY; 4.8 WEAK INVERSION; 4.8.1 SPECIAL
CONDITIONS IN WEAK INVERSION; 4.9 MODERATE INVERSION AND SINGLE - PIECE
MODELS; 4.10 SOURCE - REFERENCED VS. BODY - REFERENCED MODELING; 4.11
EFFECTIVE MOBILITY; 4.12 EFFECT OF EXTRINSIC SOURCE AND DRAIN SERIES
RESISTANCES; 4.13 TEMPERATURE EFFECTS; 4.14 BREAKDOWN; 4.15 THE P-CHANNEL MOS
TRANSISTOR; 4.16 ENHANCEMENT - MODE AND DEPLETION - MODE TRANSISTORS; 4.17
MODEL PARAMETER VALUES, MODEL ACCURACY, AND MODEL COMPARISON; REFERENCES;
PROBLEMS;
5. : SMALL DIMENSION EFFECTS; 5.1 INTRODUCTION; 5.2 CARRIER
VELOCITY SATURATION; 5.3 CHANNEL LENGTH MODULATION; 5.4 CHARGE SHARING; 5.4.1
INTRODUCTION; 5.4.2 SHORT - CHANNEL DEVICES; 5.4.3 NARROW - CHANNEL DEVICES;
5.4.4 LIMITATIONS OF CHARGE SHARING MODELS; 5.5 DRAIN - INDUCED BARRIER
LOWERING; 5.6 PUNCHTHROUGH; 5.7 COMBINING SEVERAL SMALL - DIMENSION EFFECTS
INTO ONE MODEL - A STRONG INVERSION EXAMPLE; 5.8 HOT CARRIER EFFECTS; IMPACT
IONIZATION; 5.9 VELOCITY OVERSHOOT AND BALLISTIC OPEATION; 5.10 POLYSILICON
DEPLETION; 5.11 QUANTUM MECHANICAL EFFECTS; 5.12 DC GATE CURRENT; 5.13
JUNCTION LEAKAGE; BAND - TO - BAND TUNNELING; GIDL; 5.14 LEAKAGE CURRENTS -
EXAMPLES; 5.15 THE QUEST FOR EVER - SMALLER DEVICES; 5.15.1 INTRODUCTION;
5.15.2 CLASSICAL SCALING; 5.15.3 MODERN SCALING; REFERENCES; PROBLEMS;
6. :
THE MOS TRANSISTOR IN DYNAMIC OPERATION - LARGE SIGNAL MODELING; 6.1
INTRODUCTION; 6.2 QUASI - STATIC OPERATION; 6.3 TERMINAL CURRENTS IN QUASI -
STATIC OPERATION; 6.4 EVALUATION OF INTRINSIC CHARGERS IN QUASI - STATIC
OPERATION; 6.4.1 INTRODUCTION; 6.4.2 STRONG INVERSION; 6.4.3 MODERATE
INVERSION; 6.4.4 WEAK INVERSION; 6.4.5 ALL - REGION MODEL; 6.4.6 DEPLETION
AND ACCUMULATION; 6.4.7 PLOTS OF CHARGERS VERSUS VGS; 6.4.8 USE OF INTRINSIC
CHARGERS IN EVALUATION THE TERMINAL CURRENTS; 6.5 TRANSIT TIME UNDER DC
CONDITIONS; 6.6 LIMITATIONS OF THE QUASI - STATIC MODEL; 6.7 NON - QUASI -
STATIC MODELING; 6.7.1 INTRODUCTION; 6.7.2 THE CONTINUITY EQUATION; 6.7.3 NON
- QUASI - STATIC ANALYSIS; 6.8 EXTRINSIC PARASITICS; 6.8.1 EXTRINSIC
CAPACITANCES; 6.8.2 EXTRINSIC RESISTANCE; 6.8.3 TEMPERATURE DEPENDENCE; 6.8.4
SIMPLIFIED MODELS; REFERENCES; PROBLEMS;
7. : SMALL - SIGNAL MODELING FOR LOW
AND MEDIUM FREQUENCIES; 7.1 INTRODUCTION; 7.2 A LOW - FREQUENCY SMALL -
SIGNAL MODEL FOR THE INTRINSIC PART; 7.2.1 INTRODUCTION; 7.2.2 SMALL - SIGNAL
MODEL FOR THE DRAIN - SOURCE CURRENT; 7.2.3 SMALL - SIGNAL MODEL FOR THE GATE
AND BODY CURRENT; 7.2.4 COMPLETE LOW - FREQUENCY SMALL - SIGNAL MODEL FOR THE
INTRINSIC PART; 7.2.5 STRONG INVERSION; 7.2.6 WEAK INVERSION; 7.2.7 MODERATE
INVERSION; 7.2.8 ALL - REGION MODELS; 7.3 A MEDIUM - FREQUENCY SMALL - SIGNAL
MODEL FOR THE INTRINSIC PART; 7.3.1 INTRODUCTION; 7.3.2 INTRINSIC
CAPACITANCES; 7.4 INCLUDING THE EXTRINSIC PART; 7.5 NOISE; 7.5.1
INTRODUCTION; 7.5.2 WHITE NOISE; 7.5.3 FLICKER NOISE; 7.5.4 NOISE IN
EXTRINSIC RESISTANCES; 7.5.5. INCLUDING NOISE IN SMALL - SIGNAL CIRCUITS; 7.6
ALL - REGION MODELS; REFERENCES; PROBLEMS;
8. : HIGH FREQUENCY SMALL -
SIGNALS MODELS; 8.1 INTRODUCTION; 8.2 A COMPLETE QUASI - STATIC MODEL; 8.2.1
COMPLETE DESCRIPTION OF INTRINSIC CAPACITANCE EFFECTS; 8.2.2 SMALL - SIGNAL
EQUIVALENT CIRCUIT TOPOLOGIES; 8.2.3 EVALUATION OF CAPACITANCES; 8.2.4
FREQUENCY REGION OF VALIDITY; 8.3 Y- PARAMETER MODELS; 8.4 NON - QUASI -
STATIC MODELS; 8.4.1 INTRODUCTION; 8.4.2 A NON - QUASI - STATIC STRONG -
INVERSION MODEL; 8.4.3 OTHER APPROXIMATION AND HIGHER - ODER MODELS; 8.4.4
MODEL COMPARISON; 8.5 HIGH - FREQUENCY NOISE; 8.6 CONSIDERATION IN MOSFET
MODELING FOR RF APPLICATIONS; REFERENCES; PROBLEMS;
9. : SUBSTRATE
NONUNIFORMITY AND STRUCTURAL EFFECTS; 9.1 INTRODUCTION; 9.2 ION IMPLANTATION
AND SUBSTRATE NONUNIFORMITY; 9.3 SUBSTRATE TRANSVERSE NONUNIFORMITY; 9.3.1
PRELIMINARIES; 9.3.2 THRESHOLD VOLTAGE; 9.3.3 DRAIN CURRENT; 9.3.4 BURIED
CHANNEL DEVICES; 9.4 SUBSTRATE LATERAL NONUNIFORMITY; 9.5 WELL PROXIMITY
EFFECT; 9.6 STRESS EFFECTS; 9.7 STATISTICAL VARIABILITY; REFERENCES;
PROBLEMS;
10. : MOSFET MODELING FOR CIRCUIT SIMULATION; 10.1 INTRODUCTION;
10.2 TYPES OF MODELS; 10.2.1 MODELS FOR DEVICE ANALYSIS AND DESIGN; 10.2.2
DEVICE MODELS FOR CIRCUIT SIMULATION; 10.3 ATTRIBUTES OF GOOD COMPACT MODELS;
10.4 MODEL FORMULATION; 10.5 MODEL IMPLEMENTATION IN CIRCUIT SIMULATORS; 10.6
MODEL TESTING; 10.7 PARAMETER EXTRACTION; 10.8 SIMULATION AND EXTRACTION FOR
RF APPLICATIONS; 10.9 COMMON MOSFET MODELS AVAILABLE IN CIRCUIT SIMULATORS;
10.9.1 BSIM; 10.9.2 EKV; 10.9.3 HISIM2; 10.9.4 PSP; REFERENCES; PROBLEMS;
APPENDICES; A. BASIC LAWS OF ELECTROSTATIC IN ONE DIMENSION; B. QUASI - FERMI
LEVELS AND CURRENTS; C. GENERAL ANALYSIS OF THE TWO - TERMINAL MOS STRUCTURE;
D. CAREFUL DEFINITIONS FOR THE LIMITS OF MODERATE INVERSION; E. GENERAL
ANALYSIS OF THE THREE - TERMINAL MOS STRUCTURE; F. DRAIN CURRENT FORMULATION
USING QUASI - FERMI POTENTIALS; G. MODELING BASED ON PINCHOFF VOLTAGE AND
RELATED TOPICS; H. EVALUATION OF THE INTRINSIC TRANSIENT SOURCE AND DRAIN
CURRENT; I. QUANTITIES USE IN THE DERIVATION OF THE NON-QUASI -STATIC
Y-PARAMETER MODEL; K. ANALYSIS OF BURIED CHANNEL DEVICES; L. MOSFET MODEL
BENCHMARK TESTS
Yannis Tsividis is Charles Batchelor Professor of Electrical Engineering at Columbia University. His work with MOS transistors began in 1975 as part of his Ph.D. work at the University of California, Berkeley, in the context of the design and fabrication of the first fully-integrated MOS operational amplifier. He is a Fellow of IEEE. Among his awards are the 1984 IEEE W. R. G. Baker Prize for the best IEEE publication and the 2003 IEEE International Solid-State Circuits Conference Outstanding Paper Award.
Colin McAndrew became involved with modeling semiconductor devices in 1987 and has contributed to the development of models for MOS, bipolar, and passive devices. He developed the backward-propagation-of-variation (BPV) technique for statistical modeling and has been a primary advocate of the use of Verilog-A and compilers for device modeling. He has a Ph.D. from the University of Waterloo, works at Freescale Semiconductor, and is a Fellow of the IEEE.
